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P/N:PM1063
REV. 1.3, NOV. 15, 2005
FEATURES
Bit organization
- 16Mb x 8 (byte mode)
- 8Mb x 16 (word mode)
Fast access time
- Random access:120/25ns(max.) in 3.0~3.6V
120/30ns(max.) in 2.7~3.6V
Page size
- 8 words per page
Current
- Operating:50mA
- Standby:15uA(max.)
Supply voltage
- VCC : 2.7 ~ 3.6V
- VCCQ : 2.7 ~ 3.6V
Package
- 64 ball mini BGA (10.0mm X 13.0mm, ball pitch
1.0mm), Pb-free, RoHS compliant
Temperature
- -25~85
C
PIN DESCRIPTION
Symbol
Pin Function
A0~A23
Address Inputs, A0 not used in
word mode
D0~D15
Data Outputs
CE0#,CE1#,CE2# Chip Enable Input
OE#
Output Enable Input
BYTE#
Word/Byte mode Selection
VCC
Power Supply Pin
VCCQ
Output VCC Pin
GND
Ground Pin
NC
No Connection
MX23L12824
128M-BIT MASK ROM
MODE SELECTION
CE#
OE#
BYTE#
D0~D15
D8~D15
Power
Disabled
X
X
High Z
HighZ
Stand-by
Enabled
H
X
High Z
HighZ
Active
Enabled
L
L
D0~D7
HighZ
Active
Enabled
L
H
D0~D7
D8~D15
Active
Chip Enable Truth Table
CE2#
CE1#
CE0#
DEVICE
L
L
L
Enabled
L
L
H
Disabled
L
H
L
Disabled
L
H
H
Disabled
H
L
L
Enabled
H
L
H
Enabled
H
H
L
Enabled
H
H
H
Disabled
Note: For single-chip applications, CE2#, CE1# can be strapped to GND.
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P/N:PM1063
REV. 1.3, NOV. 15, 2005
MX23L12824
PIN CONFIGURATION
64 Mini BGA (Top View, Ball Down)
A1
A1
B1
A2
C1
A3
D1
A4
E1
D8
F1
BYTE#
A2
A6
B2
GND
C2
A7
D2
A5
E2
D1
F2
D0
A3
A8
B3
A9
C3
A10
D3
A11
E3
D9
F3
D10
A4
NC
B4
CE0#
C4
A12
D4
NC
E4
D3
F4
D11
A5
A13
B5
A14
C5
A15
D5
NC
E5
D4
F5
D12
A6
VCC
B6
NC
C6
NC
D6
NC
E6
NC
F6
NC
A7
A18
B7
A19
C7
A20
D7
A16
E7
D15
F7
NC
A8
A22
B8
CE1#
C8
A21
D8
A17
E8
NC
F8
OE#
G1
A23
H1
CE2#
G2
A0
H2
NC
G3
D2
H3
VCC
G4
VCCQ
H4
GND
G5
D5
H5
D13
G6
D6
H6
GND
G7
D14
H7
D7
G8
NC
H8
NC
10.0 mm
13.0 mm
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P/N:PM1063
REV. 1.3, NOV. 15, 2005
MX23L12824
ABSOLUTE MAXIMUM RATINGS
Item
Symbol
Ratings
Voltage on any Pin Relative to VSS
VIN
-0.3V to 3.9V
Ambient Operating Temperature
Topr
-25
C to 85
C
Storage Temperature
Tstg
-65
C to 125
C
DC CHARACTERISTICS (Ta = -25
C ~ 85
C, VCC = 2.7V~3.6V)
Item
Symbol
MIN.
MAX.
Conditions
Output High Voltage
VOH
2.4V
-
IOH = -400uA
Output Low Voltage
VOL
-
0.4V
IOL = 1.6mA
Input High Voltage
VIH
2.2V
VCCQ+0.5V
Input Low Voltage
VIL
-0.5V
0.8V
Input Leakage Current
ILI
-
5uA
0V, VCC
Output Leakage Current
ILO
-
5uA
0V, VCC
Operating Current
ICC
-
50mA
f=5MHz, CE#=VIL, OE#=VIH
all output open
Standby Current (CMOS)
ISTB
-
15uA
CE#>VCC-0.2V
Input Capacitance
CIN
-
10pF
Ta = 25
C, f = 1MHZ
Output Capacitance
COUT
-
10pF
Ta = 25
C, f = 1MHZ
AC CHARACTERISTICS (Ta = -25
C ~ 85
C, VCC = 2.7V~3.6V)
Item
Symbol
23L12824-12
MIN.
MAX.
Read Cycle Time
tRC
120ns
-
Address Access Time
tAA
-
120ns
Chip Enable Access Time
tACE
-
120ns
Page Access Time
tPA
-
30ns (VCC=2.7~3.6V)
-
25ns (VCC=3.0~3.6V)
Output Enable Time
tOE
-
30ns
Output Hold After Address
tOH
0ns
-
Output High Z Delay
tHZ
-
20ns
Note:Output high-impedance delay (tHZ) is measured from OE# or CE# going high, and this parameter guaranteed
by design over the full voltage and temperature operating range - not tested.
ORDER INFORMATION
Part No.
Speed
Package
Grade
Remark
MX23L12824XI-12G
120ns
64 ball mini BGA
Industrial
Pb-free, RoHS compliant
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P/N:PM1063
REV. 1.3, NOV. 15, 2005
MX23L12824
AC Test Conditions
Input Pulse Levels
0.4V~2.4V
Input Rise and Fall Times
5ns
Input Timing Level
1.5V
Output Timing Level
1.5V
Output Load
See Figure
100pF output load
capacitance
TIMING DIAGRAM
PAGE READ
RANDOM READ
tACE
tAA
tOH
tHZ
ADD
ADD
ADD
ADD
CE#
OE#
DATA
VALID
VALID
VALID
tRC
tOE
Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
DOUT
C<100pF
IOL (load)=1.6mA
IOH (load)=-400uA
A4-A23
A0,A1,A2,A3
DATA
Note: CE#, OE# are enable.
Page size is 8 words in 16-bit mode, 16 bytes in 8-bit mode.
VALID ADD
VALID
1'st ADD
2'nd ADD
tPA
tAA
3'rd ADD
VALID
VALID
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P/N:PM1063
REV. 1.3, NOV. 15, 2005
MX23L12824
PACKAGE INFORMATION
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