ChipFind - документация

Электронный компонент: MDT10P23

Скачать:  PDF   ZIP
MDT10P23(AE)
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 1
2005/6 Ver. 1.4
1. General Description

This EPROM-Based 8-bit micro-controller
uses a fully static CMOS design technology
to achieve high speed, small size, low power
and high noise immunity.
On chip memory includes 2K words EPROM
and80 bytes static RAM.
Four comparator inputs with external Vref
(not for 18 pin package) are also provided.
2. Features
u
Fully CMOS static design
u
8-bit data bus
u
On chip EPROM size : 2 K words
u
Internal RAM size : 80 bytes
(72 general purpose registers, 8
special registers)
u
36 single word instructions
u
14-bit instructions
u
2-level stacks
u
Operating voltage : 2.3V ~ 5.5 V
u
Operating frequency : 0 ~ 20 MHz
u
The most fast execution time is 200 ns
under 20 MHz in all single cycle
instructions except
the branch instruction
u
Addressing modes include direct,
indirect and
relative addressing modes
u
Built-in Power-on Reset
u
4 Channel comparator
u
Power edge-detector Reset
u
Sleep Mode for power saving
u
8-bit real time clock/counter(RTCC) with
8-bit programmable prescaler
u
4 types of oscillator can be selected by
programming option:
RC
Low cost RC oscillator
LFXT
Low frequency crystal oscillator
XTAL
Standard crystal oscillator
HFXT
High frequency crystal oscillator
u
4 oscillator start-up time can be selected
by programming option:
150
s, 20 ms, 40 ms, 80 ms
u
On-chip RC oscillator based Watchdog
Timer(WDT) can be operated freely
u
12 I/O(for 18 pins package),14 I/O(for 20
pins package),16 I/O(for 22/24 pins
package) pins with their own independent
direction control
3. Applications

The application areas of this MDT10P23
range from appliance motor control and high
speed automotive to low power remote
transmitters/receivers, pointing devices, and
telecommunications processors, such as
Remote controller, small instruments,
chargers, toy, automobile and PC
peripheral ... etc
MDT10P23(AE)
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 2
2005/6 Ver. 1.4
4. Pin Assignment
A1
20PINS, A2
22PINS,
A3
24PINS, A5 :18 PINS
P
PDIP,S
SOP, K
SKINNY
A1P,A1S
PA5 1
20 PA4/VREF
PA2/CIC2 2
19 PA1/CIC1
PA3/CIC3 3
18 PA0/CIC0
RTCC 4
17 OSC1
/MCLR 5
16 OSC2
Vss 6
15 Vdd
PB0 7
14 PB7
PB1 8
13 PB6
PB2 9
12 PB5
PB3 10
11 PB4


A2K
PA7 1
22 PA6
PA5 2
21 PA4/VREF
PA2/CIC2 3
20 PA1/CIC1
PA3/CIC3 4
19 PA0/CIC0
RTCC 5
18 OSC1
/MCLR 6
17 OSC2
Vss 7
16 Vdd
PB0 8
15 PB7
PB1 9
14 PB6
PB2 10
13 PB5
PB3 11
12 PB4













A3S
NC 1
24 NC
PA7 2
23 PA6
PA5 3
22 PA4/VREF
PA2/CIC2 4
21 PA1/CIC1
PA3/CIC3 5
20 PA0/CIC0
RTCC 6
19 OSC1
/MCLR 7
18 OSC2
Vss 8
17 Vdd
PB0 9
16 PB7
PB1 10
15 PB6
PB2 11
14 PB5
PB3 12
13 PB4

A5P,A5S
PA2CIC2 1
18 PA1/CIC1
PA3/CIC3 2
17 PA0/CIC0
RTCC 3
16 OSC1
/MCLR 4
15 OSC2
Vss 5
14 Vdd
PB0 6
13 PB7
PB1 7
12 PB6
PB2 8
11 PB5
PB3 9
10 PB4
MDT10P23(AE)
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 3
2005/6 Ver. 1.4
5. Block Diagram
Stack Two Levels
Program Counters
Oscillator Circuit
Power on Reset
Power Down Reset
8-bit Timer/Counter
EPROM
1K
14 (MDT10P22)
Instruction
Register
Instruction
Decoder
Working Register
ALU
Prescale
RAM
72
8
Special Register
Control Circuit
Status Register
WDT/OST
Timer
Port B
Port A
OS
C1
OS
C2 MC
LR
Data
8-bit
RTCC
10 bits
10 bits
14 bits
Port
PA0~P
A7
(22,24
pins)
PA0~P
A5
(20
pins)
PA0~P
A3
(18
pins)
8 bits
Port
PB0~P
B7
8 bits
D0~D
7
Comparat
or mode
Register
CMR0~C
MR5
MDT10P23(AE)
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 4
2005/6 Ver. 1.4
6. Pin Function Description
Pin Name
I/O
Function Description
PA0~PA7
I/O
PA0~PA3 : TTL input level or comparator input
PA4 : TTL input level or comparator VREF input
PA5~PA7 : TTL input level
PB0~PB7
I/O
Port B, TTL input level
RTCC
I
Real Time Clock/Counter, Schmitt Trigger input levels
/MCLR
I
Master Clear, Schmitt Trigger input levels
OSC1
I
Oscillator Input
OSC2
O
Oscillator Output
Vdd
Power supply
Vss
Ground
NC
Unused ,do not connect

7. Memory Map

(A) Register Map
Address
Description
00
Indirect Addressing Register
01
RTCC
02
PC
03
STATUS
04
MSR
05
Port A
06
Port B
07
Control register for comparator
08~0F
Internal RAM, General Purpose Register
10~1F
Internal RAM, Memory bank 0
30~3F
Internal RAM, Memory bank 1
50~5F
Internal RAM, Memory bank 2
70~7F
Internal RAM, memory bank 3
MDT10P23(AE)
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 5
2005/6 Ver. 1.4
(1) IAR ( Indirect Address Register) : R0

(2) RTCC (Real Time Counter/Counter Register) : R1

(3) PC (Program Counter) : R2
Write PC, CALL --- always 0
LJUMP, JUMP, LCALL --- from instruction word
RTWI, RET --- from STACK
A9
A8
A7~A0



Write PC, JUMP, CALL --- from STATUS b5
LJUMP, LCALL --- from instruction word
RTWI, RET --- from STACK
Write PC --- from ALU
LJUMP, JUMP, LCALL, CALL --- from instruction word
RTWI, RET --- from STACK

(4) STATUS (Status register) : R3
Bit
Symbol
Function
0
1
2
3
4
5
7
C
HC
Z
PF
TF
page

----
Carry bit
Half Carry bit
Zero bit
Power loss Flag bit
Time overflow Flag bit
ROM Page select bit :
00 : 000H --- 1FFH
01 : 200H --- 3FFH
General purpose bit