1
Precision Edge
SY10EL38/L
SY100EL38/L
Micrel, Inc.
M9999-031006
hbwhelp@micrel.com or (408) 955-1690
The SY10/100EL38/L are low skew
2,
4/6 clock
generation chips designed explicitly for low skew clock
generation applications. The internal dividers are
synchronous to each other, therefore, the common output
edges are all precisely aligned. The devices can be driven
by either a differential or single-ended ECL or, if positive
power supplies are used, PECL input signal. In addition,
by using the V
BB
output, a sinusoidal source can be AC-
coupled into the device. If a single-ended input is to be
used, the V
BB
output should be connected to the CLK
input and bypassed to ground via a 0.01
F capacitor.
The V
BB
output is designed to act as the switching
reference for the input of the EL38/L under single-ended
input conditions. As a result, this pin can only source/
sink up to 0.5mA of current.
The common enable (EN) is synchronous so that the
internal dividers will only be enabled/disabled when the
internal clock is already in the LOW state. This avoids
any chance of generating a runt clock pulse on the
internal clock when the device is enabled/disabled as
can happen with an asynchronous control. An internal
runt pulse could lead to losing synchronization between
the internal divider stages. The internal enable flip-flop is
clocked on the falling edge of the input clock, therefore,
all associated specification limits are referenced to the
negative edge of the clock input.
The Phase_Out output will go HIGH for one clock cycle
whenever the
2 and the
4/6 outputs are both
transitioning from a LOW to a HIGH. This output allows
for clock synchronization within the system.
Upon start-up, the internal flip-flops will attain a
random state; the master reset (MR) input allows for the
synchronization of the internal dividers, as well as for
multiple EL38/Ls in a system.
s
3.3V and 5V power supply options
s
50ps output-to-output skew
s
Synchronous enable/disable
s
Master Reset for synchronization
s
Internal 75K
input pull-down resistors
s
Available in 20-pin SOIC package
DESCRIPTION
FEATURES
5V/3.3V
2,
4/6 CLOCK
GENERATION CHIP
Precision Edge
SY10EL38/L
SY100EL38/L
Rev.: G
Amendment: /0
Issue Date:
March 2006
Precision Edge
Precision Edge is a registered trademark of Micrel, Inc.
2
Precision Edge
SY10EL38/L
SY100EL38/L
Micrel, Inc.
M9999-031006
hbwhelp@micrel.com or (408) 955-1690
PACKAGE/ORDERING INFORMATION
Ordering Information
(1)
Package
Operating
Package
Lead
Part Number
Type
Range
Marking
Finish
SY10EL38LZC
Z20-1
Commercial
SY10EL38LZC
Sn-Pb
SY10EL38LZCTR
(2)
Z20-1
Commercial
SY10EL38LZC
Sn-Pb
SY100EL38LZC
Z20-1
Commercial
SY100EL38LZC
Sn-Pb
SY100EL38LZCTR
(2)
Z20-1
Commercial
SY100EL38LZC
Sn-Pb
SY10EL38LZI
Z20-1
Industrial
SY10EL38LZI
Sn-Pb
SY10EL38LZITR
(2)
Z20-1
Industrial
SY10EL38LZI
Sn-Pb
SY100EL38LZI
Z20-1
Industrial
SY100EL38LZI
Sn-Pb
SY100EL38LZITR
(2)
Z20-1
Industrial
SY100EL38LZI
Sn-Pb
SY10EL38LZG
(3)
Z20-1
Industrial
SY10EL38LZG with
Pb-Free
Pb-Free bar-line indicator
NiPdAu
SY10EL38LZGTR
(2, 3)
Z20-1
Industrial
SY10EL38LZG with
Pb-Free
Pb-Free bar-line indicator
NiPdAu
SY100EL38LZG
(3)
Z20-1
Industrial
SY100EL38LZG with
Pb-Free
Pb-Free bar-line indicator
NiPdAu
SY100EL38LZGTR
(2, 3)
Z20-1
Industrial
SY100EL38LZG with
Pb-Free
Pb-Free bar-line indicator
NiPdAu
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25
C, DC Electricals only.
2. Tape and Reel.
3. Pb-Free package is recommended for new designs.
1
VCC
/EN
DIVSEL
CLK
/CLK
VBB
MR
VCC
PHASED_OUT
/PHASED_OUT
20 VCC
Q0
/Q0
Q1
/Q1
Q2
/Q2
Q3
/Q3
VEE
19
18
17
16
15
14
13
12
11
2
3
4
5
6
7
8
9
10
20-Pin SOIC (Z20-1)
3
Precision Edge
SY10EL38/L
SY100EL38/L
Micrel, Inc.
M9999-031006
hbwhelp@micrel.com or (408) 955-1690
T
A =
40
C
T
A =
0
C
T
A =
+25
C
T
A =
+85
C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
I
EE
Power Supply Current
mA
10EL
35
50
65
35
--
65
35
--
65
35
--
65
100EL
35
50
65
35
--
65
35
--
65
35
--
75
V
BB
Output Reference
V
Voltage
10EL
-1.43
--
-1.30
-1.38
--
-1.27
-1.35
--
-1.25
-1.31
--
-1.19
100EL
-1.38
--
-1.26
-1.38
--
-1.26
-1.38
--
-1.26
-1.38
--
-1.26
I
IH
Input High Current
--
--
150
--
--
150
--
--
150
--
--
150
A
DC ELECTRICAL CHARACTERISTICS
(1)
V
EE
= V
EE
(Min.) to V
EE
(Max.); V
CC
= GND
NOTE:
1. Parametric values specified at:
5 volt Power Supply Range
100EL38 Series:
-4.2V to -5.5V.
10EL38 Series
-4.75V to -5.5V.
3 volt Power Supply Range
10/100EL38L Series:
-3.0V to -3.8V.
CLK
EN
MR
Function
Z
L
L
Divide
ZZ
H
L
Hold Q
03
X
X
H
Reset Q
03
TRUTH TABLE
NOTE:
Z = LOW-to-HIGH transition
ZZ = HIGH-to-LOW transition
DIVSEL
Q
2,
Q
3
OUTPUTS
0
Divide by 4
1
Divide by 6
Pin
Function
CLK
Differential Clock Inputs
EN
Synchronous Enable
MR
Master Reset
V
BB
Reference Output
Q
0,
Q
1
Differential
2 Outputs
Q
2,
Q
3
Differential
4/6 Outputs
DIVSEL
Frequency Select Input
PIN NAMES
4
Precision Edge
SY10EL38/L
SY100EL38/L
Micrel, Inc.
M9999-031006
hbwhelp@micrel.com or (408) 955-1690
T
A
= -40
C
T
A
= 0
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ.
Max.
Min. Typ. Max. Min. Typ. Max.
Min.
Typ.
Max. Unit
f
MAX
Maximum Toggle Frequency
1000
--
--
1000
--
--
1000
--
--
1000
--
--
MHz
t
PD
Propagation Delay to Output
ps
CLK
Output (Diff.)
950
--
1150
950
--
1150
970
--
1170 1050
--
1250
CLK
Output (S.E.)
900
--
1200
900
--
1200
920
--
1220 1000
--
1300
MR
Output
600
--
900
600
--
900
600
--
900
600
--
900
t
skew
Within-Device Skew
(2)
Q
0
-- Q
3
--
--
50
--
--
50
--
--
50
--
--
50
ps
All
--
--
75
--
--
75
--
--
75
--
--
75
Part-to-Part
Q
0
-- Q
3
(Diff.)
--
--
200
--
--
200
--
--
200
--
--
200
All
--
--
240
--
--
240
--
--
240
--
--
240
t
S
Set-up Time
EN
CLK
300
150
--
--
150
--
--
150
--
--
150
--
ps
DIVSEL
CLK
300
--
--
--
--
--
--
--
--
--
--
--
t
H
Hold Time
CLK
EN
400
150
--
400
150
--
400
150
--
400
150
--
ps
CLK
DIVSEL
400
200
--
400
200
--
400
200
--
400
200
--
V
PP
Minimum Input Swing
(3)
CLK
250
--
--
250
--
--
250
--
--
250
--
--
mV
V
CMR
Common Mode Range
(4)
CLK
1.3
--
0.4
1.4
--
0.4
1.4
--
0.4
1.4
--
0.4
V
t
RR
Reset Recovery Time
--
--
100
--
--
100
--
--
100
--
--
100
ps
t
PW
Minimum Pulse Width
CLK
800
--
--
800
--
--
800
--
--
800
--
--
ps
MR
700
--
--
700
--
--
700
--
--
700
--
--
t
r
Output Rise/Fall Times
Q
280
--
550
280
--
550
280
--
550
280
--
550
ps
t
f
(20% --80%)
AC ELECTRICAL CHARACTERISTICS
(1)
V
EE
= V
EE
(Min.) to V
EE
(Max.); V
CC
= GND
NOTES:
1. Parametric values specified at:
5 volt Power Supply Range
100EL38 Series:
-4.2V to -5.5V.
10EL38 Series
-4.75V to -5.5V.
3 volt Power Supply Range
10/100EL38L Series:
-3.0V to -3.8V.
2. Skew is measured between outputs under identical transitions.
3. Minimum input swing for which AC parameters are guaranteed. The device will function reliably with differential inputs down to 100mV.
4. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified
range and the peak-to-peak voltage lies between V
PP
min. and 1V. The lower end of the CMR range varies 1:1 with V
EE
. The numbers in the spec table
assume a nominal V
EE
= 3.3V. Note for PECL operation, the V
CMR
(min) will be fixed at 3.3V IV
CMR
(min)I.
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