1
Precision EdgeTM
SY100EP14U
Micrel
The SY100EP14U is a high-speed, 2GHz differential
PECL/ECL 1:5 fanout buffer optimized for ultra-low skew
applications. Within device skew is guaranteed to be less
than 25ps over temperature and supply voltage. The wide
supply voltage operation allows this fanout buffer to operate
in 2.5V, 3.3V, and 5V systems. A V
BB
reference is included
for single-supply or AC-coupled PECL/ECL input
applications, thus eliminating resistor networks. When
interfacing to a single-ended or AC-coupled PECL/ECL input
signal, connect the V
BB
pin to the unused /CLK pin, and
bypass the pin to V
CC
through a 0.01
F capacitor.
The SY100EP14U features a 2:1 input MUX, making it
an ideal solution for redundant clock switchover applications.
If only one input pair is used, the other pair may be left
floating. In addition, this device includes a synchronous
enable pin that forces the outputs into a fixed logic state.
Enable or disable state is initiated only after the outputs are
in a LOW state, thus eliminating the possibility of a "runt"
clock pulse.
The SY100EP14U I/O are fully differential and 100K ECL
compatible. Differential 10K ECL logic can interface directly
into the SY100EP14U inputs.
The SY100EP14U is part of Micrel's high-speed clock
synchronization family. For applications that require a
different I/O combination, consult the Micrel website at
www.micrel.com, and choose from a comprehensive product
line of high-speed, low-skew fanout buffers, translators, and
clock generators.
FEATURES
DESCRIPTION
Rev.: D
Amendment: /0
Issue Date:
July 2003
PIN CONFIGURATION/BLOCK DIAGRAM
1
Q0
/Q0
Q1
/Q1
Q2
/Q2
Q3
/Q3
Q4
/Q4
20
VCC /EN VCC
/CLK1
CLK1
VBB
/CLK0
CLK0
SEL VEE
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
1
0
D
Q
TSSOP
TOP VIEW
s
Guaranteed AC parameters over temp/voltage:
> 2GHz f
MAX
< 25ps within-device skew
< 275ps tr/tf time
< 525ps prop delay
s
2:1 Differential Mux input
s
Flexible supply voltage: 2.5V/3.3V/5V
s
Wide operating temperature range: 40
C to +85
C
s
V
BB
reference for single-ended or AC-coupled
PECL inputs
s
100K ECL compatible outputs
s
Inputs accept PECL/LVPECL/ECL/HSTL logic
s
75k
internal input pull-down resistors
s
Available in a 20-Pin TSSOP package
2.5V/3.3V/5V 1:5 LVPECL/PECL/
ECL/HSTL 2GHz CLOCK DRIVER
WITH 2:1 DIFFERENTIAL INPUT MUX
ECL ProTM
Precision EdgeTM
SY100EP14U
Precision Edge and ECL Pro are trademarks of Micrel, Inc.
2
Precision EdgeTM
SY100EP14U
Micrel
PIN DESCRIPTION
Pin
Function
CLK0, /CLK0
PECL, LVPECL, ECL, LVECL, HSTL Clock or Data Inputs.
CLK1, /CLK1
Internal 75k
pull-down resistors on CLK0, CLK1, and internal 75k
pull-up and 75k
pull-down resistors or
/CLK0, /CLK1. For single-ended applications, connect signal into CLK0 and/or CLK1 inputs. /CLK0, /CLK1
default condition is V
CC
/2 when left floating. CLK0, CLK1 default condition is LOW when left floating.
Q0 to Q4
LVPECL, PECL, ECL Differential Outputs: Terminate with 50
to V
CC
2V. For single-ended applications,
/Q0 to /Q4
terminate the unused output with 50
to V
CC
2V
/EN
LVPECL, PECL, ECL compatible synchronous enable: When /EN goes HIGH, the Q
OUT
will go LOW and
/Q
OUT
will go HIGH on the next LOW input clock transition. Includes a 75k
pull-down. Default state is LOW
when left floating. The internal latch is clocked on the falling edge of the input clock (CLK0, CLK1)
SEL
LVPECL, PECL, ECL compatible 2:1 Mux input signal select: When SEL is LOW, CLK0 input pair is selected.
When SEL is HIGH, CLK1 input pair is selected. Includes a 75k
pull-down. Default state is LOW and
CLK0 is selected.
V
BB
Output Reference Voltage: Equal to V
CC
1.7V (approx.), and used for single-ended input signals or
AC-coupled applications. For single-ended PECL, LVPECL applications, bypass with a 0.01
F to V
CC
.
For single-ended LVTTL inputs, bypass to GND. Max. sink/source current is 0.5mA.
V
CC
Positive Power Supply: Bypass with 0.1
F//0.01
F low ESR capacitors.
V
EE
Negative Power Supply: LVPECL, PECL applications, connect to GND.
CLK_SEL
Active Input
0
CLK0, /CLK0
1
CLK1, /CLK1
FUNCTION TABLE
TRUTH TABLE
(1)
CLK0
CLK1
CLK_SEL
/EN
Q
L
X
L
L
L
H
X
L
L
H
X
L
H
L
L
X
H
H
L
H
X
X
X
H
L*
Note 1.
On next negative transition of CLK0 or CLK1.
3
Precision EdgeTM
SY100EP14U
Micrel
Symbol
Rating
Value
Unit
V
CC
V
EE
Power Supply Voltage
6.0
V
V
IN
Input Voltage (V
CC
= 0V, V
IN
not more negative than V
EE
)
6.0 to 0
V
Input Voltage (V
EE
= 0V, V
IN
not more positive than V
CC
)
+6.0 to 0
I
OUT
Output Current
Continuous
50
mA
Surge
100
I
BB
V
BB
Sink/Source Current
(2)
0.5
mA
T
A
Operating Temperature Range
40 to +85
C
T
store
Storage Temperature Range
65 to +150
C
ESD
Mil Std. 883 Human Body Model, All Pins
>1.5k
V
JA
Package Thermal Resistance
Still-Air (single-layer PCB)
115
(Junction-to-Ambient)
Still-Air (multi-layer PCB)
75
C/W
500lfpm (multi-layer PCB)
65
JC
Package Thermal Resistance
21
C/W
(Junction-to-Case)
Note 1.
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation
is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM
RATlNG conditions for extended periods may affect device reliability.
Note 2.
Due to the limited drive capability, use for inputs of same package only.
ABSOLUTE MAXIMUM RATINGS
(1)
T
A
= 40
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Condition
V
CC
Power Supply Voltage
V
(PECL)
4.5
5.0
5.5
4.5
5.0
5.5
4.5
5.0
5.5
(LVPECL)
2.37
3.3
3.8
2.37
3.3
3.8
2.37
3.3
3.8
(ECL)
4.5
5.0
5.5
4.5
5.0
5.5
4.5
5.0
5.5
(LVECL)
3.8
3.3
2.37
3.8
3.3
2.37
3.8
3.3
2.37
I
CC
Power Supply Current
--
--
75
--
68
78
--
--
82
mA
I
IH
Input HIGH Current
--
--
150
--
--
150
--
--
150
A
V
IN
= V
IH
I
IL
Input LOW Current
D
0.5
--
--
0.5
--
--
0.5
--
--
A
V
IN
= V
IL
/D
150
--
--
150
--
--
150
--
--
A
V
IN
= V
IL
C
IN
Input Capacitance (TSSOP)
--
--
--
--
0.75
--
--
--
--
pF
Note 1.
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained.
DC ELECTRICAL CHARACTERISTICS
(1)
4
Precision EdgeTM
SY100EP14U
Micrel
T
A
= 40
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Condition
V
IL
Input LOW Voltage
(2)
555
--
875
555
--
875
555
--
875
mV
(Single-ended)
V
IH
Input HIGH Voltage
(2)
1335
--
1620
1335
--
1620
1335
--
1620
mV
(Single-ended)
V
OL
Output LOW Voltage
555
680
805
555
680
805
555
680
805
mV
50
to V
CC
2V
V
OH
Output HIGH Voltage
1355
1480
1605
1355
1480
1605
1355
1480
1605
mV
50
to V
CC
2V
V
IHCMR
Input HIGH Voltage
1.2
--
V
CC
1.2
--
V
CC
1.2
--
V
CC
V
Common Mode Range
(3)
Note 1.
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output varies
1:1 with V
CC
.
Note 2.
V
BB
reference is not functional for V
CC
< 3.0V. External V
BB
equivalent is required.
Note 3.
V
IHCMR
(min) varies 1:1 with V
EE
, V
IHCMR
(Max) varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differen-
tial input signal.
(100KEP) LVPECL DC ELECTRICAL CHARACTERISTICS
(1)
V
CC
= 2.5V
5%, V
EE
= 0V
T
A
= 40
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Condition
V
IL
Input LOW Voltage
1355
--
1675
1355
--
1675
1355
--
1675
mV
(Single-Ended)
V
IH
Input HIGH Voltage
2075
--
2420
2075
--
2420
2075
--
2420
mV
(Single-Ended)
V
OL
Output LOW Voltage
1355
1480
1605
1355
1480
1605
1355
1480
1605
mV
50
to V
CC
2V
V
OH
Output HIGH Voltage
2155
2280
2405
2155
2280
2405
2155
2280
2405
mV
50
to V
CC
2V
V
BB
Reference Voltage
(2)
1775
1875
1975
1775
1875
1975
1775
1875
1975
mV
V
CC
= 3.3V
V
IHCMR
Input HIGH Voltage
1.2
--
V
CC
1.2
--
V
CC
1.2
--
V
CC
V
Common Mode Range
(3)
Note 1.
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output varies
1:1 with V
CC
.
Note 2.
Single-ended input operation is limited V
CC
3.0V in LVPECL mode. V
BB
reference varies 1:1 with V
CC
.
Note 3.
V
IHCMR
(min) varies 1:1 with V
EE
, V
IHCMR
(Max) varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differen-
tial input signal.
(100KEP) LVPECL DC ELECTRICAL CHARACTERISTICS
(1)
V
CC
= 3.3V
10%; V
EE
= 0V
5
Precision EdgeTM
SY100EP14U
Micrel
T
A
= 40
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Condition
V
IL
Input LOW Voltage
3055
--
3375
3055
--
3375
3055
--
3375
mV
(Single-Ended)
V
IH
Input HIGH Voltage
3775
--
4120
3775
--
4120
3775
--
4120
mV
(Single-Ended)
V
OL
Output LOW Voltage
3055
3180
3305
3055
3180
3305
3055
3180
3305
mV
50
to V
CC
2V
V
OH
Output HIGH Voltage
3855
3980
4105
3855
3980
4105
3855
3980
4105
mV
50
to V
CC
2V
V
BB
Output Voltage Reference
(2)
3475
3575
3675
3475
3575
3675
3475
3575
3675
mV
V
CC
= +5.0V
V
IHCMR
Input HIGH Voltage
(3)
2.0
--
V
CC
2.0
--
V
CC
2.0
--
V
CC
V
Common Mode Range
(100KEP) PECL DC ELECTRICAL CHARACTERISTICS
(1)
V
CC
= 5.0V
10%, V
EE
= 0V
Note 1.
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output
parameters are at V
CC
= 5.0V. They vary 1:1 with V
CC
.
Note 2.
V
BB
reference varies 1:1 with V
CC
.
Note 3.
The V
IHCMR
range is referenced to the most positive side of the differential input signal. Single-ended input CLK pin operation is limited to V
CC
3.0V in PECL mode.
T
A
= 40
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Condition
V
IL
Input LOW Voltage
1945
--
1625 1945
--
1625 1945
--
1625
mV
(Single-ended)
V
IH
Input HIGH Voltage
1165
--
880
1165
--
880
1165
--
880
mV
(Single-ended)
V
OL
Output LOW Voltage
1945 1820 1695 1945 1820 1695 1945 1820 1695
mV
50
to V
CC
2V
V
OH
Output HIGH Voltage
1145 1020 0895 1145 1020 0895 1145 1020 0895
mV
50
to V
CC
2V
V
BB
Output Reference Voltage
(2)
1525 1425 1325 1525 1425 1325 1525 1425 1325
mV
V
IHCMR
Input HIGH Voltage
V
Common Mode Range
(3)
V
EE
+1.2
0.0
V
EE
+1.2
0.0
V
EE
+1.2
0.0
(100KEP) LVECL DC ELECTRICAL CHARACTERISTICS
(1)
V
EE
= 2.37V to 3.8V; V
CC
= 0V
Note 1.
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output
parameters vary 1:1 with V
CC
.
Note 2.
Single-ended input operation is limited V
EE
3.0V in ECL/LVECL mode. V
BB
reference varies 1:1 with V
CC
.
Note 3.
V
IHCMR
(min) varies 1:1 with V
EE
, V
IHCMR
(max) varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the
differential input signal.
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