1
ECL ProTM
SY100EP57V
Micrel
20 VCC
SEL1
SEL0
VCC
Q
/Q
VCC
VBB1
VBB2
VEE
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
VCC
D0
/D0
D1
/D1
D2
/D2
D3
/D3
VEE
4:1
20-pin TSSOP Package
DESCRIPTION
FEATURES
3.3V/5V PECL/ECL
3GHz DIFFERENTIAL
4:1 MULTIPLEXER
PIN CONFIGURATION/BLOCK DIAGRAM
ECL ProTM
SY100EP57V
FINAL
s
Fully differential 4:1 PECL/ECL multiplexer
s
Guaranteed AC-parameters over temp/voltage:
> 3GHz Fmax (toggle)
< 220ps rise/fall Time
< 520ps propagation delay (D-to-Q)
s
Flexible power supply: 3.0V to 5.5V
s
Wide operating temp range: 40
C to +85
C
s
V
BB
reference for AC-coupled and single-ended
applications
s
100k PECL/ECL compatible logic
s
Available in 20-pin TSSOP package
The SY100EP57V is a high-speed, low-skew, fully
differential PECL/ECL 4:1 multiplexer in a 20-pin TSSOP
package. This device is a pin-for-pin, plug-in replacement
to the MC10/100EP57DT. The signal-path inputs (D0:D3)
accept differential signals as low as 150mVpk-pk. All I/O
pins are 100K EP PECL/ECL logic compatible.
ACperformance is guaranteed over the industrial 40
C
to +85
C temperature range and 3.0V to 5.5V supply voltage
range. This device will operate in PECL/LVPECL or ECL/
LVECL mode. The SY100EP57 propagation delay is less
than 520ps, and the Select-to-valid output delay is less
than 575ps over temperature and voltage. For clock
applications, the high-speed design combined with an
extremely fast rise/fall time of less than 220ps produces a
toggle frequency as high as 3GHz (400mVpk-pk swing).
Two V
BB
output reference pins (approx equal to V
CC
1.4V)
are available for ACcoupled or single-ended applications.
The SY100EP57V is part of Micrel's high-speed, Precision
Edge timing and distribution family. For applications that
require a different I/O combination, consult the Micrel website
at
www.micrel.com
, and choose from a comprehensive
product line of high-speed, low skew fanout buffers,
translators, and clock dividers.
Rev.: B
Amendment: /0
Issue Date:
March 2003
Micrel Semiconductor
ON Semiconductor
SY100EP57VK4I
MC100EP57DT
SY100EP57VK4ITR
MC100EP57DTR2
CROSS REFERENCE TABLE
ECL ProTM
ECL Pro is a trademark of Micrel, Inc.
2
ECL ProTM
SY100EP57V
Micrel
PIN DESCRIPTION
Pin
Pin Number
Function
D0: D3
2, 4, 6, 8
Input Channels 0-3 PECL/ECL differential signal inputs. Multiplexing of these 4 differential inputs
/D0: /D3
3, 5, 7, 9
is controlled by SEL0, SEL1. The signal inputs include internal 75k
pull-down resistors. Default
condition is LOW when left floating. The input signal should be terminated externally.
See "
Termination
" section
VEE
10, 11
Negative Power Supply: For PECL/LVPECL applications, connect to Ground. Both V
EE
pins must
be connected together, externally on the PCB, for proper operation.
VBB1, VBB2
13, 12
Reference output voltage. This reference is typically used to bias the unused inverting input for
single-ended input applications, or as the termination point for ACcoupled differential input
applications. V
BB
reference value is approximately V
CC
1.4V, and tracks V
CC
1:1. Maximum sink/
source capability for each V
BB
reference pin is 0.50mA. For single ended PECL inputs, connect to
the unused input through a 50
resistor. Decouple the V
BB
pin with a 0.01
F capacitor. For PECL/
LVPECL inputs, the decoupling capacitor is connected to V
CC
, since PECL signals are referenced
to V
CC
. Leave floating if not used.
/Q, Q
15, 16
100KEP PECL/ECL compatible differential output. PECL/ECL termination is with a 50
resistor to V
CC
2V. Unused single-ended outputs must have a balanced load. For ACcoupled
applications, the output stage emitter follower must have a DC current path to ground.
See "
Termination
" section.
SEL0, SEL1
18, 19
100KEP PECL/ECL compatible 4:1 MUX select control. See "
MUX Select Truth Table.
" Each pin
includes an internal 75k
pull-down resistor. Default condition when left floating is LOW.
VCC
1, 14, 17, 20
Positive Power Supply. All V
CC
pins must be connected to the same power supply externally.
Bypass with 0.1
F//0.01
F low ESR capacitors.
MUX SELECT TRUTH TABLE
SEL1
SEL0
DATA OUT
L
L
D0, /D0
L
H
D1, /D1
H
L
D2, /D2
H
H
D3, /D3
3
ECL ProTM
SY100EP57V
Micrel
Symbol
Rating
Value
Unit
V
CC
-- V
EE
Power Supply Voltage
6.0
V
V
IN
Input Voltage (V
CC
= 0V, V
IN
not more negative than V
EE
)
6.0 to 0
V
Input Voltage (V
EE
= 0V, V
IN
not more positive than V
CC
)
+6.0 to 0
V
I
OUT
Output Current
Continuous
50
mA
Surge
100
I
BB
V
BB
Sink/Source Current
(2)
0.5
mA
T
A
Operating Temperature Range
40 to +85
C
T
store
Storage Temperature Range
65 to +150
C
JA
Package Thermal Resistance
Still-Air (single-layer PCB)
115
C/W
(Junction-to-Ambient)
Still-Air (multi-layer PCB)
75
500lfpm (multi-layer PCB)
65
JC
Package Thermal Resistance
21
C/W
(Junction-to-Case)
Note 1.
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation
is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM
RATlNG conditions for extended periods may affect device reliability.
Note 2.
Due to the limited drive capability, the V
BB
reference should only be used for inputs from the same package device (i.e., do not sue for other
devices).
ABSOLUTE MAXIMUM RATINGS
(1)
T
A
= 40
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Condition
V
CC
Power Supply Voltage
V
(PECL)
4.5
5.0
5.5
4.5
5.0
5.5
4.5
5.0
5.5
(LVPECL)
3.0
--
3.8
3.0
--
3.8
3.0
--
3.8
(ECL)
5.5
5.0
4.5
5.5
5.0
4.5
5.5
5.0
4.5
(LVECL)
3.8
3.3
3.0
3.8
3.3
3.0
3.8
3.3
3.0
I
EE
Supply Current
--
35
50
--
35
50
--
35
50
mA
No Load
I
IH
Input HIGH Current
--
--
75
--
--
75
--
--
80
A
V
IN
= V
IH
I
IL
Input LOW Current
All Inputs
0.5
--
--
0.5
--
--
0.5
--
--
A
V
IN
= V
IL
C
IN
Input Capacitance (TSSOP)
--
--
--
--
1.0
--
--
--
--
pF
Note 1.
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained.
DC ELECTRICAL CHARACTERISTICS
(1)
4
ECL ProTM
SY100EP57V
Micrel
T
A
= 40
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Condition
V
IL
Input LOW Voltage
1355
--
1675
1355
--
1675
1355
--
1675
mV
(Single-Ended)
V
IH
Input HIGH Voltage
2075
--
2420
2075
--
2420
2075
--
2420
mV
(Single-Ended)
V
OL
Outuput LOW Voltage
1355
1480
1605
1355
1480
1605
1355
1480
1605
mV
50
to V
CC
2V
V
OH
Output HIGH Voltage
2155
2280
2405
2155
2280
2405
2155
2280
2405
mV
50
to V
CC
2V
V
BB
Output Reference Voltage
1775
1875
1975
1775
1875
1975
1775
1875
1975
mV
V
IHCMR
Input HIGH Voltage
(2)
2.0
--
V
CC
2.0
--
V
CC
2.0
--
V
CC
V
Common Mode Range
(100KEP) LVPECL DC ELECTRICAL CHARACTERISTICS
(1)
V
CC
= 3.3V
10%, V
EE
= 0V
Note 1.
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output
parameters are at V
CC
= 3.3V. They vary 1:1 with V
CC
.
Note 2.
The V
IHCMR
range is referenced to the most positive side of the differential input signal.
T
A
= 40
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Condition
V
IL
Input LOW Voltage
3055
--
3375
3055
--
3375
3055
--
3375
mV
(Single-Ended)
V
IH
Input HIGH Voltage
3775
--
4120
3775
--
4120
3775
--
4120
mV
(Single-Ended)
V
OL
Outuput LOW Voltage
3055
3180
3305
3055
3180
3305
3055
3180
3305
mV
50
to V
CC
2V
V
OH
Output HIGH Voltage
3855
3980
4105
3855
3980
4105
3855
3980
4105
mV
50
to V
CC
2V
V
BB
Output Reference Voltage
3475
3575
3675
3475
3575
3675
3475
3575
3675
mV
V
IHCMR
Input HIGH Voltage
(2)
2.0
--
V
CC
2.0
--
V
CC
2.0
--
V
CC
V
Common Mode Range
(100KEP) PECL DC ELECTRICAL CHARACTERISTICS
(1)
V
CC
= 5.0V
10%, V
EE
= 0V
Note 1.
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output
parameters are at V
CC
= 3.3V. They vary 1:1 with V
CC
.
Note 2.
The V
IHCMR
range is referenced to the most positive side of the differential input signal.
5
ECL ProTM
SY100EP57V
Micrel
T
A
= 40
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Condition
V
IL
Input LOW Voltage
1945
--
1625 1945
--
1625 1945
--
1625
mV
V
IH
Input HIGH Voltage
1225
--
880
1225
--
880
1225
--
880
mV
V
OL
Outuput LOW Voltage
1945 1820 1695 1945 1820 1695 1945 1820 1695
mV
50
to V
CC
2V
V
OH
Output HIGH Voltage
1145 1020
895
1145 1020
895
1145 1020
895
mV
50
to V
CC
2V
V
BB
Output Reference Voltage
1525 1425 1325 1525 1425 1325 1525 1425 1325
mV
V
IHCMR
Input HIGH Voltage
(2)
V
EE
+2.0
0.0
V
EE
+2.0
0.0
V
EE
+2.0
0.0
V
Common Mode Range
(100KEP) ECL/LVECL DC ELECTRICAL CHARACTERISTICS
(1)
V
CC
= 0V, V
EE
= 5.5V to 3.0V
Note 1.
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output
parameters are at V
CC
= 3.3V. They vary 1:1 with V
CC
.
Note 2.
The V
IHCMR
range is referenced to the most positive side of the differential input signal.
T
A
= 40
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Condition
f
MAX
Max. Toggle Frequency
(1)
3
--
--
3
--
--
3
--
--
GHz
t
PLH
Propagation Delay (Differential)
t
PHL
D to Q, /Q
250
310
450
250
315
475
250
320
520
ps
SEL to Q, /Q
300
370
500
300
380
520
300
390
575
ps
t
SKEW
Part-to-Part Skew
(2)
--
--
200
--
--
200
--
--
200
ps
t
JITTER
Cycle-to-Cycle Jitter (rms)
--
0.2
< 1
--
0.2
< 1
--
0.2
< 1
ps
rms
Random Jitter
--
--
--
--
<1
--
--
--
--
ps
rms
Note 3
Deterministic Jitter
@1.25Gbps
--
--
--
--
<25
--
--
--
--
ps
pk-pk
Note 4
@2.5Gbps
--
--
--
--
<50
--
--
--
--
V
DIFF
Input Voltage (Differential)
150
800
1200
150
800
1200
150
800
1200
mV
t
r,
t
f
Output Rise/Fall Time Q, /Q
--
120
170
--
140
200
--
150
220
ps
(20% to 80%)
Note 1.
Measured with 750mV input signal, 50% duty cycle. Output swing
400mV. All loading with a 50
to V
CC
2.0V.
Note 2.
Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are
measured from the cross point of the inputs to the cross point of the outputs.
Note 3.
RJ is measured with a K28.7 comma detect character pattern, measured at 1.25Gbps and 2.5Gbps.
Note 4.
DJ is measured at 1.25Gbps and 2.5Gbps, with both K28.5 and 2
23
1 PRBS pattern
AC ELECTRICAL CHARACTERISTICS
V
CC
= 0V; V
EE
= 3.0V to 5.5V or V
CC
= 3.0V to 5.5V, V
EE
= 0V
Ordering
Package
Operating
Package
Code
Type
Range
Marking
SY100EP57VK4C
K4-20-1
Commercial
XEP57V
SY100EP57VK4CTR
(1)
K4-20-1
Commercial
XEP57V
Note 1.
Tape and Reel.
Note 2.
Recommended for new designs.
PRODUCT ORDERING CODE
Ordering
Package
Operating
Package
Code
Type
Range
Marking
SY100EP57VK4I
(2)
K4-20-1
Industrial
XEP57V
SY100EP57VK4ITR
(1,2)
K4-20-1
Industrial
XEP57V
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