s
500ps max. propagation delay
s
Extended 100E V
EE
range of 4.2V to 5.5V
s
True and complementary outputs
s
Fully compatible with industry standard 10KH,
100K I/O levels
s
Internal 75K
input pulldown resistors
s
Fully compatible with Motorola MC10E/100E101
s
Available in 28-pin PLCC package
QUAD 4-INPUT
OR/NOR GATE
The SY10/100E101 are quad 4-input OR/NOR gates
designed for use in new, high-performance ECL systems.
The E101 features both true and complementary outputs.
SY10E101
SY100E101
FEATURES
DESCRIPTION
Rev.: D
Amendment: /2
Issue Date: May, 1998
PIN CONFIGURATION
V
EE
D
2d
D
2c
D
1d
D
2a
Q
3
26
27
28
1
2
3
4
18
17
16
15
14
13
12
25 24 23 22 21 20 19
5
6
7
8
9
10 11
D
1c
D
2b
V
CCO
D
0a
Q
2
V
CCO
PLCC
TOP VIEW
J28-1
D
3a
D
3d
D
3c
Q
2
V
CC
Q
1
Q
1
Q
0
Q
0
D
0b
D
0c
D
0d
D
1a
D
1b
D
3b
Q
3
D
0a
D
0b
D
0c
D
0d
D
1a
D
1b
D
1c
D
1d
D
2a
D
2b
D
2c
D
2d
D
3a
D
3b
D
3c
D
3d
Q
0
Q
0
Q
1
Q
1
Q
2
Q
2
Q
3
Q
3
BLOCK DIAGRAM
Pin
Function
D
na
, D
nb
, D
nc
, D
nd
Data Inputs
Q
0
-Q
3
True Outputs
Q
0
-Q
3
Inverting Outputs
V
CCO
V
CC
to Output
PIN NAMES
1
2
SY10E101
SY100E101
Micrel
AC ELECTRICAL CHARACTERISTICS
V
EE
= V
EE
(Min.) to V
EE
(Max.); V
CC
= V
CCO
= GND
T
A
= 40
C
T
A
= 0
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
t
PLH
Propagation Delay to
150
--
550
200
350
500
200
350
500
200
350
500
ps
t
PHL
Output D to Q
t
skew
Within-Device Skew
(1)
--
50
--
--
50
--
--
50
--
--
50
--
ps
Within-Gate Skew
(2)
--
25
--
--
25
--
--
25
--
--
25
--
ps
t
r
Rise/Fall Time
275
--
625
300
380
575
300
380
575
300
380
575
ps
t
f
20% to 80%
DC ELECTRICAL CHARACTERISTICS
V
EE
= V
EE
(Min.) to V
EE
(Max.); V
CC
= V
CCO
= GND
T
A
= 40
C
T
A
= 0
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
I
IH
Input HIGH Current
--
--
150
--
--
150
--
--
150
--
--
150
A
I
EE
Power Supply Current
mA
10EL
--
30
36
--
30
36
--
30
36
--
30
36
100EL
--
30
36
--
30
36
--
30
36
--
35
42
Q
n
= D
na
+ D
nb
+ D
nc
+ D
nd
LOGIC EQUATION
NOTES:
1. Within-device skew is defined as identical transitions on similar paths through a device.
2. Within-gate skew is defined as the variation in propagation delays through a single gate when driven from its different inputs.
Ordering
Package
Operating
Code
Type
Range
SY10E101JC
J28-1
Commercial
SY10E101JCTR
J28-1
Commercial
SY100E101JC
J28-1
Commercial
SY100E101JCTR
J28-1
Commercial
PRODUCT ORDERING CODE
Ordering
Package
Operating
Code
Type
Range
SY10E101JI
J28-1
Industrial
SY10E101JITR
J28-1
Industrial
SY100E101JI
J28-1
Industrial
SY100E101JITR
J28-1
Industrial
3
SY10E101
SY100E101
Micrel
28 LEAD PLCC (J28-1)
Rev. 03
MICREL-SYNERGY
3250 SCOTT BOULEVARD
SANTA CLARA
CA 95054
USA
TEL
+ 1 (408) 980-9191
FAX
+ 1 (408) 914-7878
WEB
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
2000 Micrel Incorporated
PDF 
ZIP