s
700MHz min. shift frequency
s
Extended 100E V
EE
range of 4.2V to 5.5V
s
9 bits wide for byte-parity applications
s
Asynchronous Master Reset
s
Dual clocks
s
Fully compatible with industry standard 10KH,
100K ECL levels
s
Internal 75K
input pulldown resistors
s
Fully compatible with Motorola MC10E/100E142
s
Available in 28-pin PLCC package
FEATURES
9-BIT SHIFT
REGISTER
The SY10/100E142 are high-speed 9-bit shift registers
designed for use in new, high-performance ECL systems.
The E142 can accept serial or parallel data to be shifted out
in one direction as both serial and parallel outputs. The
nine inputs, D
0
-D
8
, accept parallel input data, while S-IN
accepts serial input data.
The SEL (Select) control pin serves to determine the
mode of operation, either SHIFT or LOAD. The shift direction
is from bit 0 to bit 8. The input data has to meet the set-up
time before being clocked into the nine input registers on
the rising edge of CLK
1
or CLK
2
. Shifting is also performed
on the rising edge of either CLK
1
or CLK
2
. The MR (Master
Reset) control signal asynchronously resets all nine
registers to a logic LOW when a logic HIGH is applied to
MR.
The E142 is designed for applications such as diagnostic
scan registers, parallel-to-serial conversions and is also
suitable for byte-wide parity.
DESCRIPTION
SY10E142
SY100E142
Rev.: C
Amendment: /1
Issue Date: February, 1998
PIN NAMES
Pin
Function
D
0
-D
8
Parallel Data Inputs
S-IN
Serial Data Input
SEL
Mode Select Input
CLK
1
, CLK
2
Clock Inputs
MR
Master Reset
Q
0
-Q
8
Data Outputs
V
CCO
V
CC
to Output
PIN CONFIGURATION
V
EE
MR
CLK
1
D
0
S-IN
V
CCO
26
27
28
1
2
3
4
18
17
16
15
14
13
12
25 24 23 22 21 20 19
5
6
7
8
9
10 11
D
1
CLK
2
Q
2
Q
1
Q
7
D
5
PLCC
TOP VIEW
J28-1
SEL
D
6
D
7
Q
6
V
CC
Q
5
V
CCO
Q
4
Q
3
Q
0
V
CCO
D
4
D
3
D
2
D
8
Q
8
BLOCK DIAGRAM
1
D Q
0
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
Q
8
S-IN
SEL
MR
CLK1
CLK2
D Q
D Q
D Q
D Q
D Q
D Q
D Q
D Q
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
D
0
1
2
SY10E142
SY100E142
Micrel
TRUTH TABLE
DC ELECTRICAL CHARACTERISTICS
AC ELECTRICAL CHARACTERISTICS
SEL
MODE
L
LOAD
H
SHIFT
V
EE
= V
EE
(Min.) to V
EE
(Max.); V
CC
= V
CCO
= GND
T
A
= 0
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ. Max. Min.
Typ.
Max. Min.
Typ.
Max.
Unit
Condition
I
IH
Input HIGH Current
--
--
150
--
--
150
--
--
150
A
--
I
EE
Power Supply Current
mA
--
10E
--
120
145
--
120
145
--
120
145
100E
--
120
145
--
120
145
--
138
165
V
EE
= V
EE
(Min.) to V
EE
(Max.); V
CC
= V
CCO
= GND
T
A
= 0
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ. Max. Min.
Typ.
Max. Min.
Typ.
Max.
Unit
Condition
f
SHIFT
Max. Shift Frequency
700
900
--
700
900
--
700
900
--
MHz
--
t
PLH
Propagation Delay to Output
ps
--
t
PHL
CLK
600
800
1000
600
800
1000
600
800
1000
MR
600
800
1000
600
800
1000
600
800
1000
t
S
Set-up Time
ps
--
D
50
100
--
50
100
--
50
100
--
SEL
300
150
--
300
150
--
300
150
--
t
H
Hold Time
ps
--
D
300
100
--
300
100
--
300
100
--
SEL
75
150
--
75
150
--
75
150
--
t
RR
Reset Recovery Time
900
700
--
900
700
--
900
700
--
ps
--
t
PW
Minimum Pulse Width
400
--
--
400
--
--
400
--
--
ps
--
CLK, MR
t
skew
Within-Device Skew
--
75
--
--
75
--
--
75
--
ps
1
t
r
Rise/Fall Time
300
525
800
300
525
800
300
525
800
ps
--
t
f
20% to 80%
NOTE:
1. Within-device skew is defined as identical transitions on similar paths through a device.
PRODUCT ORDERING CODE
Ordering
Package
Operating
Code
Type
Range
SY10E142JC
J28-1
Commercial
SY10E142JCTR
J28-1
Commercial
SY100E142JC
J28-1
Commercial
SY100E142JCTR
J28-1
Commercial
4
SY10E142
SY100E142
Micrel
MICREL-SYNERGY
3250 SCOTT BOULEVARD
SANTA CLARA
CA 95054
USA
TEL
+ 1 (408) 980-9191
FAX
+ 1 (408) 914-7878
WEB
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
2000 Micrel Incorporated
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