s
1000ps max. CLK to output
s
Extended 100E V
EE
range of 4.2V to 5.5V
s
SHIFT overrides HOLD, /LOAD control
s
Asynchronous Master Reset
s
Pin-compatible with E141
s
Fully compatible with industry standard 10KH,
100K ECL levels
s
Internal 75K
input pulldown resistors
s
Fully compatible with Motorola MC10E/100E241
s
Available in 28-pin PLCC package
FEATURES
8-BIT SCANNABLE
REGISTER
The SY10/100E241 are 8-bit shiftable registers designed
for use in new, high-performance ECL systems. Unlike the
E141, the E241 features internal data feedback organized
such that the SHIFT control overrides the HOLD, /LOAD
control. Thus, the normal operations of HOLD and LOAD
can be toggled with a single control line without the need for
external gating. This configuration also enables switching
to scan mode with the single SHIFT control line.
The eight inputs D
0
D
7
accept parallel input data, while
S-IN accepts serial input data when in shift mode. Data is
accepted a set-up time before the rising edge of CLK.
Shifting is also accomplished on the rising clock edge. A
HIGH on the Master Reset pin (MR) asychronously resets
all the registers to zero.
DESCRIPTION
SY10E241
SY100E241
Rev.: C
Amendment: /1
Issue Date:
February, 1998
PIN CONFIGURATION
Pin
Function
D
0
D
7
Parallel Data Inputs
S-IN
Serial Data Input
SEL
0
SHIFT Control
SEL
1
HOLD, /LOAD Control
CLK
Clock
MR
Master Reset
Q
0
Q
7
Data Outputs
V
CCO
V
CC
to Output
PIN NAMES
BLOCK DIAGRAM
TOP VIEW
PLCC
J28-1
26
27
28
1
2
3
4
18
17
16
15
14
13
12
25 24 23 22 21 20 19
5
6
7
8
9
10 11
D
3
D
2
Q
2
V
CCO
D
4
Q
0
Q
1
V
EE
D
1
SEL
1
CLK
D
0
MR
S-IN
V
CC
Q
3
NC
V
CCO
Q
4
Q
5
Q
6
NC
SEL
0
V
CCO
D
7
D
6
D
5
Q
7
R
D
S-IN
Q
R
D
Q
R
D
Q
BITS 1-6
SEL
0
(SHIFT)
CLK
MR
SEL
1
(HOLD/LOAD)
D
0
D
7
D
1
D
6
Q
0
Q
7
Q
1
Q
6
1
2
SY10E241
SY100E241
Micrel
TRUTH TABLE
SEL
0
SEL
1
Function
L
L
Load
L
H
Hold
H
X
Shift (D
n
to D
n+1
)
V
EE
= V
EE
(Min.) to V
EE
(Max.); V
CC
=
VCCO
= GND
T
A
= 0
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ. Max. Min.
Typ.
Max. Min.
Typ.
Max.
Unit
Condition
f
SHIFT
Max. Shift Frequency
700
900
--
700
900
--
700
900
--
MHz
--
t
PLH
Propagation Delay to Output
ps
--
t
PHL
CLK
625
750
975
625
750
975
625
750
975
MR
600
725
975
600
725
975
600
725
975
t
S
Set-up Time
ps
--
D
175
25
--
175
25
--
175
25
--
SEL
0
(SHIFT)350
200
--
350
200
--
350
200
--
SEL
1
(HOLD/LOAD)
400
250
--
400
250
--
400
250
--
S-IN
125
100
--
125
100
--
125
100
--
t
H
Hold Time
ps
--
D
200
25
--
200
25
--
200
25
--
SEL
0
(SHIFT)
100
200
--
100
200
--
100
200
--
SEL
1
(HOLD/LOAD)
50
250
--
50
250
--
50
250
--
S-IN
300
100
--
300
100
--
300
100
--
t
RR
Reset Recovery Time
900
600
--
900
600
--
900
600
--
ps
--
t
PW
Minimum Pulse Width
400
--
--
400
--
--
400
--
--
ps
--
CLK, MR
t
skew
Within-Device Skew
--
60
--
--
60
--
--
60
--
ps
1
t
r
Rise/Fall Time
300
525
800
300
525
800
300
525
800
ps
--
t
f
20% to 80%
AC ELECTRICAL CHARACTERISTICS
DC ELECTRICAL CHARACTERISTICS
V
EE
= V
EE
(Min.) to V
EE
(Max.); V
CC
= V
CCO
= GND
T
A
= 0
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Typ. Max. Min.
Typ.
Max. Min.
Typ.
Max.
Unit
Condition
I
IH
Input HIGH Current
--
--
150
--
--
150
--
--
150
A
--
I
EE
Power Supply Current
mA
--
10E
--
125
150
--
125
150
--
125
150
100E
--
125
150
--
125
150
--
144
173
Ordering
Package
Operating
Code
Type
Range
SY10E241JC
J28-1
Commercial
SY10E241JCTR
J28-1
Commercial
SY100E241JC
J28-1
Commercial
SY100E241JCTR
J28-1
Commercial
PRODUCT ORDERING CODE
NOTE:
1. Within-device skew is defined as identical transitions on similar paths
through a device.
4
SY10E241
SY100E241
Micrel
MICREL-SYNERGY
3250 SCOTT BOULEVARD
SANTA CLARA
CA 95054
USA
TEL
+ 1 (408) 980-9191
FAX
+ 1 (408) 914-7878
WEB
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
2000 Micrel Incorporated
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