SY88315BL
3.3V, 3.2Gbps CML Low-Power Limiting
Post Amplifier w/TTL Signal Detect
MLF and
Micro
LeadFrame are trademarks of Amkor Technology, Inc.
Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com
October 2005
M9999-101205-B
hbwhelp@micrel.com
or (408) 955-1690
General Description
The SY88315BL low-power limiting post amplifier is
designed for use in fiber-optic receivers. The device
connects to typical transimpedance amplifiers (TIAs).
The linear signal output from TIAs can contain
significant amounts of noise and may vary in amplitude
over time. The SY88315BL quantizes these signals and
outputs CML level waveforms.
The SY88315BL operates from a single +3.3V +10%
power supply, over temperatures ranging from 40
o
C to
+85
o
C. With its wide bandwidth and high gain, signals
with data rates up to 3.2Gbps and as small as 5mV
P-P
can be amplified to drive devices with CML inputs or AC-
coupled CML/PECL inputs.
The SY88315BL generates a signal-detect (SD) open-
collector TTL output. A programmable signal-detect level
set pin (SD
LVL
) sets the sensitivity of the input amplitude
detection. SD asserts high if the input amplitude rises
above the threshold set by SD
LVL
and de-asserts low
otherwise. The enable input (EN) de-asserts the true
output signal without removing the input signal. The SD
output can be fed back to the EN input to maintain
output stability under loss-of-signal condition. Typically
3.4dB SD hysteresis is provided to prevent chattering.
Data sheet and support documentation cab be found on
Micrel's web site at:
www.micrel.com
.
Features
Single 3.3V power supply
DC to 3.2Gbps operation
Low-noise CML data outputs
Chatter-free Open-Collector TTL signal detect (SD)
output with internal 4.75k pull-up resistor
TTL EN input
Internal 50 input termination
Programmable SD level set (SD
LVL
)
Ideal for multi-rate applications
Available in a tiny 10-pin EPAD MSOP and 16-pin
MLFTM package
Applications
APON/BPON, EPON, and GPON
Gigabit Ethernet
Fibre
Channel
OC-3 and OC-12/24 SONET/SDH
High-gain line driver and line receiver
Markets
FTTP
Optical transceivers
Datacom/telecom
Low-gain TIA interface
Micrel, Inc.
SY88315BL
October 2005
2
M9999-101205-B
hbwhelp@micrel.com
or (408) 955-1690
Typical Application
Pin Configuration
16-Pin MLFTM (MLF-16)
10-Pin EPAD-MSOP (K10-2)
Ordering Information
Part Number
Package
Type
Operating
Range
Package Marking
Lead
Finish
SY88315BLEY
K10-2
Industrial
SY88315BL with Pb-Free bar line indicator
Matte-Sn
SY88315BLEYTR
(1)
K10-2
Industrial
SY88315BL with Pb-Free bar line indicator
Matte-Sn
SY88315BLMG
MLF-16
Industrial
SY88315BL with Pb-Free bar line indicator
NiPdAu
Pb-Free
SY88315BLMGTR
(1)
MLF-16
Industrial
SY88315BL with Pb-Free bar line indicator
NiPdAu
Pb-Free
Note:
1. Tape and Reel.
Micrel, Inc.
SY88315BL
October 2005
3
M9999-101205-B
hbwhelp@micrel.com
or (408) 955-1690
Pin Description
Pin Number
(MSOP)
Pin Number
(MLFTM)
Pin Name
Type
Pin Function
1 15 EN
TTL Input: Default is
high.
Enable: De-asserts true data output when LOW.
2
1
DIN
Data Input
True data input w/50 termination to V
REF
.
3 4 /DIN
Data
Input
Complementary data input w/50 termination to
V
REF
.
4 6
VREF
Reference Voltage: Placing a capacitor here to V
CC
helps stabilize SD
LVL
.
5 14
SDLVL
Input: Default is
maximum sensitivity
Signal-detect Level Set: A resistor from this pin to
V
CC
sets the threshold for the data input amplitude at
which the SD output will be asserted.
6
Exposed Pad
2, 3, 10, 11
Exposed Pad
GND Ground
Device ground. Exposed pad must be connected to
PCB ground plane.
7 7 SD
Open Collector
TTL Output with
Internal 5k pull-up
Resistor
Signal-detect: Asserts high when the data input
amplitude rises above the threshold set by SD
LVL
.
8
9
/DOUT
CML Output
Complementary data output.
9
12
DOUT
CML Output
True data output.
10
5, 8, 13, 16
VCC
Power supply
Positive power supply.
Micrel, Inc.
SY88315BL
October 2005
4
M9999-101205-B
hbwhelp@micrel.com
or (408) 955-1690
Absolute Maximum Ratings
(1)
Supply Voltage (V
CC
) .................................... 0V to +4.0V
Input Voltage (DIN, /DIN) ................................... 0 to V
CC
Output Current (I
OUT
) ............................................+25mA
EN Voltage ......................................................... 0 to V
CC
V
REF
Current ...........................................................+1mA
SD
LVL
Voltage ................................................ V
REF
to V
CC
Lead Temperature (soldering, 20sec.) .................. 260C
Storage Temperature (T
s
) .....................-65C to +150C
Operating Ratings
(2)
Supply Voltage (V
CC
).................................+3.0V to +3.6V
Ambient Temperature (T
A
) .......................40C to +85C
Junction Temperature (T
J
) .....................40C to +120C
Junction Thermal Resistance
MLF
TM
(
JA
) Still-air ................................................ 61C/W
(
JB
)............................................................ 38C/W
EPAD-MSOP
(
JA
) Still-air ................................................ 38C/W
(
JB
)............................................................ 22C/W
DC Electrical Characteristics
V
CC
= 3.0V to 3.6V; R
LOAD
= 50 to V
CC
; T
A
= 40C to +85C.
Symbol Parameter
Condition
Min Typ Max Units
I
CC
Power Supply Current
No output load
47
65
mA
SD
LVL
SD
LVL
Voltage
V
REF
V
CC
V
V
OH
CML Output HIGH Voltage
V
CC
-0.020 V
CC
-0.005 V
CC
V
V
OL
CML Output LOW Voltage
V
CC
= 3.3V
V
CC
= 5.0V
V
CC
-0.475
V
CC
-0.510
V
CC
-0.400
V
CC
-0.400
V
CC
-0.350
V
CC
-0.350
V
V
V
OFFSET
Differential Output Offset
+80 mV
Z
O
Single-Ended
Output
Impedance
40 50 60
Z
I
Single-Ended Input Impedance
40
50
60
V
REF
Reference
Voltage
V
CC
-1.28
V
TTL DC Electrical Characteristics
V
CC
= 3.0V to 3.6V; R
LOAD
= 50 to V
CC
; T
A
= 40C to +85C.
Symbol Parameter
Condition
Min Typ Max Units
V
IH
EN Input HIGH Voltage
2.0
V
V
IL
EN Input LOW Voltage
0.8
V
I
IH
EN Input HIGH Current
V
IN
= 2.7V
V
IN
= V
CC
20
100
A
A
I
IL
EN Input HIGH Current
V
IN
= 0.5V
-0.3
mA
V
OH
SD Output HIGH Level
V
CC
> 3.3V, I
OH-MAX
< 160uA
V
CC
< 3.3V, I
OH-MAX
< 160uA
2.4
2.0
V
V
V
OL
SD Output LOW Level
I
OL
= +2mA
0.5
V
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential (GND) on the PCB.
JB
uses 4-layer (
JA
) in still-air-number, unless otherwise stated.
Micrel, Inc.
SY88315BL
October 2005
5
M9999-101205-B
hbwhelp@micrel.com
or (408) 955-1690
AC Electrical Characteristics
V
CC
= 3.0V to 3.6V; R
LOAD
= 50 to V
CC
; T
A
= 40C to +85C.
Symbol Parameter
Condition
Min Typ Max
Units
t
r
, t
f
Output Rise/Fall Time
(20% to 80%)
Note 4
60
120
ps
t
JITTER
Deterministic
Random
Note 5
Note 6
15
5
ps
PP
ps
RMS
V
ID
Differential Input Voltage Swing
Figure 1
5
1800
mV
PP
V
OD
Differential Output Voltage Swing
V
ID
> 18mV
PP
Figure 1
700 800
950 mV
PP
T
OFF
SD Release Time
2
10
s
T
ON
SD
Assert
Time
2
10
s
SD
AL
Low SD Assert Level
R
SDLVL
= 15k, Note 8
12
mV
PP
SD
DL
Low SD De-assert Level
R
SDLVL
= 15k, Note 8
7.8
mV
PP
HYS
L
Low SD Hysteresis
R
SDLVL
= 15k, Note 7
3.7
dB
SD
AM
Medium SD Assert Level
R
SDLVL
= 5k, Note 8
25
40
mV
PP
SD
DM
Medium SD De-assert Level
R
SDLVL
= 5k, Note 8
10
17
mV
PP
HYS
M
Medium SD Hysteresis
R
SDLVL
= 5k,
Note
7
2 3.3 5 dB
SD
AH
High SD Assert Level
R
SDLVL
= 100, Note 8
69
95
mV
PP
SD
DH
High SD De-assert Level
R
SDLVL
= 100, Note 8
30
45
mV
PP
HYS
H
High SD Hysteresis
R
SDLVL
= 100, Note 7
2
3.7
5
dB
B
-3dB
3dB
Bandwidth
2
GHz
A
V(Diff)
Differential Voltage Gain
32
38
dB
S
21
Single-ended Small-Signal Gain
26
32
dB
Notes:
4. Amplifier in limiting mode. Input is a 200MHz square wave.
5. Deterministic jitter measured using 3.2Gbps K28.5 pattern, V
ID
= 10mV
PP
.
6. Random jitter measured using 3.2Gbps K28.7 pattern, V
ID
= 10mV
PP
.
7. This specification defines electrical hysteresis as 20log(SD Assert/SD De-assert). The ratio between optical hysteresis and
electrical hysteresis is found to vary between 1.5 and 2 depending on the level of received optical power and ROSA
characteristics. Based on that ratio, the optical hysteresis corresponding to the electrical hysteresis range 2dB-5dB shown in the
AC characteristics table will be 1dB-4dB Optical Hysteresis
8. See "Typical Operating Characteristics" for a graph showing how to choose a particular R
SDLVL
for a particular SD assert and its
associated de-assert amplitude.
PDF 
ZIP