2004 Microchip Technology Inc.

DS21754E-page 1

24AA512/24LC512/24FC512

Device Selection Table

Features

· Low-power CMOS technology

- Maximum write current 5 mA at 5.5V

- Maximum read current 400

A at 5.5V

- Standby current 100 nA typical at 5.5V

· 2-wire serial interface bus, I

compatible

· Cascadable for up to eight devices

· Self-timed erase/write cycle

· 128-byte Page Write mode available

· 5 ms max. write cycle time

· Hardware write-protect for entire array

· Schmitt Trigger inputs for noise suppression

· 1,000,000 erase/write cycles

· Electrostatic discharge protection > 4000V

· Data retention > 200 years

· 8-pin PDIP, SOIC (208 mil), and DFN packages

· 14-lead TSSOP package

· Standard and Pb-free finishes available

· Temperature ranges:

Description

The Microchip Technology Inc. 24AA512/24LC512/
24FC512 (24XX512*) is a 64K x 8 (512 Kbit) Serial
Electrically Erasable PROM, capable of operation
across a broad voltage range (1.8V to 5.5V). It has
been developed for advanced, low-power applications
such as personal communications and data acquisi-
tion. This device also has a page write capability of up
to 128 bytes of data. This device is capable of both
random and sequential reads up to the 512K boundary.
Functional address lines allow up to eight devices on
the same bus, for up to 4 Mbit address space. This
device is available in the standard 8-pin plastic DIP,
SOIC, DFN and 14-lead TSSOP packages.

Block Diagram

Package Type

Part

Number

Range

Max. Clock

Frequency

Temp.

Ranges

24AA512

1.8-5.5V

400 kHz

(1)

24LC512

2.5-5.5V

400 kHz

I, E

24FC512

2.5-5.5V

1 MHz

Note 1:

100 kHz for V

< 2.5V

- Industrial (I):

-40

C to +85

- Automotive (E):

-40

C to +125

HV Generator

EEPROM

Array

Page Latches

YDEC

XDEC

Sense Amp.
R/W Control

Memory

Control

Logic

I/O

Control

Logic

I/O

A0 A1 A2

SDA

SCL

SDA

512

PDIP

SOIC

SCL

SDA

TSSOP

24X

DFN

SCL

SDA

XX5

A0
A1

SCL
SDA

24X

1
2
3
4

14
13
12

512K I

CMOS Serial EEPROM

* 24XX512 is used in this document as a generic part number for the 24AA512/24LC512/24FC512 devices.

24AA512/24LC512/24FC512

DS21754E-page 2

2004 Microchip Technology Inc.

1.0

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings

()

.............................................................................................................................................................................6.5V

All inputs and outputs w.r.t. V

......................................................................................................... -0.6V to V

+1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temperature with power applied ................................................................................................-40°C to +125°C

ESD protection on all pins

......................................................................................................................................................

4 kV

TABLE 1-1:

DC CHARACTERISTICS

NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.

DC CHARACTERISTICS

Electrical Characteristics:
Industrial (I):

= +1.8V to 5.5V

= -40°C to +85°C

Automotive (E):

= +2.5V to 5.5V

= -40°C to +125°C

Param.

No.

Sym

Characteristic

Min

Max

Units

Conditions

A0, A1, A2, SCL, SDA
and WP pins:

High-level input voltage

0.7 V

Low-level input voltage

0.3 V

0.2 V

V
V

2.5V

< 2.5V

HYS

Hysteresis of Schmitt
Trigger inputs
(SDA, SCL pins)

0.05 V

2.5V (Note)

Low-level output voltage

0.40

= 3.0 ma @ V

= 4.5V

= 2.1 ma @ V

= 2.5V

Input leakage current

±1

= V

or V

, WP = V

= V

or V

, WP = V

Output leakage current

±1

OUT

= V

or V

OUT

Pin capacitance
(all inputs/outputs)

= 5.0V (Note)

= 25°C, f

= 1 MHz

Read Operating current

400

= 5.5V, SCL = 400 kHz

Write

= 5.5V

D10

CCS

Standby current

= -40°C to +85°C

SCL = SDA = V

= 5.5V

A0, A1, A2, WP = V

= -40°C to +125°C

SCL = SDA = V

= 5.5V

A0, A1, A2, WP = V

Note:

This parameter is periodically sampled and not 100% tested.

2004 Microchip Technology Inc.

DS21754E-page 3

24AA512/24LC512/24FC512

TABLE 1-2:

AC CHARACTERISTICS

Electrical Characteristics:
Industrial (I):

= +1.8V to 5.5V

= -40°C to +85°C

Automotive (E):

= +2.5V to 5.5V

= -40°C to +125°C

Param.

No.

Sym

Characteristic

Min

Max

Units

Conditions

CLK

Clock frequency

--
--
--

100
400

1000

kHz

1.8V

2.5V

5.5V

2.5V

5.5V 24FC512

HIGH

Clock high time

4000

600
500

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V 24FC512

LOW

Clock low time

4700
1300

500

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V 24FC512

SDA and SCL rise time (Note 1)

--
--
--

1000

300
300

1.8V

< 2.5V

2.5V

5.5V

2.5V

5.5V 24FC512

SDA and SCL fall time (Note 1)

--
--

300
100

All except, 24FC512
2.5V

5.5V 24FC512

STA

Start condition hold time

4000

600
250

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V 24FC512

STA

Start condition setup time

4700

600
250

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V 24FC512

DAT

Data input hold time

(Note 2)

DAT

Data input setup time

250
100
100

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V 24FC512

STO

Stop condition setup time

4000

600
250

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V 24FC512

WP setup time

4000

600
600

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V 24FC512

WP hold time

4700
1300
1300

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V 24FC512

Output valid from clock (Note 2)

--
--
--

3500

900
400

1.8V

2.5V

5.5V

2.5V

5.5V 24FC512

BUF

Bus free time: Time the bus must
be free before a new transmis-
sion can start

4700
1300

500

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V 24FC512

Input filter spike suppression
(SDA and SCL pins)

All except, 24FC512 (Notes 1 and 3)

Write cycle time (byte or page)

Endurance

1,000,000

cycles

25°C (Note 4)

Note

Not 100% tested. C

= total capacitance of one bus line in pF.

As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

The combined T

and V

HYS

specifications are due to new Schmitt Trigger inputs which provide improved noise spike

suppression. This eliminates the need for a T

specification for standard operation.

This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please
consult the Total EnduranceTM Model which can be obtained from Microchip's web site: www.microchip.com.

2004 Microchip Technology Inc.

DS21754E-page 5

24AA512/24LC512/24FC512

2.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.

TABLE 2-1:

PIN FUNCTION TABLE

2.1

A0, A1 and A2 Chip Address
Inputs

The A0, A1 and A2 inputs are used by the 24XX512 for
multiple device operations. The logic levels on these
inputs are compared with the corresponding bits in the
slave address. The chip is selected if the compare is
true.

Up to eight devices may be connected to the same bus
by using different Chip Select bit combinations. If these
pins are left unconnected, the inputs will be pulled
down internally to V

. If they are tied to V

or driven

high, the internal pull-down circuitry is disabled.

In most applications, the chip address inputs A0, A1,
and A2 are hard-wired to logic `

' or logic `

'. For

applications in which these pins are controlled by a
microcontroller or other programmable logic device,
the chip address pins must be driven to logic `

' or logic

' before normal device operation can proceed.

2.2

Serial Data (SDA)

This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open-
drain terminal, therefore, the SDA bus requires a pull-
up resistor to V

(typical 10 k

for 100 kHz, 2 k

for

400 kHz and 1 MHz).

For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.

2.3

Serial Clock (SCL)

This input is used to synchronize the data transfer from
and to the device.

2.4

Write-Protect (WP)

This pin can be connected to either V

or V

Internal pull-down circuitry on this pin will keep the
device in the unprotected state if left floating, however,
floating this pin is not recommended for most
applications. If tied to V

, normal memory operation is

enabled (read/write the entire memory 0000-FFFF).

If tied to V

, write operations are inhibited. Read

operations are not affected.

3.0

FUNCTIONAL DESCRIPTION

The 24XX512 supports a bidirectional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as a transmitter and a device
receiving data as a receiver. The bus must be
controlled by a master device which generates the
serial clock (SCL), controls the bus access and
generates the Start and Stop conditions, while the
24XX512 works as a slave. Both master and slave
can operate as a transmitter or receiver, but the
master device determines which mode is activated.

Name

PDIP

SOIC

14-lead
TSSOP

DFN

Function

User Configured Chip Select

(NC)

3, 4, 5

Not Connected

User Configured Chip Select

Ground

SDA

Serial Data

SCL

Serial Clock

(NC)

10, 11, 12

Not Connected

Write-Protect Input

+1.8V to 5.5V (24AA512)
+2.5V to 5.5V (24LC512)
+2.5V to 5.5V (24FC512)

24AA512/24LC512/24FC512

DS21754E-page 6

2004 Microchip Technology Inc.

4.0

BUS CHARACTERISTICS

The following bus protocol has been defined:

· Data transfer may be initiated only when the bus

is not busy.

· During data transfer, the data line must remain

stable whenever the clock line is high. Changes in
the data line, while the clock line is high, will be
interpreted as a Start or Stop condition.

Accordingly, the following bus conditions have been
defined (Figure 4-1).

4.1

Bus Not Busy (A)

Both data and clock lines remain high.

4.2

Start Data Transfer (B)

A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.

4.3

Stop Data Transfer (C)

A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must end with a Stop condition.

4.4

Data Valid (D)

The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.

The data on the line must be changed during the low
period of the clock signal. There is one bit of data per
clock pulse.

Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of the
data bytes transferred between the Start and Stop
conditions is determined by the master device.

4.5

Acknowledge

Each receiving device, when addressed, is obliged to
generate an Acknowledge signal after the reception of
each byte. The master device must generate an extra
clock pulse which is associated with this Acknowledge
bit. See Figure 4-2 for acknowledge timing.

A device that acknowledges must pull down the SDA
line during the Acknowledge clock pulse in such a way
that the SDA line is stable low during the high period of
the acknowledge related clock pulse. Of course, setup
and hold times must be taken into account. During
reads, a master must signal an end of data to the slave
by NOT generating an Acknowledge bit on the last byte
that has been clocked out of the slave. In this case, the
slave (24XX512) will leave the data line high to enable
the master to generate the Stop condition.

Note:

The 24XX512 does not generate any
Acknowledge bits if an internal programming
cycle is in progress.

24AA512/24LC512/24FC512

DS21754E-page 8

2004 Microchip Technology Inc.

5.0

DEVICE ADDRESSING

A control byte is the first byte received following the
Start condition from the master device (Figure 5-1).
The control byte consists of a 4-bit control code; for the
24XX512 this is set as `

1010

binary for read and write

operations. The next three bits of the control byte are
the Chip Select bits (A2, A1 and A0). The Chip Select
bits allow the use of up to eight 24XX512 devices on
the same bus and are used to select which device is
accessed. The Chip Select bits in the control byte must
correspond to the logic levels on the corresponding A2,
A1 and A0 pins for the device to respond. These bits
are in effect the three Most Significant bits of the word
address.

The last bit of the control byte defines the operation to
be performed. When set to a one a read operation is
selected and when set to a zero a write operation is
selected. The next two bytes received define the
address of the first data byte (Figure 5-2). Because all
A15...A0 are used, there are no upper address bits that
are "don't care". The upper address bits are transferred
first, followed by the Less Significant bits.

Following the Start condition, the 24XX512 monitors
the SDA bus checking the device type identifier being
transmitted. Upon receiving a `

1010

code and appro-

priate device select bits, the slave device outputs an
Acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24XX512 will select a read or
write operation.

FIGURE 5-1:

CONTROL BYTE FORMAT

5.1

Contiguous Addressing Across
Multiple Devices

The Chip Select bits A2, A1 and A0 can be used to
expand the contiguous address space for up to 4 Mbit
by adding up to eight 24XX512s on the same bus. In
this case, software can use A0 of the control byte as
address bit A16; A1, as address bit A17; and A2, as
address bit A18. It is not possible to sequentially read
across device boundaries.

FIGURE 5-2:

ADDRESS SEQUENCE BIT ASSIGNMENTS

ACK

R/W

Control Code

Chip Select

Bits

Slave Address

Acknowledge Bit

Start Bit

Read/Write Bit

0 R/W

CONTROL BYTE

ADDRESS HIGH BYTE

ADDRESS LOW BYTE

CONTROL

CODE

CHIP

SELECT

BITS

2004 Microchip Technology Inc.

DS21754E-page 9

24AA512/24LC512/24FC512

6.0

WRITE OPERATIONS

6.1

Byte Write

Following the Start condition from the master, the
control code (four bits), the Chip Select (three bits) and
the R/W bit (which is a logic low) are clocked onto the
bus by the master transmitter. This indicates to the
addressed slave receiver that the address high byte will
follow after it has generated an Acknowledge bit during
the ninth clock cycle. Therefore, the next byte
transmitted by the master is the high-order byte of the
word address and will be written into the address
pointer of the 24XX512. The next byte is the Least
Significant Address byte. After receiving another
Acknowledge signal from the 24XX512, the master
device will transmit the data word to be written into the
addressed memory location. The 24XX512 acknowl-
edges again and the master generates a Stop
condition. This initiates the internal write cycle and
during this time, the 24XX512 will not generate
Acknowledge signals (Figure 6-1). If an attempt is
made to write to the array with the WP pin held high, the
device will acknowledge the command, but no write
cycle will occur, no data will be written and the device
will immediately accept a new command. After a byte
Write command, the internal address counter will point
to the address location following the one that was just
written.

6.2

Page Write

The write control byte, word address and the first data
byte are transmitted to the 24XX512 in the same way
as in a byte write. But instead of generating a Stop
condition, the master transmits up to 127 additional
bytes, which are temporarily stored in the on-chip page
buffer and will be written into memory after the master
has transmitted a Stop condition. After receipt of each
word, the seven lower address pointer bits are inter-
nally incremented by one. If the master should transmit
more than 128 bytes prior to generating the Stop con-
dition, the address counter will roll over and the previ-
ously received data will be overwritten. As with the byte
write operation, once the Stop condition is received, an
internal write cycle will begin (Figure 6-2). If an attempt
is made to write to the array with the WP pin held high,
the device will acknowledge the command, but no write
cycle will occur, no data will be written and the device
will immediately accept a new command.

6.3

Write Protection

The WP pin allows the user to write-protect the entire
array (0000-FFFF) when the pin is tied to V

. If tied to

or left floating, the write protection is disabled. The

WP pin is sampled at the Stop bit for every Write
command (Figure 1-1). Toggling the WP pin after the
Stop bit will have no effect on the execution of the write
cycle.

Note:

Page write operations are limited to writing
bytes within a single physical page,
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size (or
`page size') and end at addresses that are
integer multiples of [page size - 1]. If a
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.

2004 Microchip Technology Inc.

DS21754E-page 11

24AA512/24LC512/24FC512

7.0

ACKNOWLEDGE POLLING

Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the master
sending a Start condition, followed by the control byte
for a Write command (R/W =

). If the device is still

busy with the write cycle, then no ACK will be returned.
If no ACK is returned, then the Start bit and control byte
must be resent. If the cycle is complete, then the device
will return the ACK and the master can then proceed
with the next Read or Write command. See Figure 7-1
for flow diagram.

FIGURE 7-1:

ACKNOWLEDGE POLLING
FLOW

Send

Write Command

Send Stop

Condition to

Initiate Write Cycle

Send Start

Send Control Byte

with R/W =

Did Device

Acknowledge

(ACK =

Operation

YES

24AA512/24LC512/24FC512

DS21754E-page 12

2004 Microchip Technology Inc.

8.0

READ OPERATION

Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
control byte is set to `

'. There are three basic types of

read operations: current address read, random read
and sequential read.

8.1

Current Address Read

The 24XX512 contains an address counter that main-
tains the address of the last word accessed, internally
incremented by `

'. Therefore, if the previous read

access was to address n (n is any legal address), the
next current address read operation would access data
from address n + 1.

Upon receipt of the control byte with R/W bit set to `

the 24XX512 issues an acknowledge and transmits the
8-bit data word. The master will not acknowledge the
transfer but does generate a Stop condition and the
24XX512 discontinues transmission (Figure 8-1).

FIGURE 8-1:

CURRENT ADDRESS
READ

8.2

Random Read

Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
24XX512 as part of a write operation (R/W bit set to
`

'). After the word address is sent, the master

generates a Start condition following the acknowledge.
This terminates the write operation, but not before the
internal address pointer is set. Then, the master issues
the control byte again but with the R/W bit set to a one.
The 24XX512 will then issue an acknowledge and
transmit the 8-bit data word. The master will not
acknowledge the transfer but does generate a Stop
condition which causes the 24XX512 to discontinue
transmission (Figure 8-2). After a random Read
command, the internal address counter will point to the
address location following the one that was just read.

8.3

Sequential Read

Sequential reads are initiated in the same way as a
random read except that after the 24XX512 transmits
the first data byte, the master issues an acknowledge
as opposed to the Stop condition used in a random
read. This acknowledge directs the 24XX512 to
transmit the next sequentially addressed 8-bit word
(Figure 8-3). Following the final byte transmitted to the
master, the master will NOT generate an acknowledge,
but will generate a Stop condition. To provide
sequential reads, the 24XX512 contains an internal
address pointer which is incremented by one at the
completion of each operation. This address pointer
allows the entire memory contents to be serially read
during one operation. The internal address pointer will
automatically roll over from address FFFF to address
0000 if the master acknowledges the byte received
from the array address FFFF.

FIGURE 8-2:

RANDOM READ

BUS ACTIVITY
MASTER

SDA LINE

BUS ACTIVITY

S
T
O
P

CONTROL

BYTE

S
T
A
R
T

DATA

A
C
K

N
O

A
C
K

0 A A A 1

BYTE

2 1 0

BUS ACTIVITY
MASTER

SDA LINE

BUS ACTIVITY

A
C
K

N
O
A
C
K

A
C
K

S
T
O
P

T
A
R
T

CONTROL

BYTE

ADDRESS

HIGH BYTE

ADDRESS

LOW BYTE

CONTROL

BYTE

DATA

BYTE

T
A
R
T

X = Don't Care Bit

S 1 0 1 0 A A A 0

2 1 0

S 1 0 1 0 A A A 1

2 1 0

24AA512/24LC512/24FC512

DS21754E-page 14

2004 Microchip Technology Inc.

9.0

PACKAGING INFORMATION

9.1

Package Marking Information

XXXXXXXX
T/XXXNNN

YYWW

8-Lead PDIP (300 mil)

Example:

8-Lead SOIC (208 mil)

Example:

24LC512

0310017

I/SM

24AA512
I/P017

0310

XXXXXXXX

YYWWNNN

T/XXXXXX

8-Lead DFN-S

Example

XXXXXXX

T/XXXXX

YYWW

24LC512

I/MF

0310

017

NNN

14-Lead TSSOP

Example

XXXXXXXT

YYWW

NNN

24LC512I

0310

017

Legend:

XX...X

Customer specific information*

Temperature grade (I, E)

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week `01')

NNN

Alphanumeric traceability code

Note:In the event the full Microchip part number cannot be marked on one line, it will be
carried over to the next line thus limiting the number of available characters for customer
specific information.

*Standard device marking consists of Microchip part number, year code, week code, and traceability code. For
device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office.

2004 Microchip Technology Inc.

DS21754E-page 15

24AA512/24LC512/24FC512

8-Lead Plastic Dual In-line (P) 300 mil (PDIP)

Units

INCHES*

MILLIMETERS

Dimension Limits

MIN

NOM

MAX

MIN

NOM

MAX

Number of Pins

Pitch

.100

2.54

Top to Seating Plane

.140

.155

.170

3.56

3.94

4.32

Molded Package Thickness

.115

.130

.145

2.92

3.30

3.68

Base to Seating Plane

.015

0.38

Shoulder to Shoulder Width

.300

.313

.325

7.62

7.94

8.26

Molded Package Width

.240

.250

.260

6.10

6.35

6.60

Overall Length

.360

.373

.385

9.14

9.46

9.78

Tip to Seating Plane

.125

.130

.135

3.18

3.30

3.43

Lead Thickness

.008

.012

.015

0.20

0.29

0.38

Upper Lead Width

.045

.058

.070

1.14

1.46

1.78

Lower Lead Width

.014

.018

.022

0.36

0.46

0.56

Overall Row Spacing

.310

.370

.430

7.87

9.40

10.92

Mold Draft Angle Top

Mold Draft Angle Bottom

* Controlling Parameter

Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

JEDEC Equivalent: MS-001
Drawing No. C04-018

.010" (0.254mm) per side.

§ Significant Characteristic

24AA512/24LC512/24FC512

DS21754E-page 16

2004 Microchip Technology Inc.

8-Lead Plastic Small Outline (SM) Medium, 208 mil (SOIC)

Foot Angle

Mold Draft Angle Bottom

Mold Draft Angle Top

0.51

0.43

0.36

.020

.017

.014

Lead Width

0.25

0.23

0.20

.010

.009

.008

Lead Thickness

0.76

0.64

0.51

.030

.025

.020

Foot Length

5.33

5.21

5.13

.210

.205

.202

Overall Length

5.38

5.28

5.11

.212

.208

.201

Molded Package Width

8.26

7.95

7.62

.325

.313

.300

Overall Width

0.25

0.13

0.05

.010

.005

.002

Standoff

1.98

.078

Molded Package Thickness

2.03

.080

Overall Height

1.27

.050

Pitch

Number of Pins

MAX

NOM

MIN

MAX

NOM

MIN

Dimension Limits

MILLIMETERS

INCHES*

Units

.070

.075

.069

.074

1.78

1.75

1.97

1.88

* Controlling Parameter

Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010" (0.254mm) per side.
Drawing No. C04-056

§ Significant Characteristic

24AA512/24LC512/24FC512

DS21754E-page 18

2004 Microchip Technology Inc.

14-Lead Plastic Thin Shrink Small Outline (ST) 4.4 mm (TSSOP)

Foot Angle

Mold Draft Angle Bottom

Mold Draft Angle Top

0.30

0.25

0.19

.012

.010

.007

Lead Width

0.20

0.15

0.09

.008

.006

.004

Lead Thickness

0.70

0.60

0.50

.028

.024

.020

Foot Length

5.10

5.00

4.90

.201

.197

.193

Molded Package Length

4.50

4.40

4.30

.177

.173

.169

Molded Package Width

6.50

6.38

6.25

.256

.251

.246

Overall Width

0.15

0.10

0.05

.006

.004

.002

Standoff

0.95

0.90

0.85

.037

.035

.033

Molded Package Thickness

1.10

.043

Overall Height

0.65

.026

Pitch

Number of Pins

MAX

NOM

MIN

MAX

NOM

MIN

Dimension Limits

MILLIMETERS*

INCHES

Units

* Controlling Parameter

Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005" (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-087

§ Significant Characteristic

2004 Microchip Technology Inc.

DS21754E-page 21

24AA512/24LC512/24FC512

ON-LINE SUPPORT

Microchip provides on-line support on the Microchip
World Wide Web site.

The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape

or Microsoft

Internet Explorer. Files are also available for FTP
download from our FTP site.

Connecting to the Microchip Internet
Web Site

The Microchip web site is available at the following
URL:

www.microchip.com

The file transfer site is available by using an FTP
service to connect to:

ftp://ftp.microchip.com

The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A vari-
ety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:

· Latest Microchip Press Releases

· Technical Support Section with Frequently Asked

Questions

· Design Tips

· Device Errata

· Job Postings

· Microchip Consultant Program Member Listing

· Links to other useful web sites related to

Microchip Products

· Conferences for products, Development Systems,

technical information and more

· Listing of seminars and events

SYSTEMS INFORMATION AND
UPGRADE HOT LINE

The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive the most current upgrade kits. The Hot Line
Numbers are:

1-800-755-2345 for U.S. and most of Canada, and

1-480-792-7302 for the rest of the world.

042003

24AA512/24LC512/24FC512

DS21754E-page 22

2004 Microchip Technology Inc.

READER RESPONSE

It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.

Please list the following information, and use this outline to provide us with your comments about this document.

To:

Technical Publications Manager

RE:

Reader Response

Total Pages Sent ________

From: Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

Application (optional):

Would you like a reply? Y N

Device: Literature

Number:

Questions:

FAX: (______) _________ - _________

DS21754E

24AA512/24LC512/24FC512

What are the best features of this document?

How does this document meet your hardware and software development needs?

Do you find the organization of this document easy to follow? If not, why?

What additions to the document do you think would enhance the structure and subject?

What deletions from the document could be made without affecting the overall usefulness?

Is there any incorrect or misleading information (what and where)?

How would you improve this document?

2004 Microchip Technology Inc.

DS21754E-page 23

24AA512/24LC512/24FC512

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office

Sales and Support

Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:

Your local Microchip sales office

The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277

The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.

New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.

PART NO.

/XX

Package

Temperature

Range

Device

Device:

24AA512:

512 Kbit 1.8V I

C Serial

EEPROM

24AA512T:

512 Kbit 1.8V I

C Serial

EEPROM (Tape and Reel)

24LC512:

512 Kbit 2.5V I

C Serial

EEPROM

24LC512T:

512 Kbit 2.5V I

C Serial

EEPROM (Tape and Reel)

24FC512:

512 Kbit 1 MHz I

C Serial

EEPROM

24FC512T:

512 Kbit 1 MHz I

C Serial

EEPROM (Tape and Reel)

Temperature
Range:

-40

C to +85

-40

C to +125

Package:

= Plastic DIP (300 mil body), 8-lead

= Plastic SOIC (208 mil body), 8-lead

ST14 = Plastic TSSOP (4.4 mm), 14-lead
MF

= Micro Lead Frame (6x5 mm body),

8-lead

Lead Finish

Blank = Standard 63%/37% Sn/Pb
G

= Pb-free (Pure Matte Sn)

Examples:

24AA512-I/P:

Industrial Temp.,

1.8V, PDIP package.

24AA512T-I/SM: Tape and Reel,
Industrial Temp., 1.8V, SOIC
package.

24AA512-I/ST14: Industrial Temp.,
1.8V, 14-lead, TSSOP package.

24AA512-I/MF:

Industrial Temp.,

1.8V, DFN package.

24LC512-E/P:

Extended Temp.,

2.5V, PDIP package.

24LC512-I/SM:

Industrial Temp.,

2.5V, SOIC package.

24LC512T-I/SM: Tape and Reel,
Industrial Temp., 2.5V, SOIC
package.

24LC512-I/MF:

Industrial Temp.,

2.5V, DFN package.

24FC512-I/P:

Industrial Temp.,

2.5V, High Speed, PDIP package.

24FC512-I/SM:

Industrial Temp.,

2.5V, High Speed, SOIC package.

24FC512T-I/SM: Tape and Reel,
Industrial Temp., 2.5V, High Speed,
SOIC package

24LC512T-I/SM: Industrial Temp.,
2.5V, SOIC package, Tape & Reel,
Pb-free

m) 24LC512-I/PG:

Industrial Temp.,

2.5V, PDIP package, Pb-free

Lead

Finish

2004 Microchip Technology Inc.

DS21754E-page 25

Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip's products as critical
components in life support systems is not authorized except
with express written approval by Microchip. No licenses are
conveyed, implicitly or otherwise, under any intellectual
property rights.

Trademarks

The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, K

, micro

, MPLAB, PIC, PICmicro, PICSTART,

PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.

AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL,
SmartSensor and The Embedded Control Solutions Company
are registered trademarks of Microchip Technology
Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Migratable Memory, MPASM,
MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,
PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,
PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,
SmartTel and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.

All other trademarks mentioned herein are property of their
respective companies.

Printed on recycled paper.

Note the following details of the code protection feature on Microchip devices:

Microchip products meet the specification contained in their particular Microchip Data Sheet.

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as "unbreakable."

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company's quality system processes and
procedures are for its PICmicro

8-bit MCUs, K

code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip's quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.

DS21754E-page 26

2004 Microchip Technology Inc.

AMERICAS

Corporate Office

2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com

Atlanta

3780 Mansell Road, Suite 130
Alpharetta, GA 30022
Tel: 770-640-0034
Fax: 770-640-0307

Boston

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Westford, MA 01886
Tel: 978-692-3848
Fax: 978-692-3821

Chicago

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Tel: 630-285-0071
Fax: 630-285-0075

Dallas

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Tel: 972-818-7423
Fax: 972-818-2924

Detroit

Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
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Tel: 248-538-2250
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Kokomo

2767 S. Albright Road
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Los Angeles

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Toronto

6285 Northam Drive, Suite 108
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Tel: 905-673-0699
Fax: 905-673-6509

ASIA/PACIFIC

Australia

Suite 22, 41 Rawson Street
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Tel: 61-2-9868-6733
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China - Beijing

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Tel: 86-10-85282100
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Rm. 2401-2402, 24th Floor,
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China - Fuzhou

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Tel: 86-591-7503506
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China - Hong Kong SAR

Unit 901-6, Tower 2, Metroplaza
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Tel: 852-2401-1200
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China - Shanghai

Room 701, Bldg. B
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China - Shenzhen

Rm. 1812, 18/F, Building A, United Plaza
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Tel: 86-755-82901380
Fax: 86-755-8295-1393

China - Shunde

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Tel: 86-757-28395507 Fax: 86-757-28395571

China - Qingdao

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Korea

168-1, Youngbo Bldg. 3 Floor
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82-2-558-5934

Singapore

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Taiwan

Taiwan Branch
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EUROPE

Austria

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Denmark

Regus Business Centre
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France

Parc d'Activite du Moulin de Massy
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Germany

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Italy

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Netherlands

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United Kingdom

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Tel: 44-118-921-5869
Fax: 44-118-921-5820

02/17/04

ORLDWIDE

ALES

AND

ERVICE

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Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: 24AA512

Document Outline

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