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Электронный компонент: PIC18F8721

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2004 Microchip Technology Inc.
DS39627A-page 1
PIC18F6625/6721/8625/8721
Power Managed Modes:
Run: CPU on, peripherals on
Idle: CPU off, peripherals on
Sleep: CPU off, peripherals off
Idle mode currents down to 5.8
A typical
Sleep current down to 0.1
A typical
Timer1 Oscillator: 1.8
A, 32 kHz, 2V
Watchdog Timer: 2.1
A
Two-Speed Oscillator Start-up
Flexible Oscillator Structure:
Four Crystal modes, up to 40 MHz
4X Phase Lock Loop (available for crystal and
internal oscillators)
Two External RC modes, up to 4 MHz
Two External Clock modes, up to 40 MHz
Internal oscillator block:
- 8 user selectable frequencies, from 31 kHz to 8 MHz
- Provides a complete range of clock speeds from
31 kHz to 32 MHz when used with PLL
- User tunable to compensate for frequency drift
Secondary oscillator using Timer1 @ 32 kHz
Fail-Safe Clock Monitor:
- Allows for safe shutdown if peripheral clock stops
External Memory Interface
(PIC18F8625/8721 only):
Address capability of up to 2 Mbytes
8-bit or 16-bit interface
Peripheral Highlights:
High current sink/source 25 mA/25 mA
Four programmable external interrupts
Four input change interrupts
Two Capture/Compare/PWM (CCP) modules
Peripheral Highlights (Continued):
Three Enhanced Capture/Compare/PWM (ECCP)
modules:
- One, two or four PWM outputs
- Selectable polarity
- Programmable dead-time
- Auto-Shutdown and Auto-Restart
Two Master Synchronous Serial Port (MSSP)
modules supporting 3-wire SPITM (all 4 modes) and
I
2
CTM Master and Slave modes
Two Enhanced Addressable USART modules:
- Supports RS-485, RS-232 and LIN 1.2
- RS-232 operation using internal oscillator block
(no external crystal required)
- Auto-wake-up on Start bit
- Auto-baud detect
10-bit, up to 16-channel Analog-to-Digital Converter
module (A/D)
- Auto-acquisition capability
- Conversion available during Sleep
Dual analog comparators with input multiplexing
Special Microcontroller Features:
C compiler optimized architecture:
- Optional extended instruction set designed to
optimize re-entrant code
100,000 erase/write cycle Enhanced Flash program
memory typical
1,000,000 erase/write cycle Data EEPROM memory
typical
Flash/Data EEPROM Retention: 100 years typical
Self-programmable under software control
Priority levels for interrupts
8 X 8 Single Cycle Hardware Multiplier
Extended Watchdog Timer (WDT):
- Programmable period from 4 ms to 131s
Single-supply 5V In-Circuit Serial ProgrammingTM
(ICSPTM) via two pins
In-Circuit Debug (ICD) via two pins
Wide operating voltage range: 2.0V to 5.5V
Device
Program Memory
Data Memory
I/O
10-bit
A/D (ch)
CCP/
ECCP
(PWM)
MSSP
EU
S
A
R
T
Co
mp
a
r
ato
r
s
T
i
me
rs
8
/
16-
b
i
t
Ex
ter
n
al B
u
s
Flash
(bytes)
# Single-
Word
Instructions
SRAM
(bytes)
EEPROM
(bytes)
SPI
Master
I
2
C
PIC18F6625
96 K
49152
3936
1024
54
12
2/3
2
Y
Y
2
2
2/3
N
PIC18F6721
128 K
65536
3936
1024
54
12
2/3
2
Y
Y
2
2
2/3
N
PIC18F8625
96 K
49152
3936
1024
70
16
2/3
2
Y
Y
2
2
2/3
Y
PIC18F8721
128 K
65536
3936
1024
70
16
2/3
2
Y
Y
2
2
2/3
Y
64/80-Pin High-Performance, 1-Mbit Enhanced Flash
Microcontrollers with A/D and nanoWatt Technology
background image
PIC18F6625/6721/8625/8721
DS39627A-page 2
2004 Microchip Technology Inc.
Pin Diagrams
Note 1:
RB3 is the alternate pin for ECCP2/P2A multiplexing.
PIC18F6625
1
2
3
4
5
6
7
8
9
10
11
12
13
14
38
37
36
35
34
33
50 49
17 18 19 20 21 22 23 24 25 26
RE2
/
CS
/P
2B
RE3
/
P3
C
RE4
/
P3
B
RE5
/
P1
C
RE6
/
P1
B
RE7
/
ECCP2
(1
)
/P
2
A
(1
)
RD0
/
PSP0
V
DD
V
SS
RD1
/
PSP1
RD2
/
PSP2
RD3
/
PSP3
RD4
/
PSP4
/
S
DO
2
RD5
/
PSP5
/
S
DI
2
/
SDA2
RD6
/
PSP6
/
S
CK2
/
SCL
2
RD7
/
PSP7
/
SS2
RE1/WR/P2C
RE0/RD/P2D
RG0/ECCP3/P3A
RG1/TX2/CK2
RG2/RX2/DT2
RG3/CCP4/P3D
RG5/MCLR/V
PP
RG4/CCP5/P1D
V
SS
V
DD
RF7/SS1
RF6/AN11
RF5/AN10/CV
REF
RF4/AN9
RF3/AN8
RF2/AN7/C1OUT
RB0/INT0
RB1/INT1
RB2/INT2
RB3/INT3
RB4/KBI0
RB5/KBI1/PGM
RB6/KBI2/PGC
V
SS
RA6/OSC2/CLKO
RA7/OSC1/CLKI
V
DD
RB7/KBI3/PGD
RC4/SDI1/SDA1
RC3/SCK1/SCL1
RC2/ECCP1/P1A
RF
0
/
A
N
5
RF
1
/
AN6
/
C2
OUT
AV
DD
AV
SS
RA3
/
A
N
3
/
V
RE
F
+
R
A
2/A
N
2/
V
RE
F
-
RA1
/
A
N
1
RA0
/
A
N
0
V
SS
V
DD
RA4
/
T
0
CKI
R
A
5/A
N
4/
L
V
D
I
N
RC1
/T
1
O
SI
/ECCP2
(1
)
/P
2A
(1
)
RC0
/T
1
O
S
O/T
13
CK
I
RC7/RX
1
/DT
1
R
C
6
/T
X
1
/C
K
1
RC5/SDO1
15
16
31
40
39
27 28 29 30
32
48
47
46
45
44
43
42
41
54 53 52 51
58 57 56 55
60 59
64 63 62 61
64-Pin TQFP
PIC18F6721
background image
2004 Microchip Technology Inc.
DS39627A-page 3
PIC18F6625/6721/8625/8721
Pin Diagrams (Continued)
PIC18F8625
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
64 63 62 61
21 22 23 24 25 26 27 28 29 30 31 32
RE2
/
A
D
1
0
/CS
/P
2B
R
E
3/
A
D
1
1
/P
3C
(2
)
R
E
4
/
A
D
12
/
P
3B
(2
)
R
E
5
/
A
D
13
/
P
1C
(2
)
R
E
6
/
A
D
14
/
P
1B
(2
)
RE7
/
A
D
1
5
/ECCP2
(1
)
/P
2
A
(1
)
RD0
/
A
D0
/
PSP0
V
DD
V
SS
RD1
/
A
D1
/
PSP1
RD2
/
A
D2
/
PSP2
RD3
/
A
D3
/
PSP3
RD4
/
A
D4
/
PSP4
/
S
DO
2
RD5
/
A
D5
/
PSP5
/
S
DI
2
/
SDA2
RD6
/
A
D6
/
PSP6
/
S
CK2
/
SCL
2
RD7
/
A
D7
/
PSP7
/
SS2
RE1/AD9/WR/P2C
RE0/AD8/RD/P2D
RG0/ECCP3/P3A
RG1/TX2/CK2
RG2/RX2/DT2
RG3/CCP4/P3D
RG5/MCLR/V
PP
RG4/CCP5/P1D
V
SS
V
DD
RF7/SS1
RB0/INT0
RB1/INT1
RB2/INT2
RB3/INT3/ECCP2
(1)
/P2A
(1)
RB4/KBI0
RB5/KBI1/PGM
RB6/KBI2/PGC
V
SS
RA6/OSC2/CLKO
RA7/OSC1/CLKI
V
DD
RB7/KBI3/PGD
RC4/SDI1/SDA1
RC3/SCK1/SCL1
RC2/ECCP1/P1A
RF
0
/
AN5
RF
1
/
AN6
/
C2
OUT
AV
DD
AV
SS
RA3
/
AN3
/
V
RE
F
+
RA2
/
AN2
/
V
RE
F
-
RA1
/
AN1
RA0
/
AN0
V
SS
V
DD
RA4
/
T
0
CKI
RA5
/
AN4
/
L
V
DIN
RC1
/T
1
O
SI/ECCP2
(1
)
/P
2A
(1
)
R
C
0/T
1
OS
O
/
T1
3C
K
I
RC7
/
R
X1
/DT
1
RC6
/T
X
1
/CK
1
RC5/SDO1
RJ0
/
AL
E
RJ1
/OE
RH1
/A1
7
RH
0
/
A
1
6
1
2
RH2/A18
RH3/A19
17
18
RH7/AN15/P1B
(2)
RH6/AN14/P1C
(2)
R
H
5/A
N
13
/P
3B
(2
)
RH4
/AN1
2
/
P3
C
(2
)
RJ
5
/
CE
RJ
4
/
BA0
37
RJ7/UB
RJ6/LB
50
49
RJ2/WRL
RJ3/WRH
19
20
33 34 35 36
38
58
57
56
55
54
53
52
51
60
59
68 67 66 65
72 71 70 69
74 73
78 77 76 75
79
80
80-Pin TQFP
Note 1:
The ECCP2/P2A pin placement is determined by the CCP2MX configuration bit and Processor Mode settings.
2:
P1B, P1C, P3B and P3C pin placement is determined by the ECCPMX configuration bit.
RF5/AN10/CV
REF
RF4/AN9
RF3/AN8
RF2/AN7/C1OUT
RF6/AN11
PIC18F8721
background image
PIC18F6625/6721/8625/8721
DS39627A-page 4
2004 Microchip Technology Inc.
NOTES:
background image
DS39627A-page 5
2004 Microchip Technology Inc.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip's products as critical
components in life support systems is not authorized except
with express written approval by Microchip. No licenses are
conveyed, implicitly or otherwise, under any intellectual
property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, K
EE
L
OQ
, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE and PowerSmart are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
AmpLab, FilterLab, micro
ID
, MXDEV, MXLAB, PICMASTER,
SEEVAL, SmartShunt and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Application Maestro, dsPICDEM, dsPICDEM.net,
dsPICworks, ECAN, ECONOMONITOR, FanSense,
FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP,
ICEPIC, Migratable Memory, MPASM, MPLIB, MPLINK,
MPSIM, PICkit, PICDEM, PICDEM.net, PICtail, PowerCal,
PowerInfo, PowerMate, PowerTool, rfLAB, rfPIC, Select
Mode, SmartSensor, SmartTel and Total Endurance are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
2004, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as "unbreakable."
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in October
2003. The Company's quality system processes and procedures are for
its PICmicro
8-bit MCUs, K
EE
L
OQ
code hopping devices, Serial
EEPROMs, microperipherals, nonvolatile memory and analog
products. In addition, Microchip's quality system for the design and
manufacture of development systems is ISO 9001:2000 certified.

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