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1
Motorola Bipolar Power Transistor Device Data
Horizontal Deflection Transistor
. . . designed for use in televisions.
CollectorEmitter Voltages VCES 1500 Volts
Fast Switching -- 400 ns Typical Fall Time
Low Thermal Resistance 1
_
C/W Increased Reliability
Glass Passivated (Patented Photoglass). Triple Diffused Mesa Technology for
Long Term Stability
MAXIMUM RATINGS
Rating
Symbol
BU208A
Unit
CollectorEmitter Voltage
VCEO(sus)
700
Vdc
CollectorEmitter Voltage
VCES
1500
Vdc
EmitterBase Voltage
VEB
5.0
Vdc
Collector Current -- Continuous
-- Peak
IC
ICM
5.0
7.5
Vdc
Base Current -- Continuous
-- Peak (Negative)
IB
IBM
4.0
3.5
Adc
Total Power Dissipation @ TC = 95
_
C
Derate above 95
_
C
PD
12.5
0.625
Watts
W/
_
C
Operating and Storage Junction Temperature Range
TJ, Tstg
65 to + 115
_
C
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Thermal Resistance, Junction to Case
R
JC
1.6
_
C/W
Maximum Lead Temperature for Soldering
Purpose, 1/8
from Case for 5 Seconds
TL
275
_
C
NOTES:
1. Pulsed 5.0 ms, Duty Cycle
v
10%.
2. See page 3 for Additional Ratings on A Type.
3. Figures in ( ) are Standard Ratings Motorola Guarantees are Superior.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by BU208A/D
Motorola, Inc. 1995
BU208A
5.0 AMPERES
NPN SILICON
POWER TRANSISTOR
700 VOLTS
CASE 107
TO204AA
(TO3)
REV 7
BU208A
2
Motorola Bipolar Power Transistor Device Data
ELECTRICAL CHARACTERISTICS
(TC = 25
_
C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
CollectorEmitter Sustaining Voltage
(IC = 100 mAdc, L = 25 mH)
VCEO(sus)
700
--
--
Vdc
Collector Cutoff Current1
ALL TYPES
(VCE = rated VCES, VBE = 0)
ICES
--
--
1.0
mAdc
Emitter Base Voltage1
(IC = 0, IE = 10 mAdc)
(IC = 0, IE = 100 mAdc)
VEBO
5
--
--
7
--
--
Vdc
ON CHARACTERISTICS1
DC Current Gain
(IC = 4.5 Adc, VCE = 5 Vdc)
hFE
2.25
--
--
CollectorEmitter Saturation Voltage
(IC = 4.5 Adc, IB = 2 Adc)
VCE(sat)
--
--
1
Vdc
BaseEmitter Saturation Voltage
(IC = 4.5 Adc, IB = 2 Adc)
VBE(sat)
--
--
1.5
Vdc
DYNAMIC CHARACTERISTICS
CurrentGain Bandwidth Product
(IC = 0.1 Adc, VCE = 5 Vdc, ftest = 1 MHz)
fT
--
4
--
MHz
Output Capacitance
(VCB = 10 Vdc, IE = 0, ftest = 1 MHz)
Cob
--
125
--
pF
SWITCHING CHARACTERISTICS
Storage Time (see test circuit fig. 1)
(IC = 4.5 Adc, IB1 = 1.8 Adc, LB = 10
H)
ts
--
8
--
s
Fall time (see test circuit fig. 1)
(IC = 4.5 Adc, IB1 = 1.8 Adc, LB = 10
H)
tf
--
0.4
--
s
1Pulse test: PW = 300
s; Duty cycle
v
2%.
BU208A
3
Motorola Bipolar Power Transistor Device Data
Figure 1. Switching Time Test Circuit
+ 40
V
+ 40
V
1 K
1 K
1N5242 (12 V)
10 K
3
15
1
14
2
16
10 nF
2K7
3K3
2 K
220
680 nF
820
10 nF
MPSU04
10 K
100
1
F
400 mA
100
LB
T.U.T.
680
F
RB
0.56
1 A
1500 V
22 nF
22 nF
6.5 mH
Ly = 1.3 mH
0.5
F
250
F
7 mH
0.3 A
FUSE
130 V
POWER
SUPPLY
TBA920
80
60
40
20
0
40
80
120
160
200
Figure 2. Power Derating
TC, CASE TEMPERATURE (
C)
POWER DISSIP
A
TION (W)
BU208A
4
Motorola Bipolar Power Transistor Device Data
BASE DRIVE
The Key to Performance
By now, the concept of controlling the shape of the turnoff
base current is widely accepted and applied in horizontal
deflection design. The problem stems from the fact that good
saturation of the output device, prior to turnoff, must be as-
sured. This is accomplished by providing more than enough
IB1 to satisfy the lowest gain output device hFE at the end of
scan ICM. Worstcase component variations and maximum
high voltage loading must also be taken into account.
If the base of the output transistor is driven by a very low
impedance source, the turnoff base current will reverse
very quickly as shown in Fig. 3. This results in rapid, but only
partial collector turnoff, because excess carriers become
trapped in the high resistivity collector and the transistor is
still conductive. This is a high dissipation mode, since the
collector voltage is rising very rapidly. The problem is over-
come by adding inductance to the base circuit to slow the
base current reversal as shown in Fig. 4, thus allowing ac-
cess carrier recombination in the collector to occur while the
base current is still flowing.
Choosing the right LB Is usually done empirically since the
equivalent circuit is complex, and since there are several
important variables (ICM, IB1, and hFE at ICM). One method is
to plot fall time as a function of LB, at the desired conditions,
for several devices within the hFE specification. A more infor-
mative method is to plot power dissipation versus IB1 for a
range of values of LB.
This shows the parameter that really matters, dissipation,
whether caused by switching or by saturation. For very low
LB a very narrow optimum is obtained. This occurs when IB1
hFE
^
ICM, and therefore would be acceptable only for the
"typical" device with constant ICM. As LB is increased, the
curves become broader and flatter above the IB1. hFE = ICM
point as the turn off "tails" are brought under control. Eventu-
ally, if LB is raised too far, the dissipation all across the curve
will rise, due to poor initiation of switching rather than tailing.
Plotting this type of curve family for devices of different hFE,
essentially moves the curves to the left, or right according to
the relation IB1 hFE = constant. It then becomes obvious that,
for a specified ICM, an LB can be chosen which will give low
dissipation over a range of hFE and/or IB1. The only remain-
ing decision is to pick IB1 high enough to accommodate the
lowest hFE part specified. Neither LB nor IB1 are absolutely
critical. Due to the high gain of Motorola devices it is sug-
gested that in general a low value of IB1 be used to obtain
optimum efficiency -- eg. for BU208A with ICM = 4.5 A use
IB1
[
1.5 A, at ICM = 4 A use IB1
[
1.2 A. These values are
lower than for most competition devices but practical tests
have showed comparable efficiency for Motorola devices
even at the higher level of IB1.
An LB of 10
H to 12
H should give satisfactory operation
of BU208A with ICM of 4 to 4.5 A and IB1 between 1.2 and
2 A.
TEST CIRCUIT WAVEFORMS
Figure 3
Figure 4
IB
IC
IB
IC
(TIME)
(TIME)
TEST CIRCUIT OPTIMIZATION
The test circuit may be used to evaluate devices in the
conventional manner, i.e., to measure fall time, storage time,
and saturation voltage. However, this circuit was designed to
evaluate devices by a simple criterion, power supply input.
Excessive power input can be caused by a variety of prob-
lems, but it is the dissipation in the transistor that is of funda-
mental importance. Once the required transistor operating
current is determined, fixed circuit values may be selected.
BU208A
5
Motorola Bipolar Power Transistor Device Data
14
0.01
Figure 5. DC Current Gain
IC, COLLECTOR CURRENT (A)
4
0.02
0.05
0.1
0.2
0.5
1.0
2.0
5.0
10
12
10
9
8
2.8
0.1
Figure 6. CollectorEmitter Saturation Voltage
IB, BASE CURRENT CONTINUOUS (A)
0.2
0.5
1.0
2.0
10
2.4
2.0
1.6
1.2
1.6
0.1
Figure 7. BaseEmitter Saturation Voltage
IC, COLLECTOR CURRENT (A)
0.2
0.5
1.0
2.0
10
1.5
1.4
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.1
Figure 8. Collector Saturation Region
IC, COLLECTOR CURRENT (A)
0
0.2
0.5
1.0
2.0
5.0
10
0.4
0.3
0.2
0.1
IC/IB = 3
15
1
Figure 9. Maximum Forward Bias Safe
Operating Area
VCE, COLLECTOREMITTER VOLTAGE (V)
13
11
h
FE
, DC CURRENT
GAIN
VCE = 5 V
, COLLECT
OR CURRENT
(A)
I C
0.001
2
5
10 20
50 100 200
500 1000
2000
1.3
7
6
5
V
CE(sat)
, COLLECT
OREMITTER SA
TURA
TION
VOL
T
AGE (V)
IC/IB = 2
V
BE
, BASEEMITTER VOL
T
AGE (V)
5.0
IC/IB = 2
0.8
0.4
5.0
IC = 3.5 A
IC = 2 A
IC = 3 A
IC = 4 A
IC = 4.5 A
10
5
2
1
0.5
0.2
0.1
0.05
0.02
0.01
0.005
0.002
TC
95
C
IC (max.)
ICM (max.)
1
s
2
5
10
20
50
100
200
300
1 ms
2 ms
D.C.
BU208, A1
1Pulse width
20
s. Duty cycle
0.25. RBE
100 Ohms.
V
CE(sat)
, COLLECT
OREMITTER SA
TURA
TION
VOL
T
AGE (V)
BONDING WIRE LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
DUTY CYCLE
1%
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