Device
Operating
Temperature Range
Package
MC34119
SEMICONDUCTOR
TECHNICAL DATA
LOW POWER
AUDIO AMPLIFIER
ORDERING INFORMATION
MC34119P
MC34119D
TA = 20
to +70
C
Plastic DIP
SO8
PIN CONNECTIONS
Order this document by MC34119/D
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO8)
P SUFFIX
PLASTIC PACKAGE
CASE 626
8
1
8
1
(Top View)
1
2
3
4
8
7
6
5
CD
FC2
FC1
Vin
VO2
Gnd
VCC
VO1
MC34119DTB
TSSOP
DTB SUFFIX
PLASTIC PACKAGE
CASE 948J
(TSSOP)
8
1
1
MOTOROLA ANALOG IC DEVICE DATA
Low Power Audio Amplifier
The MC34119 is a low power audio amplifier intergrated circuit intended
(primarily) for telephone applications, such as in speakerphones. It provides
differential speaker outputs to maximize output swing at low supply voltages
(2.0 V minimum). Coupling capacitors to the speaker are not required. Open
loop gain is 80 dB, and the closed loop gain is set with two external resistors.
A Chip Disable pin permits powering down and/or muting the input signal.
The MC34119 is available in standard 8pin DIP, SOIC package, and
TSSOP package.
Wide Operating Supply Voltage Range (2.0 V to 16 V), Allows
Telephone
Line Powered Applications
Low Quiescent Supply Current (2.7 mA Typ) for Battery
Powered Applications
Chip Disable Input to Power Down the IC
Low PowerDown Quiescent Current (65
A Typ)
Drives a Wide Range of Speaker Loads (8.0
and Up)
Output Power Exceeds 250 mW with 32
Speaker
Low Total Harmonic Distortion (0.5% Typ)
Gain Adjustable from <0 dB to >46 dB for Voice Band
Requires Few External Components
MAXIMUM RATINGS
Rating
Value
Unit
Supply Voltage
1.0 to +18
Vdc
Maximum Output Current at VO1, VO2
250
mA
Maximum Voltage @ Vin, FC1, FC2, CD
Applied Output Voltage to VO1, VO2 when disabled
1.0, VCC + 1.0
1.0, VCC + 1.0
Vdc
Junction Temperature
55, +140
C
NOTE:
ESD data available upon request.
Block Diagram and Simplified Application
* = Optional
Differential Gian = 2 x
Rf
Ri
+
#1
+
#2
MC34119
Bias
Circuit
Speaker
Chip
Disable
Audio
Input
Gnd
Rf
75 k
6
VCC
Ci
0.1
Ri
3.0 k
Vin 4
FC1
3
C1
1.0
F
C2*
5.0
F
FC2
2
50 k
125 k
50 k
4.0 k
4.0 k
7
5
VO1
8
VO2
1
CD
This device contains 45 active transistors.
Motorola, Inc. 1996
Rev 1
MC34119
2
MOTOROLA ANALOG IC DEVICE DATA
RECOMMENDED OPERATING CONDITIONS
Characteristics
Symbol
Min
Max
Unit
Supply Voltage
VCC
+2.0
+16
Vdc
Voltage @ CD (Pin 1)
VCD
0
VCC
Vdc
Load Impedance
RL
8.0
Peak Load Current
IL
200
mA
Differential Gain (5.0 kHz Bandwidth)
AVD
0
46
dB
Ambient Temperature
TA
20
+70
C
ELECTRICAL CHARACTERISTICS
(TA = 25
C, unless otherwise noted.)
Characteristics
Symbol
Min
Typ
Max
Unit
AMPLIFIERS (AC CHARACTERISTICS)
AC Input Resistance (@ VIn)
ri
>30
M
Open Loop Gain (Amplifier #1, f < 100 Hz)
AVOL1
80
dB
Closed Loop Gain (Amplifier #2, VCC = 6.0 V, f = 1.0 kHz, RL = 32
)
AV2
0.35
0
+0.35
dB
Gain Bandwidth Product
GBW
1.5
MHz
Output Power;
mW
VCC = 3.0 V, RL = 16
, THD
10%
POut3
55
VCC = 6.0 V, RL = 32
,
THD
10%
POut6
250
VCC = 12 V, RL = 100
,
THD
10%
POut12
400
Total Harmonic Distortion (f = 1.0 kHz)
THD
%
(VCC = 6.0 V, RL = 32
, Pout = 125 mW)
0.5
1.0
(VCC
3.0 V, RL = 8.0
, Pout = 20 mW)
0.5
(VCC
12 V, RL = 32
, Pout = 200 mW)
0.6
Power Supply Rejection (VCC = 6.0 V,
VCC = 3.0 V)
PSRR
dB
(C1 =
, C2 = 0.01
F)
50
(C1 = 0.1
F, C2 = 0, f = 1.0 kHz)
12
(C1 = 1.0
F, C2 = 5.0
F, f = 1.0 kHz)
52
Differential Muting (VCC = 6.0 V, 1.0 kHz
f
20 kHz, CD = 2.0 V)
GMT
>70
dB
AMPLIFIERS (DC CHARACTERISTICS)
Output DC Level @ VO1, VO2, VCC = 3.0 V, RL = 16 (Rf = 75 k)
VO(3)
1.0
1.15
1.25
Vdc
VCC = 6.0 V
VO(6)
2.65
VCC = 12 V
VO(12)
5.65
Output Level
Vdc
High (Iout = 75 mA, 2.0 V
VCC
16 V)
VOH
VCC 1.0
Low (Iout = 75 mA, 2.0 V
VCC
16 V)
VOL
0.16
Output DC Offset Voltage (VO1VO2)
VO
mV
(VCC = 6.0 V, Rf = 75 k
, RL = 32
)
30
0
+30
Input Bias Current @ Vin (VCC = 6.0 V)
IIB
100
200
nA
Equivalent Resistance
k
@ FC1 (VCC = 6.0 V)
RFC1
100
150
220
@ FC2 (VCC = 6.0 V)
RFC2
18
25
40
CHIP DISABLE (Pin 1)
Input Voltage
Vdc
Low
VIL
0.8
High
VIH
2.0
Input Resistance (VCC = VCD = 16 V)
RCD
50
90
175
k
POWER SUPPLY
Power Supply Current
(VCC = 3.0 V, RL =
, CD = 0.8 V)
ICC3
2.7
4.0
mA
(VCC= 16 V, RL =
, CD = 0.8 V)
ICC16
3.3
5.0
mA
(VCC = 3.0 V, RL =
, CD = 2.0 V)
ICCD
65
100
A
NOTE: Currents into a pin are positive, currents out of a pin are negative.
MC34119
3
MOTOROLA ANALOG IC DEVICE DATA
PIN FUNCTION DESCRIPTION
Symbol
Pin
Description
CD
1
Chip Disable Digital input. A Logic "0" (<0.8 V) sets normal operation. A logic "1" (
2.0 V) sets the power down
mode. Input impedance is nominally 90 k
.
FC2
2
A capacitor at this pin increases power supply rejection, and affects turnon time. This pin can be left open if the
capacitor at FC1 is sufficient.
FC1
3
Analog ground for the amplifiers. A 1.0
F capacitor at this pin (with a 5.0
F capacitor at Pin 2) provides
(typically) 52 dB of power supply rejection. Turnon time of the circuit is affected by the capacitor on this pin. This
pin can be used as an alternate input.
Vin
4
Amplifier input. The input capacitor and resistor set low frequency rolloff and input impedance. The feedback
resistor is connected to this pin and VO1.
VO1
5
Amplifier Output #1. The dc level is
(VCC 0.7 V)/2.
VCC
6
DC supply voltage (+2.0 V to +16 V) is applied to this pin.
GND
7
Ground pin for the entire circuit.
VO2
8
Amplifier Output #2. This signal is equal in amplitude, but 180
outofphase with that at VO1.
The dc level is
(VCC 0.7 V)/2.
TYPICAL TEMPERATURE PERFORMANCE
(20
C < TA < +70
C)
Function
Typical Change
Units
Input Bias Current (@ Vin)
40
pA/
C
Total Harmonic Distortion
+0.003
%/
C
(VCC = 6.0 V, RL = 32
. Pout = 125 mW, f = 1.0 kHz)
Power Supply Current
A/
C
(VCC = 3.0 V, RL =
, CD = 0 V)
2.5
(VCC = 3.0 V, RL =
, CD = 2.0 V)
0.03
MC34119
4
MOTOROLA ANALOG IC DEVICE DATA
DESIGN GUIDELINES
General
The MC34119 is a low power audio amplifier capable of
low voltage operation (VCC = 2.0 V minimum) such as that
encountered in linepowered speakerphones. The circuit
provides a differential output (VO1VO2) to the speaker to
maximize the available voltage swing at low voltages. The
differential gain is set by two external resistors. Pins FC1 and
FC2 allow controlling the amount of power supply and noise
rejection, as well as providing alternate inputs to the
amplifiers. The CD pin permits powering down the IC for
muting purposes and to conserve power.
Amplifiers
Referring to the block diagram, the internal configuration
consists of two identical operational amplifiers. Amplifier #1
has an open loop gain of
80 dB (at f
100 Hz), and the
closed loop gain is set by external resistor Rf and Ri. The
amplifier is unity gain stable, and has a unity gain frequency
of approximately 1.5 MHz. In order to adequately cover the
telephone voice band (300 Hz to 3400 Hz), a maximum
closed loop gain of 46 is recommended. Amplifier #2 is
internally set to a gain of 1.0 (0 dB).
The outputs of both amplifiers are capable of sourcing and
sinking a peak current of 200 mA. The outputs can typically
swing to within
0.4 V above ground, and to within
1.3 V
below VCC, at the maximum current. See Figures 18 and 19
for VOH and VOL curves.
The output dc offset voltage (VO1VO2) is primarily a
function of the feedback resistor (Rf), and secondarily due to
the amplifiers' input offset voltages. The input offset voltage
of the two amplifiers will generally be similar for a particular
IC, and therefore nearly cancel each other at the outputs.
Amplifier #1's bias current, however, flows out of Vin (Pin 4)
and through Rf, forcing VO1 to shift negative by an amount
equal to [Rf
IIB]. VO2 is shifted positive an equal amount.
The output offset voltage, specified in the Electrical
Characteristics, is measured with the feedback resistor
shown in the Typical Application Circuit, and therefore takes
into account the bias current as well as internal offset
voltages of the amplifiers. The bias current is constant with
respect to VCC.
FC1 and FC2
Power supply rejection is provided by the capacitors (C1
and C2 in the Typical Application Circuit) at FC1 and FC2. C2
is somewhat dominant at low frequencies, while C1 is
dominant at high frequencies, as shown in the graphs of
Figures 4 to 7. The required values of C1 and C2 depend on
the conditions of each application. A line powered
speakerphone, for example, will require more filtering than a
circuit powered by a well regulated power supply. The
amount of rejection is a function of the capacitors, and the
equivalent impedance looking into FC1 and FC2 (listed in the
Electrical Characteristics as RFC1 and RFC2).
In addition to providing filtering, C1 and C2 also affect the
turnon time of the circuit at powerup, since the two
capacitors must charge up through the internal 50 k and
125 k
resistors. The graph of Figure 1 indicates the
turnon time upon application of VCC of +6.0 V. The turnon
time is
60% longer for VCC = 3.0 V, and
20% less for
VCC = 9.0 V. Turnoff time is <10
s upon removal of VCC.
t, TURNON
TIME
(ms)
C2, CAPACITANCE (
F)
Figure 1. TurnOn Time versus C1, C2 at PowerOn
360
300
240
180
120
60
0
0
2.0
4.0
6.0
8.0
10
C1 = 5.0
F
C1 = 1.0
F
VCC switching from
0 V to 6.0 V
Chip Disable
The Chip Disable (Pin 1) can be used to power down the
IC to conserve power, or for muting, or both. When at a Logic
"0" (0 V to 0.8 V), the MC34119 is enabled for normal
operation. When Pin 1 is at a Logic "1" (2.0 V to VCC V), the
IC is disabled. If Pin 1 is open, that is equivalent to a Logic
"0," although good design practice dictates that an input
should never be left open. Input impedance at Pin 1 is a
nominal 90 k
. The power supply current (when disabled) is
shown in Figure 15.
Muting, defined as the change in differential gain from
normal operation to muted operation, is in excess of 70 dB.
The turnoff time of the audio output, from the application of
the CD signal, is <2.0
s, and turn ontime is 12 ms15 ms.
Both times are independent of C1, C2, and VCC.
When the MC34119 is disabled, the voltages at FC1 and
FC2 do not change as they are powered from VCC. The
outputs, VO1 and VO2, change to a high impedance condition,
removing the signal from the speaker. If signals from other
sources are to be applied to the outputs (while disabled), they
must be within the range of VCC and Ground.
Power Dissipation
Figures 8 to 10 indicate the device dissipation (within the
IC) for various combinations of VCC, RL, and load power. The
maximum power which can safely be dissipated within the
MC34119 is found from the following equation:
PD = (140
C TA)/
JA
where TA is the ambient temperature; and
JA is the package
thermal resistance (100
C/W for the standard DIP package,
and 180
C/W for the surface mount package.)
The power dissipated within the MC34119, in a given
application, is found from the following equation:
PD = (VCC x ICC) + (IRMS x VCC) (RL x IRMS2)
where ICC is obtained from Figure 15; and IRMS is the RMS
current at the load; and RL is the load resistance.
Figures 8 to 10, along with Figures 11 to 13 (distortion
curves), and a peak working load current of
200 mA, define
the operating range for the MC34119. The operating range is
further defined in terms of allowable load power in Figure 14
for loads of 8.0
, 16
and 32
. The left (ascending) portion
MC34119
5
MOTOROLA ANALOG IC DEVICE DATA
of each of the three curves is defined by the power level at
which 10% distortion occurs. The center flat portion of each
curve is defined by the maximum output current capability of
the MC34119. The right (descending) portion of each curve is
defined by the maximum internal power dissipation of the IC
at 25
C. At higher ambient temperatures, the maximum load
power must be reduced according to the above equations.
Operating the device beyond the current and junction
temperature limits will degrade long term reliability.
Layout Considerations
Normally a snubber is not needed at the output of the
MC34119, unlike many other audio amplifiers. However, the
PC board layout, stray capacitances, and the manner in
which the speaker wires are configured, may dictate
otherwise. Generally, the speaker wires should be twisted
tightly, and not more than a few inches in length.
Figure 2. Amplifier #1 Open Loop Gain and Phase
Figure 3. Differential Gain versus Frequency
VOL
, EXCESS PHASE (DEGREES)
0
36
72
108
144
180
DIFFERENTIAL
GAIN (dB)
100
80
60
40
20
0
36
32
24
16
8
0
f, FREQUENCY (Hz)
100
1.0 k
10 k
100 k
1.0 M
f, FREQUENCY (Hz)
100
1.0 k
10 k
20 k
+
#1
#2
0.1
Ri
Rf
Input
VO1
VO2 VO
Phase
Gain
Rf = 150 k, Ri = 6.0 k
Rf = 75 k, Ri = 3.0 k
A
(dB)
MC34119
6
MOTOROLA ANALOG IC DEVICE DATA
Figure 4. Power Supply Rejection versus Frequency
(C2 = 10
F)
Figure 5. Power Supply Rejection versus Frequency
(C2 = 5.0
F)
Figure 6. Power Supply Rejection versus Frequency
(C2 = 1.0
F)
Figure 7. Power Supply Rejection versus Frequency
(C2 = 0)
PSRR, POWER SUPPL
Y
REJECTION (dB)
PSRR, POWER SUPPL
Y
REJECTION (dB)
PSRR, POWER SUPPL
Y
REJECTION (dB)
PSRR, POWER SUPPL
Y
REJECTION (dB)
Figure 8. Device Dissipation, 8.0
Load
Figure 9. Device Dissipation, 16
Load
DEVICE DISSIP
A
TION
(mW)
DEVICE DISSIP
A
TION
(mW)
60
50
40
30
20
10
0
60
50
40
20
10
0
60
50
40
30
20
10
0
60
50
40
30
20
10
0
1000
800
600
400
200
0
1200
1000
800
600
400
200
0
f, FREQUENCY (Hz)
200
1.0 k
10 k
20 k
f, FREQUENCY (Hz)
200
1.0 k
10 k
20 k
f, FREQUENCY (Hz)
200
1.0 k
10 k
20 k
f, FREQUENCY (Hz)
200
1.0 k
10 k
20 k
LOAD POWER (mW)
0
30
60
90
120
150
LOAD POWER (mW)
0
100
200
300
400
C1
1.0
F
C1 = 0.1
F
C1 = 0
C1
1.0
F
C1 = 0.1
F
C1 = 0
C1 = 5.0
F
C1 = 1.0
F
C1 = 0.1
F
C1 = 0
VCC = 12 V
VCC = 6.0 V
VCC = 3.0 V
VCC = 16 V
VCC = 12 V
VCC = 6.0 V
VCC = 3.0 V
C1 = 5.0
F
C1 = 1.0
F
C1 = 0.1
F
30
MC34119
7
MOTOROLA ANALOG IC DEVICE DATA
Figure 10. Device Dissipation, 32
Load
Figure 11. Distortion versus Power
(f = 1.0 kHz, AVD = 34 dB)
Figure 12. Distortion versus Power
(f = 3.0 kHz, AVD = 34 dB)
Figure 13. Distortion versus Power
(f = 1, 3.0 kHz, AVD = 12 dB)
Figure 14. Maximum Allowable Load Power
Figure 15. Power Supply Current
DEVICE DISSIP
A
TION
(mW)
THD,
T
O
T
A
L
HARMONIC DIST
OR
TION (%)
THD,
T
O
T
A
L
HARMONIC DIST
OR
TION (%)
THD,
T
O
T
A
L
HARMONIC DIST
OR
TION (%)
LOAD POWER (mW)
I , POWER SUPPL
Y
CURRENT
(mA)
CC
1200
1000
800
600
400
200
0
10
8.0
6.0
4.0
2.0
0
10
8.0
6.0
4.0
2.0
0
10
8.0
4.0
2.0
0
500
400
300
200
100
0
4.0
3.0
2.0
1.0
0
LOAD POWER (mW)
0
100
200
300
400
500
POut, OUTPUT POWER (mW)
0
100
200
300
400
500
POut, OUTPUT POWER (mW)
0
100
200
300
400
500
POut, OUTPUT POWER (mW)
0
100
200
300
400
500
VCC, SUPPLY VOLTAGE (V)
0
2.0
4.0
6.0
8.0
10
12
14
16
VCC, SUPPLY VOLTAGE (V)
0
2.0
4.0
6.0
8.0
10
12
14
16
VCC = 16 V
VCC = 12 V
VCC = 6.0 V
VCC = 3.0 V
VCC = 16 V,
RL = 32
VCC = 6.0 V,
RL = 16
VCC = 12 V,
RL = 32
VCC = 3.0 V,
RL = 8.0
VCC = 6.0 V,
RL = 32
VCC = 16 V,
RL = 32
Limit
VCC = 6.0 V, RL = 16
VCC = 3.0 V,
RL = 16
VCC = 3.0 V,
RL = 8.0
VCC = 12 V, RL = 32
VCC = 3.0 V,
RL = 16
VCC = 16 V,
RL = 32
Limit
VCC = 6.0 V,
RL = 16
Limit
VCC = 12 V,
RL = 32
VCC = 3.0 V,
RL = 8.0
RL = 32
RL = 16
RL = 8.0
TA = 25
CDerate at higher temperatures
RL =
CD = 0
CD = VCC
VCC = 3.0 V,
RL = 16
VCC = 6.0 V,
RL = 32
6.0
VCC = 6.0 V,
RL = 32
MC34119
8
MOTOROLA ANALOG IC DEVICE DATA
Figure 16. Small Signal Response
Figure 17. Large Signal Response
Figure 18. VCCVOH @ VO1, VO2 versus Load Current
Figure 19. VOL @ VO1, VO2 versus Load Current
Figure 20. Input Characteristics @ CD (Pin 1)
Figure 21. Audio Amplifier with High Input Impedance
20
s/DIV
20
s/DIV
CC
V
OH
V
(V)
V
OL
INPUT
80 mV/DIV
OUTPUT
1.0 V/DIV
OUTPUT
20 mV/DIV
INPUT
1.0 mV/DIV
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
200
160
120
80
40
0
ILOAD, LOAD CURRENT (mA)
0
40
80
120
160
200
ILOAD, LOAD CURRENT (mA)
0
40
80
120
160
200
VCD, CHIP DISABLE VOLTAGE (V)
0
4.0
8.0
12
16
2.0
VCC
16 V
TA = 25
C
TA = 25
C
VCC
6.0 V
VCC = 3.0 V
VCC = 2.0 V
Valid for VCD
VCC
Differential Gain = 34 dB
Frequency Response: See Figure 3
Input Impedance
[
125 k
PSRR
[
50 dB
+
+
#1
#2
Bias
Circuit
MC34119
75 k
6 VCC
4
3
2
0.1 3.0 k
0.1
Input
5.0
F
50 k
125 k
50 k
4.0 k
4.0 k
7
Gnd
5
8
1
Speaker
Disable
, OUTPUT
LOW LEVEL
(V)
, (
A)
I CD
MC34119
9
MOTOROLA ANALOG IC DEVICE DATA
Figure 22. Audio Amplifier with Bass Suppression
Figure 23. Frequency Response of Figure 22
Figure 24. Audio Amplifier with Bandpass
Figure 25. Frequency Response of Figure 24
75 k
A
VD,
DIFFERENTIAL
GAIN (dB)
A
VD,
DIFFERENTIAL
GAIN (dB)
+
+
#1
#2
Bias
Circuit
MC34119
6
VCC
4
3
2
5.1 k
0.1
Input
5.0
F
50 k
125 k
50 k
4.0 k
4.0 k
7
Gnd
5
8
1
Speaker
Disable
0.05 0.05
5.1 k
+
+
#1
#2
Bias
Circuit
MC34119
6 VCC
4
3
2
5.1 k
0.1
Input
5.0
F
50 k
125 k
50 k
4.0 k
4.0 k
7
Gnd
5
8
1
Speaker
Disable
0.05
0.05
5.1 k
1000 pF
100 k
100 k
1000 pF
36
32
24
16
8.0
0
36
32
24
16
8.0
0
f, FREQUENCY (Hz)
100
1.0 k
10 k
20 k
f, FREQUENCY (Hz)
100
1.0 k
10 k
20 k
+
+
#1
#2
Bias
Circuit
MC34119
6
VCC (+1.0 V to +8.0 V)
4
3
2
50 k
125 k
50 k
4.0 k
4.0 k
7
VEE
(1.0 V to 8.0 V)
5
8
CD
Speaker
Rf 75 k
VO1
VO2
Audio Input
Ci
0.1
Ri
3.0 k
Vin
FC1
FC2
1
4700
VCC
VEE
10 k
20 k
20 k
Chip Disable
NOTE:
If VCC and VEE are not symmetrical about ground then FC1 must be
connected through a capacitor to ground as shown on the front page.
Figure 26. Split Supply Operation
MC34119
10
MOTOROLA ANALOG IC DEVICE DATA
P SUFFIX
PLASTIC PACKAGE
CASE 62605
ISSUE K
D SUFFIX
PLASTIC PACKAGE
CASE 75105
(SO8)
ISSUE P
OUTLINE DIMENSIONS
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
1
4
5
8
F
NOTE 2
A
B
T
SEATING
PLANE
H
J
G
D
K
N
C
L
M
M
A
M
0.13 (0.005)
B
M
T
DIM
MIN
MAX
MIN
MAX
INCHES
MILLIMETERS
A
9.40
10.16
0.370
0.400
B
6.10
6.60
0.240
0.260
C
3.94
4.45
0.155
0.175
D
0.38
0.51
0.015
0.020
F
1.02
1.78
0.040
0.070
G
2.54 BSC
0.100 BSC
H
0.76
1.27
0.030
0.050
J
0.20
0.30
0.008
0.012
K
2.92
3.43
0.115
0.135
L
7.62 BSC
0.300 BSC
M
10
10
N
0.76
1.01
0.030
0.040
_
_
SEATING
PLANE
1
4
5
8
C
K
4X
P
A
0.25 (0.010)
M
T B
S
S
0.25 (0.010)
M
B
M
8X
D
R
M
J
X 45
_
_
F
A
B
T
DIM
MIN
MAX
MILLIMETERS
A
4.80
5.00
B
3.80
4.00
C
1.35
1.75
D
0.35
0.49
F
0.40
1.25
G
1.27 BSC
J
0.18
0.25
K
0.10
0.25
M
0
7
P
5.80
6.20
R
0.25
0.50
_
_
G
NOTES:
1. DIMENSIONS A AND B ARE DATUMS AND T IS A
DATUM SURFACE.
2. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
3. DIMENSIONS ARE IN MILLIMETER.
4. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
5. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
6. DIMENSION D DOES NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE D DIMENSION AT MAXIMUM MATERIAL
CONDITION.
MC34119
11
MOTOROLA ANALOG IC DEVICE DATA
DTB SUFFIX
PLASTIC PACKAGE
CASE 948J01
(TSSOP)
ISSUE O
OUTLINE DIMENSIONS
DIM
MIN
MAX
MIN
MAX
INCHES
MILLIMETERS
A
2.90
3.10
0.114
0.122
B
4.30
4.50
0.169
0.177
C
1.20
0.047
D
0.05
0.15
0.002
0.006
F
0.50
0.75
0.020
0.030
G
0.65 BSC
0.026 BSC
H
0.50
0.60
0.020
0.024
J
0.09
0.20
0.004
0.008
J1
0.09
0.16
0.004
0.006
K
0.19
0.30
0.007
0.012
K1
0.19
0.25
0.007
0.010
L
6.40 BSC
0.252 BSC
M
0
8
0
8
NOTES:
1 DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2 CONTROLLING DIMENSION: MILLIMETER.
3 DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4 DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5 DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6 TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7 DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE W.
_
_
_
_
SECTION NN
SEATING
PLANE
IDENT.
PIN 1
1
4
8
5
SEE DETAIL E
J J1
B
C
D
A
K
K1
H
G
DETAIL E
F
M
L
2X
L/2
U
S
U
0.15 (0.006) T
S
U
0.15 (0.006) T
S
U
M
0.10 (0.004)
V
S
T
0.10 (0.004)
T
V
W
0.25 (0.010)
8x REF
K
N
N
MC34119
12
MOTOROLA ANALOG IC DEVICE DATA
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MC34119/D
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