1
Motorola SmallSignal Transistors, FETs and Diodes Device Data
PNP Small Signal
Darlington Transistor
This PNP small-signal darlington transistor is designed for use in preamplifiers
input applications or wherever it is necessary to have a high input impedance.
The device is housed in the SOT-223 package which is designed for medium
power surface mount applications.
High fT: 125 MHz Minimum
The SOT-223 Package can be soldered using wave or reflow.
SOT-223 package ensures level mounting, resulting in improved thermal
conduction, and allows visual inspection of soldered joints. The formed
leads absorb thermal stress during soldering eliminating the possibility of
damage to the die.
Available in 12 mm Tape and Reel
Use PZTA64T1 to order the 7 inch/1000 unit reel.
Use PZTA64T3 to order the 13 inch/4000 unit reel.
NPN Complement is PZTA14T1
MAXIMUM RATINGS
(TC = 25
C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector-Emitter Voltage
VCES
30
Vdc
Collector-Base Voltage
VCBO
30
Vdc
Emitter-Base Voltage
VEBO
10
Vdc
Total Power Dissipation @ TA = 25
C(1)
PD
1.5
Watts
Collector Current
IC
500
mAdc
Operating and Storage Temperature Range
TJ, Tstg
65 to +150
C
DEVICE MARKING
P2V
THERMAL CHARACTERISTICS
Thermal Resistance from Junction to Ambient (surface mounted)
R
JA
83.3
C/W
Maximum Temperature for Soldering Purposes
Time in Solder Bath
TL
260
10
C
Sec
1. Device mounted on a FR-4 glass epoxy printed circuit board 1.575 in. x 1.575 in. x 0.0625 in.; mounting pad for the collector lead = 0.93 sq. in.
Thermal Clad is a trademark of the Bergquist Company
Preferred devices are Motorola recommended choices for future use and best overall value.
Order this document
by PZTA64T1/D
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 1996
PZTA64T1
SOT-223 PACKAGE
PNP SILICON
DARLINGTON
TRANSISTOR
SURFACE MOUNT
Motorola Preferred Device
CASE 318E-04, STYLE 1
TO-261AA
1
2
3
4
COLLECTOR 2, 4
BASE
1
EMITTER 3
REV 4
PZTA64T1
2
Motorola SmallSignal Transistors, FETs and Diodes Device Data
ELECTRICAL CHARACTERISTICS
(TA = 25
C unless otherwise noted)
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
Collector-Emitter Breakdown Voltage
(IC = 100
Adc, VBE = 0)
V(BR)CES
30
--
Vdc
Collector-Base Breakdown Voltage
(IC = 100
A, IE = 0)
V(BR)CBO
30
--
Vdc
Emitter-Base Breakdown Voltage
(IE = 100
A, IC = 0)
V(BR)EBO
10
--
Vdc
Emitter-Base Cutoff Current
(VBE = 10 Vdc, IC = 0)
IEBO
--
0.1
Adc
Collector-Base Cutoff Current
(VCB = 30 Vdc, IE = 0)
ICBO
--
0.1
Adc
ON CHARACTERISTICS(2)
DC Current Gain
(IC = 10 mAdc, VCE = 5.0 Vdc)
(IC = 100 mAdc, VCE = 5.0 Vdc)
hFE
10,000
20,000
--
--
--
Collector-Emitter Saturation Voltage
(IC = 100 mAdc, IB = 0.1 mAdc)
VCE(sat)
--
1.5
Vdc
Base-Emitter On-Voltage
(VCE = 5.0 Vdc, IC = 100 mAdc)
VBE(on)
--
2.0
Vdc
DYNAMIC CHARACTERISTICS
Current-Gain -- Bandwidth Product
(IC = 10 mAdc, VCE = 5.0 Vdc, f = 100 MHz)
fT
125
--
MHz
2. Pulse Test: Pulse Width
300
s, Duty Cycle
2.0%.
PZTA64T1
3
Motorola SmallSignal Transistors, FETs and Diodes Device Data
200
IC, COLLECTOR CURRENT (mA)
Figure 1. DC Current Gain
0.3
h
FE
, DC CURRENT
GAIN (X1.0 K)
100
70
50
30
20
10
7.0
5.0
3.0
2.0
0.5
0.7
1.0
2.0
3.0
5.0
7.0
10
20
30
50
70
100
200
300
TA = 125
C
VCE = 2.0 V
5.0 V
25
C
55
C
10 V
10
IC, COLLECTOR CURRENT (mA)
Figure 2. High Frequency Current Gain
|h
FE
|, HIGH FREQUENCY
CURRENT
GAIN
1.0
VCE = 5.0 V
f = 100 MHz
TA = 25
C
1.0
2.0
3.0
4.0
0.1
0.2
0.4
2.0
5.0
10
20
50
100
200
500
1K
2.0
IC, COLLECTOR CURRENT (mA)
V
, VOL
T
AGE (VOL
TS)
Figure 3. "On" Voltage
TA = 25
C
VBE(on) @ VCE = 5.0 V
VCE(sat) @ IC/IB = 1000
IC/IB = 100
VBE(sat) @ IC/IB = 100
TA = 25
C
IB, BASE CURRENT (
A)
Figure 4. Collector Saturation Region
0.1
V
CE
, COLLECT
OR-EMITTER VOL
T
AGE (VOL
TS)
IC = 10 mA 50 mA 100 mA 175 mA
1.6
1.2
0.8
0.4
0
2.0
1.6
1.4
0.8
1.8
1.2
1.0
0.6
0.3 0.5
1.0
2.0 3.0 5.0
10
20 30
50 100
200 300
0.5
1.0 2.0 5.0
10 20 50
100 200 500
0.2
1K 2K
5K 10K
300 mA
PZTA64T1
4
Motorola SmallSignal Transistors, FETs and Diodes Device Data
INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.079
2.0
0.15
3.8
0.248
6.3
0.079
2.0
0.059
1.5
0.059
1.5
0.059
1.5
0.091
2.3
mm
inches
0.091
2.3
SOT-223
SOT-223 POWER DISSIPATION
The power dissipation of the SOT-223 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by TJ(max), the maximum rated junction temperature of the
die, R
JA, the thermal resistance from the device junction to
ambient, and the operating temperature, TA. Using the
values provided on the data sheet for the SOT-223 package,
PD can be calculated as follows:
PD =
TJ(max) TA
R
JA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25
C, one can
calculate the power dissipation of the device which in this
case is 1.5 watts.
PD =
150
C 25
C
83.3
C/W
= 1.5 watts
The 83.3
C/W for the SOT-223 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 1.5 watts. There are
other alternatives to achieving higher power dissipation from
the SOT-223 package. One is to increase the area of the
collector pad. By increasing the area of the collector pad, the
power dissipation can be increased. Although the power
dissipation can almost be doubled with this method, area is
taken up on the printed circuit board which can defeat the
purpose of using surface mount technology. A graph of R
JA
versus collector pad area is shown in Figure 5.
0.8 Watts
1.25 Watts*
1.5 Watts
R
,
Thermal Resistance, Junction
to
Ambient (
C/W)
JA
A, Area (square inches)
0.0
0.2
0.4
0.6
0.8
1.0
160
140
120
100
80
Figure 5. Thermal Resistance versus Collector
Pad Area for the SOT-223 Package (Typical)
Board Material = 0.0625
G-10/FR-4, 2 oz Copper
TA = 25
C
*Mounted on the DPAK footprint
Another alternative would be to use a ceramic substrate or
an aluminum core board such as Thermal Clad
TM
. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
PZTA64T1
5
Motorola SmallSignal Transistors, FETs and Diodes Device Data
SOLDER STENCIL GUIDELINES
Prior to placing surface mount components onto a printed
circuit board, solder paste must be applied to the pads. A
solder stencil is required to screen the optimum amount of
solder paste onto the footprint. The stencil is made of brass
or stainless steel with a typical thickness of 0.008 inches.
The stencil opening size for the SOT-223 package should be
the same as the pad size on the printed circuit board, i.e., a
1:1 registration.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
Always preheat the device.
The delta temperature between the preheat and soldering
should be 100
C or less.*
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference should be a maximum of 10
C.
The soldering temperature and time should not exceed
260
C for more than 10 seconds.
When shifting from preheating to soldering, the maximum
temperature gradient should be 5
C or less.
After soldering has been completed, the device should be
allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
Mechanical stress or shock should not be applied during
cooling
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
TYPICAL SOLDER HEATING PROFILE
For any given circuit board, there will be a group of control
settings that will give the desired heat pattern. The operator
must set temperatures for several heating zones, and a
figure for belt speed. Taken together, these control settings
make up a heating "profile" for that particular circuit board.
On machines controlled by a computer, the computer
remembers these profiles from one operating session to the
next. Figure 6 shows a typical heating profile for use when
soldering a surface mount device to a printed circuit board.
This profile will vary among soldering systems but it is a good
starting point. Factors that can affect the profile include the
type of soldering system in use, density and types of
components on the board, type of solder used, and the type
of board or substrate material being used. This profile shows
temperature versus time. The line on the graph shows the
actual temperature that might be experienced on the surface
of a test board at or near a central solder joint. The two
profiles are based on a high density and a low density board.
The Vitronics SMD310 convection/infrared reflow soldering
system was used to generate this profile. The type of solder
used was 62/36/2 Tin Lead Silver with a melting point
between 177 189
C. When this type of furnace is used for
solder reflow work, the circuit boards and solder joints tend to
heat first. The components on the board are then heated by
conduction. The circuit board, because it has a large surface
area, absorbs the thermal energy more efficiently, then
distributes this energy to the components. Because of this
effect, the main body of a component may be up to 30
degrees cooler than the adjacent solder joints.
STEP 1
PREHEAT
ZONE 1
"RAMP"
STEP 2
VENT
"SOAK"
STEP 3
HEATING
ZONES 2 & 5
"RAMP"
STEP 4
HEATING
ZONES 3 & 6
"SOAK"
STEP 5
HEATING
ZONES 4 & 7
"SPIKE"
STEP 6
VENT
STEP 7
COOLING
200
C
150
C
100
C
50
C
TIME (3 TO 7 MINUTES TOTAL)
TMAX
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
MASS OF ASSEMBLY)
205
TO
219
C
PEAK AT
SOLDER
JOINT
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
100
C
150
C
160
C
170
C
140
C
Figure 6. Typical Solder Heating Profile
PZTA64T1
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Motorola SmallSignal Transistors, FETs and Diodes Device Data
PACKAGE DIMENSIONS
TO-261AA
SOT223
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
H
S
F
A
B
D
G
L
4
1
2
3
0.08 (0003)
C
M
K
J
DIM
A
MIN
MAX
MIN
MAX
MILLIMETERS
0.249
0.263
6.30
6.70
INCHES
B
0.130
0.145
3.30
3.70
C
0.060
0.068
1.50
1.75
D
0.024
0.035
0.60
0.89
F
0.115
0.126
2.90
3.20
G
0.087
0.094
2.20
2.40
H
0.0008
0.0040
0.020
0.100
J
0.009
0.014
0.24
0.35
K
0.060
0.078
1.50
2.00
L
0.033
0.041
0.85
1.05
M
0
10
0
10
S
0.264
0.287
6.70
7.30
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
_
_
_
_
CASE 318E04
ISSUE H
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola
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