DS26C32AT/DS26C32AM
Quad Differential Line Receiver
General Description
The DS26C32A is a quad differential line receiver designed
to meet the RS-422, RS-423, and Federal Standards 1020
and 1030 for balanced and unbalanced digital data transmis-
sion, while retaining the low power characteristics of CMOS.
The DS26C32A has an input sensitivity of 200 mV over the
common mode input voltage range of
7V. The DS26C32A
features internal pull-up and pull-down resistors which pre-
vent output oscillation on unused channels.
The DS26C32A provides an enable and disable function
common to all four receivers, and features TRI-STATE
outputs with 6 mA source and sink capability. This product is
pin compatible with the DS26LS32A and the AM26LS32.
Features
n
CMOS design for low power
n
0.2V sensitivity over input common mode voltage
range
n
Typical propagation delays: 19 ns
n
Typical input hysteresis: 60 mV
n
Inputs won't load line when V
CC
= 0V
n
Meets the requirements of EIA standard RS-422
n
TRI-STATE outputs for connection to system buses
n
Available in Surface Mount
n
Mil-Std-883C compliant
Logic Diagram
00876401
Connection Diagrams
Dual-In-Line Package
00876402
Top View
Order Number DS26C32ATM or DS26C32ATN
See NS Package M16A or N16E
For Complete Military Product Specifications,
refer to the appropriate SMD or MDS.
Order Number DS26C32AME/883, DS26C32AMJ/883 or
DS26C32AMW/883
See NS Package E20A, J16A or W16A
20-Lead Ceramic Leadless Chip Carrier
00876412
TRI-STATE
is a registered trademark of National Semiconductor Corporation.
June 1998
DS26C32A
T/DS26C32AM
Quad
Differential
Line
Receiver
2004 National Semiconductor Corporation
DS008764
www.national.com
Absolute Maximum Ratings
(Notes 2,
1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
)
7V
Common Mode Range (V
CM
)
14V
Differential Input Voltage (V
DIFF
)
14V
Enable Input Voltage (V
IN
)
7V
Storage Temperature Range (T
STG
)
-65C to +150C
Lead Temperature (Soldering 4 sec.)
260C
Maximum Power Dissipation at 25C (Note 5)
Ceramic "J" Pkg.
2308 mW
Plastic "N" Pkg.
1645 mW
SOIC "M" Pkg.
1190 mW
Ceramic "E" Pkg.
2108 mW
Ceramic "W" Pkg.
1215 mW
Maximum Current Per Output
25 mA
This device does not meet 2000V ESD rating. (Note 4)
Operating Conditions
Min
Max
Units
Supply Voltage (V
CC
)
4.50
5.50
V
Operating Temperature Range (T
A
)
DS26C32AT
-40
+85
C
DS26C32AM
-55
+125
C
Enable Input Rise or Fall Times
500
ns
DC Electrical Characteristics
V
CC
= 5V
10% (unless otherwise specified) (Note 1)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
TH
Minimum Differential
V
OUT
= V
OH
or V
OL
-200
35
+200
mV
Input Voltage
-7V
<
V
CM
<
+7V
R
IN
Input Resistance
V
IN
= -7V, +7V
DS26C32AT
5.0
6.8
10
k
(Other Input = GND)
DS26C32AM
4.5
6.8
11
k
I
IN
Input Current
V
IN
= +10V,
DS26C32AT
+1.1
+1.5
mA
Other Input = GND
DS26C32AM
+1.1
+1.8
mA
V
IN
= -10V,
DS26C32AT
-2.0
-2.5
mA
Other Input = GND
DS26C32AM
-2.0
-2.7
mA
V
OH
Minimum High Level
V
CC
= Min, V
DIFF
= +1V
3.8
4.2
V
Output Voltage
I
OUT
= -6.0 mA
V
OL
Maximum Low Level
V
CC
= Max, V
DIFF
= -1V
0.2
0.3
V
Output Voltage
I
OUT
= 6.0 mA
V
IH
Minimum Enable High
2.0
V
Input Level Voltage
V
IL
Maximum Enable Low
0.8
V
Input Level Voltage
I
OZ
Maximum TRI-STATE
V
OUT
= V
CC
or GND,
Output Leakage Current
ENABLE = V
IL
,
0.5
5.0
A
ENABLE = V
IH
I
I
Maximum Enable Input
V
IN
= V
CC
or GND
1.0
A
Current
I
CC
Quiescent Power
V
CC
= Max,
DS26C32AT
16
23
mA
Supply Current
V
DIF
= +1V
DS26C32AM
16
25
mA
V
HYST
Input Hysteresis
V
CM
= 0V
60
mV
AC Electrical Characteristics
V
CC
= 5V
10% (Note 3)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DS26C32AT
DS26C32AM
t
PLH
,
Propagation Delay
C
L
= 50 pF
t
PHL
Input to Output
V
DIFF
= 2.5V
10
19
30
35
ns
V
CM
= 0V
DS26C32A
T/DS26C32AM
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2
AC Electrical Characteristics
(Continued)
V
CC
= 5V
10% (Note 3)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DS26C32AT
DS26C32AM
t
RISE
,
Output Rise and
C
L
= 50 pF
t
FALL
Fall Times
V
DIFF
= 2.5V
4
9
9
ns
V
CM
= 0V
t
PLZ
,
Propagation Delay
C
L
= 50 pF
t
PHZ
ENABLE to Output
R
L
= 1000
13
22
29
ns
V
DIFF
= 2.5V
t
PZL
,
Propagation Delay
C
L
= 50 pF
t
PZH
ENABLE to Output
R
L
= 1000
13
23
29
ns
V
DIFF
= 2.5V
Note 1: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device
should be operated at these limits. The table of "Electrical Characteristics" provides conditions for actual device operation.
Note 2: Unless otherwise specified, all voltages are referenced to ground.
Note 3: Unless otherwise specified, Min/Max limits apply over recommended operating conditions. All typicals are given for V
CC
= 5V and T
A
= 25C.
Note 4: ESD Rating: HBM (1.5 k
, 100 pF)
Inputs
2000V
All other pins
1000V
EIAJ (0
, 200 pF) 350V
Note 5: Ratings apply to ambient temperature at 25C. Above this temperature derate N Package 13.16 mW/C, J Package 15.38 mW/C, M Package 9.52 mW/C,
E Package 12.04 mW/C, and W package 6.94 mW/C.
Comparison Table of Switching Characteristics into "LS-Type" Load
(Figures 4, 5, 6) (Note 6)
Symbol
Parameter
Conditions
DS26C32A
DS26LS32A
Units
Typ
Typ
t
PLH
Input to Output
C
L
= 15 pF
17
23
ns
t
PHL
19
23
ns
t
LZ
ENABLE to Output
C
L
= 5 pF
13
15
ns
t
HZ
12
20
ns
t
ZL
ENABLE to Output
C
L
= 15 pF
13
14
ns
t
ZH
13
15
ns
Note 6: This table is provided for comparison purposes only. The values in this table for the DS26C32A reflect the performance of the device, but are not tested
or guaranteed.
Test and Switching Waveforms
00876403
FIGURE 1. Propagation Delay
DS26C32A
T/DS26C32AM
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3
Test and Switching Waveforms
(Continued)
AC Test Circuit and Switching Time Waveforms
00876404
C
L
includes load and test jig capacitance.
S
1
= V
CC
for t
PZL
, and t
PLZ
measurements.
S
1
= Gnd for t
PZH
and t
PHZ
measurements.
FIGURE 2. Test Circuit for TRI-STATE Output Tests
00876405
FIGURE 3. TRI-STATE
Output Enable and Disable Waveforms
00876406
FIGURE 4. Load Test Circuit for TRI-STATE Outputs for "LS-Type" Load
DS26C32A
T/DS26C32AM
www.national.com
4
AC Test Circuit and Switching Time Waveforms
(Continued)
Note 7: Diagram shown for ENABLE low.
Note 8: S1 and S2 of load circuit are closed except where shown.
Note 9: Pulse generator for all pulses: Rate
1.0 MHz; Z
O
= 50
; t
r
15 ns; t
f
6.0 ns.
Truth Table
ENABLE
ENABLE
Input
Output
L
H
X
Z
All Other
Combinations of
Enable Inputs
V
ID
V
TH
(Max)
H
V
ID
V
TH
(Min)
L
Open
H
Z = TRI-STATE
Typical Applications
Two-Wire Balanced Systems, RS-422
00876409
00876407
FIGURE 5. Propagation Delay for "LS-Type" Load (Notes 7, 9)
00876408
FIGURE 6. Enable and Disable Times for "LS-Type" Load (Notes 8, 9)
DS26C32A
T/DS26C32AM
www.national.com
5
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