ChipFind - документация

Электронный компонент: LF453

Скачать:  PDF   ZIP
TL H 9710
LF453
Wide-Bandwidth
Dual
JFET-Input
Operational
Amplifiers
December 1994
LF453 Wide-Bandwidth Dual
JFET-Input Operational Amplifiers
General Description
The LF453 is a low-cost high-speed dual JFET-input oper-
ational amplifier with an internally trimmed input offset volt-
age (BI-FET II technology) The device requires a low supply
current and yet the amplifiers maintain a large gain band-
width product and a fast slew rate In addition well matched
high voltage JFET input devices provide very low input bias
and offset currents The LF453 is pin compatible with the
standard LM1558 allowing designers to upgrade the overall
performance of existing designs
The LF453 may be used in such applications as high-speed
integrators fast D A converters sample-and-hold circuits
and many other circuits requiring low input bias current high
input impedance high slew rate and wide bandwidth
Features
Y
Internally trimmed offset voltage
5 0 mV (max)
Y
Low input bias current
50 pA (typ)
Y
Low input noise current
0 01 pA
S
Hz (typ)
Y
Wide gain bandwidth
4 MHz (typ)
Y
High slew rate
13 V ms (typ)
Y
Low supply current
6 5 mA (max)
Y
High input impedance
10
12
X
(typ)
Y
Low total harmonic distortion
k
0 02% (typ)
A
V
e
10 R
L
e
10k
V
O
e
20 V
p p
f
e
20 Hz 20 kHz
Y
Low 1 f noise corner
50 Hz (typ)
Y
Fast settling time to 0 01%
2 ms (typ)
Typical Connection
TL H 9710 1
Connection Diagram
SO Package
TL H 9710 2
Top View
Order Number LF453CM
See NS Package Number M08A
Simplified Schematic
TL H 9710 3
BI-FET II
TM
is a trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation
RRD-B30M115 Printed in U S A
Absolute Maximum Ratings
(Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage (V
a
b
V
b
)
36V
Input Voltage Range
V
b s
V
IN
s
V
a
Differential Input Voltage (Note 2)
g
30V
Junction Temperature (T
J
MAX)
150 C
Output Short Circuit Duration
Continuous
Power Dissipation (Note 3)
500 mW
ESD Tolerance
TBD
Soldering Information (Note 4)
SO Package Vapor Phase (60 sec )
215 C
Infrared (15 sec )
220 C
Operating Ratings
(Note 1)
Temperature Range
T
MIN
s
T
A
s
T
MAX
LF453CM
0 C
s
T
A
a
70 C
Junction Temperature (T
J max
)
125 C
Supply Voltage (V
a
b
V
b
)
10V to 32V
DC Electrical Characteristics
The following specifications apply for V
a
e a
15V and V
b
e b
15V Bold-
face limits apply for T
MIN
to T
MAX
all other limits T
A
e
T
J
e
25 C
LF453CM
Symbol
Parameter
Conditions
Typical
Tested
Design
Units
(Note 5)
Limit
Limit
(Note 6)
(Note 7)
V
OS
Maximum Input Offset Voltage
R
S
e
10 kX (Note 9)
5
mV
I
OS
Maximum Input Offset Current
(Notes 8 9) T
J
e
25 C
25
100
pA
T
J
e
70 C
2
nA
I
B
Maximum Input Bias Current
(Notes 8 9) T
J
e
25 C
50
200
pA
T
J
e
70 C
4
nA
R
IN
Input Resistance
T
J
e
25 C
10
12
X
AVOL
Minimum Large Signal
V
O
e
g
10V R
L
e
2 kX
200
50
25
V mV
Voltage Gain
(Note 9)
V
O
Minimum Output Voltage Swing
R
L
e
10k
g
13 5
g
12
g
12
V
V
CM
Minimum Input Common
a
14 5
a
11
a
11
V
Mode Voltage Range
b
11 5
b
11
b
11
V
CMRR
Minimum Common-Mode
R
S
s
10 kX
100
80
80
dB
Rejection Ratio
PSRR
Minimum Supply Voltage
(Note 10)
100
80
80
dB
Rejection Ratio
I
S
Maximum Supply Current
6 5
6 5
mA
AC Electrical Characteristics
The following specifications apply for V
a
e a
15V and V
b
e b
15V Limits
apply for T
A
e
T
J
e
25 C
LF453CM
Symbol
Parameter
Conditions
Typical
Tested
Design
Units
(Note 5)
Limit
Limit
(Note 6)
(Note 7)
SR
Slew Rate
A
V
e a
1
13
8
V ms
GBW
Minimum Gain-Bandwidth Product
f
e
100 kHz
4
2 7
MHz
e
n
Equivalent Input Noise Voltage
R
S
e
100X f
e
1 kHz
25
nV
S
Hz
i
n
Equivalent Input Noise Current
R
S
e
100X f
e
1 kHz
0 01
pA
S
Hz
Note 1
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur DC and AC electrical specifications do not apply when operating
the device beyond its specified operating ratings
Note 2
When the input voltage exceeds the power supplies the current should be limited to 1 mA
Note 3
The maximum power dissipation must be derated at elevated temperatures and is dictated by T
J
MAX H
JA
and the ambient temperature T
A
The
maximum allowable power dissipation at any temperature is P
D
e
(T
J
MAX
b
T
A
) H
JA
or the number given in the Absolute Maximum Ratings whichever is lower
For guaranteed operation T
J max
e
125 C The typical thermal resistance (H
JA
) of the LF453CM when board-mounted is 160 C W
Note 4
See AN-450 ``Surface Mounting Methods and Their Effect on Product Reliability'' (section titled ``Surface Mount'') for other methods of soldering surface
mount devices
Note 5
Typicals are at T
J
e
25 C and represent most likely parametric norm
Note 6
Tested limits are guaranteed to National's AOQL (Average Outgoing Quality Level)
Note 7
Design limits are guaranteed to National's AOQL but not 100% tested
Note 8
The input bias currents are junction leakage currents which approximately double for every 10 C increase in the junction temperature T
J
Due to limited
production test time the input bias currents are correlated to junction temperature In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation P
D
T
J
e
T
A
a
H
JA
P
D
where H
JA
is the thermal resistance from junction to ambient
Note 9
V
OS
I
B
AVOL and I
OS
are measured at V
CM
e
0V
Note 10
Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice
2
Typical Performance Characteristics
Input Bias Current
Input Bias Current
Supply Current
Voltage Limit
Positive Common-Mode Input
Voltage Limit
Negative Common-Mode Input
Positive Current Limit
Negative Current Limit
Voltage Swing
Output Voltage Swing
Gain Bandwidth
Bode Plot
Slew Rate
TL H 9710 4
3
Typical Performance Characteristics
(Continued)
Distortion vs Frequency
Voltage Swing
Undistorted Output
Frequency Response
Open Loop
Rejection Ratio
Common-Mode
Rejection Ratio
Power Supply
Noise Voltage
Equivalent Input
Open Loop Voltage Gain (V V)
Output Impedance
Inverter Settling Time
TL H 9710 5
4
Pulse Response
Small Signal Inverting
TL H 9710 6
Small Signal Non-Inverting
TL H 9710 7
Large Signal Inverting
TL H 9710 8
Large Signal Non-Inverting
TL H 9710 9
Current Limit (R
L
e
100 X)
TL H 9710 10
5