LM7372
High Speed, High Output Current, Dual Operational
Amplifier

General Description

The LM7372 is a high speed dual voltage feedback amplifier
that has the slewing characteristic of current feedback am-
plifiers; yet it can be used in all traditional voltage feedback
amplifier configurations.

The LM7372 is stable for gains as low as +2 or -1. It
provides a very high slew rate at 3000V/µs and a wide gain
bandwidth product of 120MHz, while consuming only
6.5mA/per amplifier of supply current. It is ideal for video and
high speed signal processing applications such as xDSL and
pulse amplifiers. With 150mA output current, the LM7372
can be used for video distribution, as a transformer driver or
as a laser diode driver.

Operation on

15V power supplies allows for large signal

swings

and

provides

greater

dynamic

range

and

signal-to-noise ratio. The LM7372 offers high SFDR and low
THD, ideal for ADC/DAC systems. In addition, the LM7372 is
specified for

5V operation for portable applications.

The LM7372 is built on National's Advance VIP

III (Verti-

cally integrated PNP) complementary bipolar process.

Features

-80dBc highest harmonic distortion

1MHz, 2V

Very high slew rate: 3000V/µs

Wide gain bandwidth product: 120MHz

-3dB frequency

= +2: 200MHz

Low supply current: 13mA (both amplifiers)

High open loop gain: 85dB

High output current: 150mA

Differential gain and phase: 0.01%, 0.02°

Applications

HDSL and ADSL Drivers

Multimedia broadcast systems

Professional video cameras

CATV/Fiber optics signal processing

Pulse amplifiers and peak detectors

HDTV amplifiers

Typical Application

20004903

FIGURE 1. Single Supply Application (SOIC-16)

February 2002

LM7372

High

Speed,

High

Output

Current,

Dual

Operational

Amplifier

DS200049

www.national.com

Absolute Maximum Ratings

(Notes 1,

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

ESD Tolerance

Human Body Model

1.5kV (Note 2)

Machine Model

200V (Note 2)

Suppy Voltage (V

-V

)

36V

Differential Input Voltage (V

15V)

10V

Output Short Circuit to Ground

(Note 3)

Continuous

Storage Temp. Range

-65°C to 150°C

Soldering Information

Infrared or Convection Reflow (20

sec.)

235°C

Wave Soldering Lead Temperature

(10 sec.)

260°C

Input Voltage

to V

Maximum Junction Temperature

(Note 4)

150°C

Operating Ratings

(Note 1)

Supply Voltage

36V

Junction Temperature Range(T

)

LM7372

-40°C

85°C

Thermal Resistance(

)

16-Pin SOIC See (Note 4)

106°C/W

70°C/W

LLP-8 Package

(See Application Section)

40°C/W

8-Pin PSOP

(See Application Section)

59°C/W

15V DC Electrical Characteristics

Unless otherwise specified, all limits guaranteed for T

= 25°C, V

= 0V and R

= 1k

. Boldface apply at the temperature

extremes.

Symbol

Parameter

Conditions

Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

Input Offset Voltage

2.0

8.0

10.0

TC V

Input Offset Voltage Average Drift

µV/°C

Input Bias Current

2.7

µA

Input Offset Current

0.1

4.0

6.0

µA

Input Resistance

Common Mode

Differential Mode

3.3

Open Loop Output Resistance

CMRR

Common Mode Rejection Ratio

10V

PSRR

Power Supply Rejection Ratio

15V to

Input Common-Mode Voltage Range

CMRR

60dB

Large Signal Voltage Gain (Note 7)

= 1k

= 100

Output Swing

= 1k

12.7

13.4

-13

-12.7

-13.3

OUT

= - 150mA

11.8

11.4

12.4

OUT

= 150mA

-11.2

-10.8

-11.9

Output Short Circuit Current

Sourcing

260

Sinking

250

LM7372

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15V DC Electrical Characteristics

(Continued)

Unless otherwise specified, all limits guaranteed for T

= 25°C, V

= 0V and R

= 1k

. Boldface apply at the temperature

extremes.

Symbol

Parameter

Conditions

Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

Supply Current (both Amps)

15V AC Electrical Characteristics

Unless otherwise specified, all limits guaranteed for T

= 25°C, V

= 0V and R

= 1k

. Boldface apply at the temperature

extremes.

Symbol

Parameter

Conditions

Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

Slew Rate (Note 8)

= +2, V

13V

P-P

3000

V/µs

= +2, V

10V

P-P

2000

Unity Bandwidth Product

120

MHz

-3dB Frequency

= +2

220

MHz

Phase Margin

VOL

= 6dB

deg

Settling Time (0.1%)

= -1, A

5V,

= 500

Propagation Delay

= -2, V

5V,

= 500

6.0

Differential Gain (Note 9)

0.01

Differential Phase (Note 9)

0.02

deg

hd2

Second Harmonic Distortion

= 1MHz, A

= +2

OUT

= 2V

P-P

, R

= 100

-80

dBc

OUT

= 16.8V

P-P

, R

= 100

-73

dBc

hd3

Third Harmonic Distortion

= 1MHz, A

= +2

OUT

= 2V

P-P

, R

= 100

-91

dBc

OUT

= 16.8V

P-P

, R

= 100

-67

dBc

IMD

Intermodulation Distortion

Fin 1 = 75kHz,

Fin 2 = 85kHz

OUT

= 16.8V

P-P

, R

= 100

-87

dBc

Input-Referred Voltage Noise

f = 10kHz

nV/

Input-Referred Current Noise

f = 10kHz

1.5

pA/

5V DC Electrical Characteristics

Unless otherwise specified, all limits guaranteed for T

= 25°C, V

= 0V and R

= 1k

. Boldface apply at the temperature

extremes.

Symbol

Parameter

Conditions

Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

Input Offset Voltage

2.2

8.0

10.0

TC V

Input Offset Voltage Average Drift

µV/°C

Input Bias Current

3.3

µA

Input Offset Current

0.1

µA

Input Resistance

Common Mode

Differential Mode

3.3

Open Loop Output Resistance

CMRR

Common Mode Rejection Ratio

2.5V

LM7372

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5V DC Electrical Characteristics

(Continued)

Unless otherwise specified, all limits guaranteed for T

= 25°C, V

= 0V and R

= 1k

. Boldface apply at the temperature

extremes.

Symbol

Parameter

Conditions

Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

PSRR

Power Supply Rejection Ratio

15V to

Input Common-Mode Voltage Range

CMRR

60dB

Large Signal Voltage Gain (Note 7)

= 1k

= 100

Output Swing

= 1k

3.2

3.0

3.4

-3.2

-3.0

-3.4

OUT

= - 80mA

2.5

2.2

2.8

OUT

= 80mA

-2.5

-2.2

-2.7

Output Short Circuit Current

Sourcing

150

Sinking

150

Supply Current (both Amps)

12.4

5V AC Electrical Characteristics

Unless otherwise specified, all limits guaranteed for T

= 25°C, V

= 0V and R

= 1k

. Boldface apply at the temperature

extremes.

Symbol

Parameter

Conditions

Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

Slew Rate (Note 8)

= +2, V

P-P

700

V/µs

Unity Bandwidth Product

100

MHz

-3dB Frequency

= +2

125

MHz

Phase Margin

deg

Settling Time (0.1%)

= -1, V

1V, R

500

Propagation Delay

= +2, V

1V, R

500

Differential Gain (Note 9)

0.02

Differential Phase (Note 9)

0.03

deg

hd2

Second Harmonic Distortion

= 1MHz, A

= +2

OUT

= 2V

P-P

, R

= 100

-84

dBc

hd3

Third Harmonic Distortion

= 1MHz, A

= +2

OUT

= 2V

P-P

, R

= 100

-94

dBc

Input-Referred Voltage Noise

f = 10kHz

nV/

Input-Referred Current Noise

f = 10kHz

1.8

pA/

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.

Note 2: For testing purposes, ESD was applied using human body model, 1.5k

in series with 100pF. Machine model, 0

in series with 200pF.

Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150°C.

LM7372

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Simplified Schematic Diagram

20004928

Application Notes

The LM7372 is a high speed dual operational amplifier with
a very high slew rate and very low distortion, yet like many
other op amps, it is used in conventional voltage feedback
amplifier applications. Also, again like many op amps, it has
a class AB output stage in order to be able to deliver high
currents to low impedance loads, yet draw very little quies-
cent supply current. For most op-amps in typical applica-
tions, this topology means that internal power dissipation is
rarely an issue, even with the trend to smaller surface mount
packages. However, the LM7372 has been designed for
applications where significant levels of power dissipation will
be encountered, and an effective means of removing the
internal heat generated by this power dissipation is needed
to maintain the semiconductor junction temperature at ac-
ceptable levels, particularly in environments with elevated
ambient temperatures.

Several factors contribute to power dissipation and conse-
quently higher semiconductor junction temperatures, and
these factors need to be well understood if the LM7372 is to
perform to the desired specifications in a given application.
Since different applications will have different dissipation
levels and different compromises can be made between the
ways these factors will contribute to the total junction tem-
perature, this section will examine the typical application
shown on the front page of this data sheet as an example,
and offer suggestions for solutions where excessive junction
temperatures are encountered.

There are two major contributors to the internal power dissi-
pation; the product of the supply voltage and the LM7372
quiescent current when no signal is being delivered to the
external load, and the additional power dissipated while
delivering power to the external load. The first of these
components is easy to calculate simply by inspection of the
data sheet. The LM7372 quiescent supply current is given as
6.5mA per amplifier, so with a 24Volt supply the power
dissipation is

PQ = V

x 2Iq

= V

+ V

)

= 24 x (6.5 x 10-3)

= 312mW

This is already a high level of internal power dissipation, and
in a small surface mount package with a thermal resistance
(

= 140°C/Watt (a not unreasonable value for an SO-8

package) would result in a junction temperature 140°C/W x
0.312W = 43.7°C above the ambient temperature. A similar
calculation using the worst case maximum current limit at an
85°C ambient will yield a power dissipation of 456mW with a
junction temperature of 149°C, perilously close to the maxi-
mum permitted junction temperature of 150°C!

The second contributor to high junction temperature is the
additional power dissipated internally when power is being
delivered to the external load. This cause of temperature rise
can be less amenable to calculation, even when the actual
operating conditions are known.

For a Class B output stage, one transistor of the output pair
will conduct the load current as the output voltage swings
positive, with the other transistor drawing no current, and
hence dissipating no power. During the other half of the
signal swing this situation is reversed, with the lower transis-
tor sinking the load current and the upper transistor is cut off.
The current in each transistor will be a half wave rectified
version of the total load current. Ideally neither transistor will
dissipate power when there is no signal swing, but will
dissipate increasing power as the output current increases.
However, as the signal voltage across the load increases
with load current, the voltage across the output transistor
(which is the difference voltage between the supply voltage
and the instantaneous voltage across the load) will decrease
and a point will be reached where the dissipation in the
transistor will begin to decrease again. If the signal is driven
into a square wave, ideally the transistor dissipation will fall
all the way back to zero.

LM7372

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Application Notes

(Continued)

For each amplifier then, with an effective load each of R

and

a sine wave source, integration over the half cycle with a
supply voltage V

and a load voltage V

yields the average

power dissipation

= V

- V

/2R

..........(1)

Where V

is the supply voltage and V

is the peak signal

swing across the load R

For the package, the power dissipation will be doubled since
there are two amplifiers in the package, each contributing
half the swing across the load.

The circuit in

Figure 1 is using the LM7372 as the upstream

driver in an ADSL application with Discrete MultiTone modu-
lation. With DMT the upstream signal is spread into 32
adjacent channels each 4kHz wide. For transmission over
POTS, the regular telephone service, this upstream signal
from the CPE (Customer Premise Equipment) occupies a
frequency band from around 20kHz up to a maximum fre-
quency of 135kHz. At first sight, these relatively low trans-
mission frequencies certainly do not seem to require the use
of very high speed amplifiers with GBW products in the
range of hundreds of megahertz. However, the close spac-
ing of multiple channels places stringent requirements on the
linearity of the amplifier, since non-linearities in the presence
of multiple tones will cause harmonic products to be gener-
ated that can easily interfere with the higher frequency down
stream signals also present on the line. The need to deliver
3rd Harmonic distortion terms lower than -75dBc is the
reason for the LM7372 quiescent current levels. Each am-
plifier is running over 3mA in the output stage alone in order
to minimize crossover distortion.

xDSL signal levels are adjusted to provide a given power
level on the line, and in the case of ADSL this is an average
power of 13dBm. For a line with a characteristic impedance
of 100

this is only 20mW. Because the transformer shown

Figure

part

transceiver

circuit,

two

back-termination resistors are connected in series with each
amplifier output. Therefore the equivalent R

for each ampli-

fier is also 100

, and each amplifier is required to deliver

20mW to this load.

Since V

/2RL = 20mW then V

= 2V(peak).

Using Equation (1) with this value for signal swing and a 24V
supply, the internal power dissipation per amplifier is
132.8mW. Adding the quiescent power dissipation to the
amplifier dissipation gives the total package internal power
dissipation as

D(Total)

= 312mW + (2 x 132.8mW) = 578mW

This result is actually quite pessimistic because it assumes
that the dissipation as a result of load current is simply added
to the dissipation as a result of quiescent current. This is not
correct since the AB bias current in the output stage is
diverted to load current as the signal swing amplitude in-
creases from zero. In fact with load currents in excess of
3.3mA, all the bias current is flowing in the load, conse-
quently reducing the quiescent component of power dissipa-
tion. Also, it assumes a sine wave signal waveform when the
actual waveform is composed of many tones of different
phases and amplitudes which may demonstrate lower aver-
age power dissipation levels.

The average current for a load power of 20mW is 14.1mA.
Neglecting the AB bias current this appears as a full-wave
rectified current waveform in the supply current with a peak
value of 19.9mA. The peak to average ratio for a waveform
of this shape is 1.57, so the total average load current is

12.7mA. Adding this to the quiescent current, and subtract-
ing the power dissipated in the load gives the same package
power dissipation level calculated above. Nevertheless,
when the supply current peak swing is measured, it is found
to be significantly lower because the AB bias current is
contributing to the load current. The supply current has a
peak swing of only 14mA (compared to 19.9mA) superim-
posed on the quiescent current, with a total average value of
only 21mA. Therefore the total package power dissipation in
this application is

D(Total)

= (V

x Iavg) - Power in Load

= (24 x 21)mW - 40mW

= 464mW

This level of power dissipation would not take the junction
temperature in the SO-8 package over the absolute maxi-
mum rating at elevated ambient temperatures (barely), but
there is no margin to allow for component tolerances or
signal variances.

To develop 20mW in a 100

requires each amplifier to

deliver a peak voltage of only 2V, or 4V(

P-P

). This level of

signal swing does not require a high supply voltage but the
application uses a 24V supply. This is because the modula-
tion technique uses a large number of tones to transmit the
data. While the average power level is held to 20mW, at any
time the phase and amplitude of individual tones will be such
as to generate a combined signal with a higher peak value
than 2V. For DMT this crest factor is taken to be around 5.33
so each amplifier has to be able to handle a peak voltage
swing of

Lpeak

= 1.4 x 5.33 = 7.5V or 15V(

P-P

)

If other factors, such as transformer loss or even higher peak
to average ratios are allowed for, this means the amplifiers
must each swing between 16 to 18V(

P-P

The required signal swing can be reduced by using a step-up
transformer to drive the line. For example a 1:2 ratio will
reduce the peak swing requirement by half, and this would
allow the supply to be reduced by a corresponding amount.
This is not recommended for the LM7372 in this particular
application for two reasons. Although the quiescent power
contribution to the overall dissipation is reduced by about
150mW, the internal power dissipation to drive the load
remains the same, since the load for each amplifier is now
25

instead of 100

. Furthermore, this is a transceiver

application where downstream signals are simultaneously
appearing at the transformer secondary. The down stream
signals appear differentially across the back termination re-
sistors and are now stepped down by the transformer turns
ratio with a consequent loss in receiver sensitivity compared
to using a 1:1 transformer. Any trade-off to reduce the supply
voltage by an increase in turns ratio should bear these
factors in mind, as well as the increased signal current levels
required with lower impedance loads.

At an elevated ambient temperature of 85°C and with an
average power dissipation of 464mW, a package thermal
resistance between 60°C/W and 80°C/W will be needed to
keep the maximum junction temperature in the range 110°C
to 120°C. The PSOP or LLP package would be the package
of choice here with ample board copper area to aid in heat
dissipation (see table 2).

For most standard surface mount packages, SO-8, SO-14,
SO-16 etc, the only means of heat removal from the die is
through the bond wires to external copper connecting to the
leads. Usually it will be difficult to reduce the thermal resis-

LM7372

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Application Notes

(Continued)

tance of these packages below 100°C/W by these methods
and several manufacturers, including National, offer pack-
age modifications to enhance the thermal characteristics.

Improved removal of internal heat can be achieved by di-
rectly connecting bond wires to the lead frame inside the
package. Since this lead frame supports the die attach
paddle, heat is transferred directly from the substrate to the
outside copper by these bond wires. For an 8 pin package,
this enhancement is somewhat limited since only the V-bond
wire can be used, because it is the only lead at the same
voltage as the substrate and there is an electrical connection
as well as a thermal connection.

The LM7372 is available in the SOIC-16 package. Since only
8 pins are needed for the two operational amplifiers, the
remaining pins are used for heat sink purposes. Each of the
end pins, 1,8,9 & 16 are internally bonded to the lead frame
and form an effective means of transferring heat to external
copper. This external copper can be either electrically iso-
lated or be part of the topside ground plane in a single supply
application.

Figure 2. shows a copper pattern which can be used to
dissipate internal heat from the LM7372.

Table 1 gives some

values of

for different values of L and H with 1oz copper.

TABLE 1. Thermal Resistance with Area of Cu

Package

L (in)

H (in)

(°C/W)

SOIC 16

0.5

SOIC 16

1.5

From

Table 1 it is apparent that two areas of 1oz copper at

each end of the package, each 2 in

in area (for a total of

2600mm

) will be sufficient to hold the maximum junction

temperature under 120°C with an 85°C ambient temperature.

An even better package for removing internally generated
heat is a package with an exposed die attach paddle. The
LM7372 is also available in the 8 lead LLP and PSOP
packages. For these packages the entire lower surface of
the paddle is not covered with plastic, which would otherwise
act as a thermal barrier to heat transfer. Heat is transferred
directly from the die through the paddle rather than through

the small diameter bonding wires. Values of

in °C/W for

the LLP package with various areas and weights of copper
are tabulated below.

TABLE 2. Thermal Resistance of LLP Package

Copper

Area

0.5 in

1.0 in

2.0 in

Top

Layer

Only

0.5 oz

1.0 oz

2.0 oz

115

105

102

Bottom

Layer

Only

0.5 oz

1.0 oz

2.0 oz

102

Top And

Bottom

0.5 oz

1.0 oz

2.0 oz

Table 2 clearly demonstrates the superior thermal qualities
of the exposed pad package. For example, using the topside
copper only in the same way as shown for the SOIC package
(

Figure 2), with the L dimension held at 1 inch, the LLP

requires half the area of 1 oz copper at each end of the
package (1 in

, for a total of 1300mm

), for a comparable

thermal resistance of 72°C/Watt. This gives considerably
more flexibility in the pcb layout aside from using less cop-
per.

The shape of the heat sink shown in

Figure 2 is necessary to

allow external components to be connected to the package
pins. If thermal vias are used beneath the LLP to the bottom
side ground plane, then a square pattern heat sink can be
used and there is no restriction on component placement on
the top side of the board. Even better thermal characteristics
are obtained with bottom layer heatsinking. A 2 inch square
of 0.5oz copper gives the same thermal resistance (81°C/W)
as a competitive thermally enhanced SO-8 package which
needs two layers of 2 oz copper, each 4 in

(for a total of

5000 mm

). With heavier copper, thermal resistances as low

as 54°C/W are possible with bottom side heatsinking only,
substantially improving the long term reliability since the
maximum junction temperature is held to less than 110°C,
even with an ambient temperature of 85°C. If both top and
bottom copper planes are used, the thermal resistance can
be brought to under 40°C/W.

Power Supplies

The LM7372 is fabricated on a high voltage, high speed
process. Using high supply voltages ensures adequate
headroom to give low distortion with large signal swings. In
Figure 1, a single 24V supply is used. To maximize the
output dynamic range the non-inverting inputs are biassed to
half supply voltage by the resistive divider R1, R2. The input
signals are AC coupled and the coupling capacitors (C1, C2)
can be scaled with the bias resistors (R3, R4) to form a high
pass filter if unwanted coupling from the POTS signal oc-
curs.

Supply decoupling is important at both low and high frequen-
cies. The 10µF Tantalum and 0.1µF Ceramic capacitors
should be connected close to the supply Pin 14. Note that
the V

pin (pin 6), and the PCB area associated with the

heatsink (Pins 1,8,9 & 16) are at the same potential. Any
layout should avoid running input signal leads close to this
ground plane, or unwanted coupling of high frequency sup-
ply currents may generate distortion products.

Although this application shows a single supply, conversion
to a split supply is straightforward. The half supply resistive

20004925

FIGURE 2. Copper Heatsink Patterns

LM7372

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Application Notes

(Continued)

divider network is eliminated and the bias resistors at the
non-inverting inputs are returned to ground, see

Figure 3

(the pin numbers in

Figure 3 are given for the LLP and PSOP

packages, those in

Figure 1 are for the SOIC package). With

a split supply, note that the ground plane and the heatsink
copper must be separate and are at different potentials, with
the heatsink (pin 4 of the LLPand PSOP, pins 6,1,8,9 &16 of
the SOIC) now at a negative potential (V

In either configuration, the area under the input pins should
be kept clear of copper (Whether ground plane copper or
heatsink copper) to avoid parasitic coupling to the inputs.

The LM7372 is stable with non inverting closed loop gains as
low as +2. Typical of any voltage feedback operational am-
plifier, as the closed loop gain of the LM7372 is increased,
there is a corresponding reduction in the closed loop signal
bandwidth. For low distortion performance it is recom-
mended to keep the closed loop bandwidth at least 10X the
highest signal frequency. This is because there is less loop
gain (the difference between the open loop gain and the
closed loop gain) available at higher frequencies to reduce
harmonic distortion terms.

Printed Circuit Board Layout and Evaluation Boards:

Generally, a good high-frequency layout will keep power
supply and ground traces away from the inverting input and
output pins. Parasitic capacitance on these nodes to ground
will cause frequency response peaking and possible circuit
oscillations (see Application Note OA-15 for more informa-
tion). National Semiconductor suggests the following evalu-
ation boards as a guide for high frequency layout and as an
aid in device testing and characterization:

Device

Package

Evaluation

Board PN

LM7372MA

16-Pin SOIC

None

LM7372ILD

8-Pin LLP

CLC730114

LM7372MR

8-Pin PSOP

CLC730121

These free evaluation boards are shipped automatically
when a device sample request is placed with National Semi-
conductor.

The DAP (die attach paddle) on the LLP-8, and the PSOP
should be tied to V

. It should not be tied to ground. See

respective Evaluation Board documentation.

20004926

FIGURE 3. Split Supply Application (LLP)

LM7372

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Physical Dimensions

inches (millimeters) unless otherwise noted (Continued)

8-Pin PSOP

NS Package Number MRA08A

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whose failure to perform when properly used in
accordance with instructions for use provided in the
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significant injury to the user.

2. A critical component is any component of a life

support device or system whose failure to perform
can be reasonably expected to cause the failure of
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LM7372

High

Speed,

High

Output

Current,

Dual

Operational

Amplifier

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: LM7372

Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: LM7372

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: LM7372