LMS1487
5V Low Power RS-485 / RS-422 Differential Bus
Transceiver
General Description
The LMS1487 is a low power differential bus/line transceiver
designed for high speed bidirectional data communication on
multipoint bus transmission lines. It is designed for balanced
transmission lines. It meets ANSI Standards TIA/EIA
RS422-B, TIA/EIA RS485-A and ITU recommendation and
V.11 and X.27. The LMS1487 combines a TRI-STATE
TM
differential line driver and differential input receiver, both of
which operate from a single 5.0V power supply. The driver
and receiver have an active high and active low, respec-
tively, that can be externally connected to function as a
direction control. The driver and receiver differential inputs
are internally connected to form differential input/output (I/O)
bus ports that are designed to offer minimum loading to bus
whenever the driver is disabled or when V
CC
= 0V. These
ports feature wide positive and negative common mode
voltage ranges, making the device suitable for multipoint
applications in noisy environments. The LMS1487 is avail-
able in a 8-Pin SOIC and 8-pin DIP packages. It is a drop-in
socket replacement to Maxim's MAX1487
Features
n
Meet ANSI standard RS-485-A and RS-422-B
n
Data rate 2.5 Mbps
n
Single supply voltage operation, 5V
n
Wide input and output voltage range
n
Thermal shutdown protection
n
Short circuit protection
n
Low quiescent current 320A
n
Allows up to 128 transceivers on the bus
n
Open circuit fail-safe for receiver
n
Extended operating temperature range -40C to 85C
n
Drop-in replacement to MAX1487
n
Available in 8-pin SOIC and 8-pin DIP package
Applications
n
Low power RS-485 systems
n
Network hubs, bridges, and routers
n
Point of sales equipment (ATM, barcode scanners,...)
n
Local area networks (LAN)
n
Integrated service digital network (ISDN)
n
Industrial programmable logic controllers
n
High speed parallel and serial applications
n
Multipoint applications with noisy environment
Typical Application
20053001
A Typical multipoint application is shown in the above figure. Terminating resistors, RT, are typically required but only located at the two ends of the cable.
Pull up and pull down resistors maybe required at the end of the bus to provide fail-safe biasing. The biasing resistors provide a bias to the cable when all
drivers are in TRI-STATE, See National Application Note, AN-847 for further information.
April 2003
LMS1487
5V
Low
Power
RS-485
/
RS-422
Differential
Bus
T
ransceiver
2003 National Semiconductor Corporation
DS200530
www.national.com
Connection Diagram
8-Pin SOIC / DIP
20053002
Top View
Truth Table
DRIVER SECTION
RE
DE
DI
A
B
X
H
H
H
L
X
H
L
L
H
X
L
X
Z
Z
RECEIVER SECTION
RE
DE
A-B
RO
L
L
+0.2V
H
L
L
-0.2V
L
H
X
X
Z
L
L
OPEN
*
H
Note: * = Non Terminated, Open Input only
X = Irrelevant
Z = TRI-STATE
H = High level
L = Low level
Pin Descriptions
Pin # I/O
Name
Function
1
O
RO
Receiver Output: If A
>
B by 200 mV, RO will be high; If A
<
B by 200mV, RO will be low. RO
will be high also if the inputs (A and B) are open (non-terminated
2
I
RE
Receiver Output Enable: RO is enabled when RE is low; RO is in TRI-STATE when RE is high
3
I
DE
Driver Output Enable: The driver outputs (A and B) are enabled when DE is high; they are in
TRI-STATE when DE is low. Pins A and B also function as the receiver input pins (see below)
4
I
DI
Driver Input: A low on DI forces A low and B high while a high on DI forces A high and B low
when the driver is enabled
5
N/A
GND
Ground
6
I/O
A
Non-inverting Driver Output and Receiver Input pin. Driver Output levels conform to RS-485
signaling levels
7
I/O
B
Inverting Driver Output and Receiver Input pin. Driver Output levels conform to RS-485 signaling
levels
8
N/A
V
CC
Power Supply: 4.75V
V
CC
5.25V
LMS1487
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Ordering Information
Package
Part Number
Package Marking
Transport Media
NSC Drawing
8-Pin SOIC
LMS1487CM
LMS1487CM
95 Units/Rail
M08A
LMS1487CMX
2.5k Units Tape and Reel
LMS1487IM
LMS1487IM
95 Units/Rail
LMS1487IMX
2.5k Units Tape and Reel
8-Pin DIP
LMS1487CNA
LMS1487CNA
40 Units/Rail
N08E
LMS1487INA
LMS1487INA
40 Units/Rail
LMS1487
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3
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage, V
CC
(Note 2)
7V
Input Voltage, V
IN
(DI, DE, or RE)
-0.3V to V
CC
+ 0.3V
Voltage Range at Any Bus Terminal
(AB)
-7V to 12V
Receiver Outputs
-0.3V to V
CC
+ 0.3V
Package Thermal Impedance,
JA
SOIC
125C/W
DIP
88C/W
Junction Temperature (Note 3)
150C
Operating Free-Air Temperature
Range, T
A
Commercial
0C to 70C
Industrial
-40C to 85C
Storage Temperature Range
-65C to 150C
Soldering Information
Infrared or Convection (20 sec.)
235C
Lead Temperature
260C
ESD Rating (Note 4)
7kV
Operating Ratings
Min Nom Max
Supply Voltage, V
CC
4.75
5.0
5.25
V
Voltage at any Bus Terminal
(Separately or Common Mode)
-7
12
V
V
IN
or V
IC
High-Level Input Voltage, V
IH
(Note 5)
2
V
Low-Level Input Voltage, V
IL
(Note 5)
0.8
V
Differential Input Voltage, V
ID
(Note 6)
12
V
High-Level Output
Driver, I
OH
-150 mA
Receiver, I
OH
-42
mA
Low-Level Output
Driver, I
OL
80
mA
Receiver, I
OL
26
mA
Electrical Characteristics
Over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Driver Section
| V
OD1
|
Differential Output Voltage
R =
(Figure 1)
5.25
V
| V
OD2
|
Differential Output Voltage
R = 50
(Figure 1) ,RS-422
2.0
V
R = 27
(Figure 1) ,RS-485
1.5
5.0
V
OD
Change in Magnitude of
Driver Differential Output
Voltage for Complementary
Output States
R = 27
or 50 (Figure 1) , (Note 7)
0.2
V
V
OC
Common-Mode Output
Voltage
R = 27
or 50 (Figure 1)
3.0
V
V
OC
Change in Magnitude of
Driver Common-Mode Output
Voltage for Complementary
Output States
R = 27
or 50 (Figure 1), (Note 7)
0.2
V
V
IH
CMOS Inout Logic Threshold
High
DE, DI, RE
2.0
V
V
IL
CMOS Input Logic Threshold
Low
DE, DI, RE
0.8
V
I
IN1
Logic Input Current
DE, DI, RE
2
A
Receiver Section
I
IN2
Input Current (A, B)
DE = 0V, V
CC
= 0V or 5.25V
V
IN
= 12V
0.25
mA
V
IN
= - 7V
-0.2
V
TH
Differential Input Threshold
Voltage
-7V
V
CM
+ 12V
-0.2
+0.2
V
V
TH
Input Hysteresis Voltage
(V
TH+
- V
TH-
)
V
CM
= 0
95
mV
LMS1487
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Electrical Characteristics
(Continued)
Over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
OH
CMOS High-level Output
Voltage
I
OH
= -4mA, V
ID
= 200mV
3.5
V
V
OL
CMOS Low-level
I
OL
= 4mA, V
ID
= -200mV
0.40
V
I
OZR
Tristate Output Leakage
Current
0.4V
V
O
+ 2.4V
1
A
R
IN
Input Resistance
- 7V
V
CM
+12V
48
k
Power Supply Current
I
CC
Supply Current
DE = V
CC,
RE = GND or V
CC
320
500
A
DE = 0V, RE = GND or V
CC
315
400
I
OSD1
Driver Short-circuit Output
Current
V
O
= high, -7V
V
CM
+ 12V
(Note 8)
35
250
mA
I
OSD2
Driver Short-circuit Output
Current
V
O
= low, - 7V
V
CM
+ 12V
(Note 8)
35
250
mA
I
OSR
Receiver Short-circuit Output
Current
0 V
V
O
V
CC
7
95
mA
Switching Characteristics
Driver
T
PLH
,
T
PHL
Propagation Delay Input to
Output
R
L
= 54
, C
L
= 100pF
(Figure 3, Figure 7)
10
35
60
nS
T
SKEW
Driver Output Skew
R
L
= 54
, C
L
= 100 pF
(Figure 3, Figure 7)
5
10
nS
T
R
,
T
F
Driver Rise and Fall Time
R
L
= 54
, C
L
= 100 pF
(Figure 3, Figure 7)
3
8
40
nS
T
ZH
,
T
ZL
Driver Enable to Ouput Valid
Time
C
L
= 100 pF, R
L
= 500
(Figure 4, Figure 8)
25
70
nS
T
HZ
,
T
LZ
Driver Output Disable Time
C
L
= 15 pF, R
L
= 500
(Figure 4,
Figure 8)
30
70
nS
Receiver
T
PLH
,
T
PHL
Propagation Delay Input to
Output
R
L
= 54
, C
L
= 100 pF
(Figure 5, Figure 7)
20
50
200
nS
T
SKEW
Receiver Output Skew
R
L
= 54
, C
L
= 100 pF
(Figure 5, Figure 7)
5
nS
T
ZH
,
T
ZL
Receiver Enable Time
C
L
= 15 pF, R
L
= 1 k
(Figure 6, Figure 10)
20
50
nS
Receiver Disable Time
20
50
nS
F
MAX
Maximum Data Rate
2.5
Mbps
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics
Note 2: All voltage values, except differential I/O bus voltage, are with respect to network ground terminal.
Note 3: The maximum power dissipation is a function of T
J(MAX)
,
JA
, and T
A
. The maximum allowable power dissipation at any ambient temperature is P
D
=
(T
J(MAX)
- T
A
)/
JA
. All numbers apply for packages soldered directly into a PC board.
Note 4: ESD rating based upon human body model, 100pF discharged through 1.5k
.
Note 5: Voltage limits apply to DI, DE, RE pins.
Note 6: Differential input/output bus voltage is measured at the non-inverting terminal A with respect to the inverting terminal B.
Note 7: |
V
OD
| and |
V
OC
| are changes in magnitude of V
OD
and V
OC
, respectively when the input changes from high to low levels.
Note 8: Peak current
LMS1487
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