LPC660
Low Power CMOS Quad Operational Amplifier
General Description
The LPC660 CMOS Quad operational amplifier is ideal for
operation from a single supply. It features a wide range of
operating voltages from +5V to +15V and features rail-to-rail
output swing in addition to an input common-mode range
that includes ground. Performance limitations that have
plagued CMOS amplifiers in the past are not a problem with
this design. Input V
OS
, drift, and broadband noise as well as
voltage gain (into 100 k
and 5 k
) are all equal to or better
than widely accepted bipolar equivalents, while the power
supply requirement is typically less than 1 mW.
This chip is built with National's advanced Double-Poly
Silicon-Gate CMOS process.
See the LPC662 datasheet for a Dual CMOS operational
amplifier and LPC661 datasheet for a single CMOS opera-
tional amplifier with these same features.
Applications
n
High-impedance buffer
n
Precision current-to-voltage converter
n
Long-term integrator
n
High-impedance preamplifier
n
Active filter
n
Sample-and-Hold circuit
n
Peak detector
Features
n
Rail-to-rail output swing
n
Micropower operation:
(1 mW)
n
Specified for 100 k
and 5 k
loads
n
High voltage gain:
120 dB
n
Low input offset voltage:
3 mV
n
Low offset voltage drift:
1.3 V/C
n
Ultra low input bias current:
2 fA
n
Input common-mode includes V
-
n
Operation range from +5V to +15V
n
Low distortion:
0.01% at 1 kHz
n
Slew rate:
0.11 V/s
n
Full military temp. range available
Connection Diagram
14-Pin DIP/SO
DS010547-1
Top View
March 1998
LPC660
Low
Power
CMOS
Quad
Operational
Amplifier
1999 National Semiconductor Corporation
DS010547
www.national.com
Absolute Maximum Ratings
(Note 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Differential Input Voltage
Supply Voltage
Supply Voltage (V
+
- V
-
)
16V
Output Short Circuit to V
+
(Note 11)
Output Short Circuit to V
-
(Note 1)
Lead Temperature
(Soldering, 10 sec.)
260C
Storage Temp. Range
-65C to +150C
Junction Temperature (Note 2)
150C
ESD Rating
(C = 100 pF, R = 1.5 k
)
1000V
Power Dissipation
(Note 2)
Current at Input Pin
5 mA
Current at Output Pin
18 mA
Voltage at Input/Output Pin
(V
+
) + 0.3V, (V
-
) - 0.3V
Current at Power Supply Pin
35 mA
Operating Ratings
(Note 3)
Temperature Range
LPC660AM
-55C
T
J
+125C
LPC660AI
-40C
T
J
+85C
LPC660I
-40C
T
J
+85C
Supply Range
4.75V to 15.5V
Power Dissipation
(Note 9)
Thermal Resistance (
JA
), (Note 10)
14-Pin Ceramic DIP
90C/W
14-Pin Molded DIP
85C/W
14-Pin SO
115C/W
14-Pin Side Brazed Ceramic DIP
90C/W
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J
= 25C. Boldface limits apply at the temperature extremes. V
+
= 5V, V
-
= 0V, V
CM
= 1.5V, V
O
= 2.5V, and R
L
>
1M unless otherwise specified.
Parameter
Conditions
Typ
LPC660AM
LPC660AI
LPC660I
Units
LPC660AMJ/883
Limit
Limit
Limit
(Notes 4, 8)
(Note 4)
(Note 4)
Input Offset Voltage
1
3
3
6
mV
3.5
3.3
6.3
max
Input Offset Voltage
1.3
V/C
Average Drift
Input Bias Current
0.002
20
pA
100
4
4
max
Input Offset Current
0.001
20
pA
100
2
2
max
Input Resistance
>
1
Tera
Common Mode
0V
V
CM
12.0V
83
70
70
63
dB
Rejection Ratio
V
+
= 15V
68
68
61
min
Positive Power Supply
5V
V
+
15V
83
70
70
63
dB
Rejection Ratio
68
68
61
min
Negative Power Supply
0V
V
-
-10V
94
84
84
74
dB
Rejection Ratio
82
83
73
min
Input Common Mode
V
+
= 5V & 15V
-0.4
-0.1
-0.1
-0.1
V
Voltage Range
For CMRR
>
50 dB
0
0
0
max
V
+
- 1.9
V
+
- 2.3
V
+
- 2.3
V
+
- 2.3
V
V
+
- 2.6
V
+
- 2.5
V
+
- 2.5
min
Large Signal
R
L
= 100 k
(Note 5)
1000
400
400
300
V/mV
Voltage Gain
Sourcing
250
300
200
min
Sinking
500
180
180
90
V/mV
70
120
70
min
R
L
= 5 k
(Note 5)
1000
200
200
100
V/mV
Sourcing
150
160
80
min
Sinking
250
100
100
50
V/mV
35
60
40
min
www.national.com
3
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J
= 25C. Boldface limits apply at the temperature extremes. V
+
= 5V, V
-
= 0V, V
CM
= 1.5V, V
O
= 2.5, and R
L
>
1M unless otherwise specified.
Parameter
Conditions
Typ
LPC660AM
LPC660AI
LPC660I
Units
LPC660AMJ/883
Limit
Limit
Limit
(Notes 4, 8)
(Note 4)
(Note 4)
Slew Rate
(Note 6)
0.11
0.07
0.07
0.05
V/s
0.04
0.05
0.03
min
Gain-Bandwidth Product
0.35
MHz
Phase Margin
50
Deg
Gain Margin
17
dB
Amp-to-Amp Isolation
(Note 7)
130
dB
Input Referred Voltage Noise
F = 1 kHz
42
Input Referred Current Noise
F = 1 kHz
0.0002
Total Harmonic Distortion
F = 1 kHz, A
V
= -10
0.01
%
R
L
= 100 k
, V
O
= 8 V
PP
Note 1: Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature and/or multiple Op Amp shorts
can result in exceeding the maximum allowed junction temperature of 150C. Output currents in excess of
30 mA over long term may adversely affect reliability.
Note 2: The maximum power dissipation is a function of T
J(max)
,
JA
and T
A
. The maximum allowable power dissipation at any ambient temperature is P
D
=
(T
J(max)
T
A
)
JA
.
Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is in-
tended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed.
Note 4: Limits are guaranteed by testing or correlation.
Note 5: V
+
= 15V, V
CM
= 7.5V and R
L
connected to 7.5V. For Sourcing tests, 7.5V
V
O
11.5V. For Sinking tests, 2.5V
V
O
7.5V.
Note 6: V
+
= 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
Note 7: Input referred. V
+
= 15V and R
L
= 100 k
connected to V
+
/2. Each amp excited in turn with 1 kHz to produce V
O
= 13 V
PP
.
Note 8: A military RETS electrical test specification is available on request. At the time of printing, the LPC660AMJ/883 RETS specification complied fully with the
boldface limits in this column. The LPC660AMJ/883 may also be procured to a Standard Military Drawing specification.
Note 9: For operating at elevated temperatures, the device must be derated based on the thermal resistance
JA
with P
D
= (T
J
T
A
)/
JA
.
Note 10: All numbers apply for packages soldered directly into a PC board.
Note 11: Do not connect output to V
+
when V
+
is greater than 13V or reliability may be adversely affected.
Typical Performance Characteristics
V
S
=
7.5V, T
A
= 25C unless otherwise specified
Supply Current
vs Supply Voltage
DS010547-27
Input Bias Current
vs Temperature
DS010547-28
Common-Mode Voltage
Range vs Temperature
DS010547-29
www.national.com
5
PDF 
ZIP
