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Semiconductor
MSM82C59A-2RS/GS/JS
GENERAL DESCRIPTION
The MSM82C59A-2 is a programmable interrupt for use in MSM80C85AH and MSM80C86A-
10/88A-10 microcomputer systems.
Based on CMOS silicon gate technology, this device features an extremely low standby current
of 100mA (max.) in chip non-selective status. During interrupt control status, the power
consumption is very low with only 5 mA (max.) being required.
Internally, the MSM82C59A-2 can control priority interrupts up to 8 levels, and can be
expanded up to 64 levels by cascade connection of a number of devices.
FEATURES
Silicon gate CMOS technology for high speed and low power consumption
3 V to 6 V single power supply
MSM80C85AH system compatibility (MAX5 MHz)
MSM80C86A-10/88A-10 system compatibility (MAX8 MHz)
8-level priority interrupt control
Interrupt levels expandable up to 64 levels
Programmable interrupt mode
Maskable interrupt
Automatically generated CALL code (85 mode)
TTL compatible
28-pin Plastic DIP (DIP28-P-600-2.54): (Product name: MSM82C59A-2RS)
28-pin Plastic QFJ (QFJ28-P-S450-1.27): (Product name: MSM82C59A-2JS)
32-pin Plastic SSOP (SSOP32-P-430-1.00-K): (Product name: MSM82C59A-2GS-K)
Semiconductor
MSM82C59A-2RS/GS/JS
PROGRAMMABLE INTERRUPT CONTROLLER
E2O0021-27-X3
This version: Jan. 1998
Previous version: Aug. 1996
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Semiconductor
MSM82C59A-2RS/GS/JS
PIN CONFIGURATION (TOP VIEW)
CS
WR
RD
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
CAS
0
CAS
1
GND
V
CC
AO
INTA
IR
7
IR
6
IR
5
IR
4
IR
3
IR
2
IR
1
IR
0
INT
SP/EN
CAS
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
28 pin Plastic DIP
28 pin Plastic QFJ
CS
WR
RD
NC
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
NC
CAS
0
V
CC
AO
INTA
NC
IR
7
IR
6
IR
5
IR
4
IR
3
IR
2
IR
1
IR
0
NC
INT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
32
31
30
29
28
27
26
25
24
23
22
21
20
19
32 pin Plastic SSOP
CAS
1
15
GND 16
SP/EN
18
CAS
2
17
D
6
5
D
5
6
D
4
7
D
3
8
D
2
9
D
1
10
D
0
11
IR
7
25
IR
6
24
IR
5
23
IR
4
22
IR
3
21
IR
2
20
IR
1
19
D
7
4
CAS
0
12
RD
3
WR
2
CS
1
V
CC
28
A0
27
INTA
26
CAS
1
13
GND
14
CAS
2
15
SP
/E
N
16
INT
17
IR
0
18
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Semiconductor
MSM82C59A-2RS/GS/JS
ABSOLUTE MAXIMUM RATINGS
55 - +150
MSM82C59A-2RS
Power Supply Voltage
V
CC
0.5 - +7
V
Input Voltage
V
IN
0.5 - V
CC
+0.5
V
Output Voltage
V
OUT
0.5 - V
CC
+0.5
V
Storage Temperature
T
STG
C
Power Dissipation
P
D
0.7
W
Parameter
Unit
Symbol
Respect
to GND
--
Ta = 25C
Conditions
Rating
MSM82C59A-2GS MSM82C59A-2JS
0.9
0.9
OPERATING RANGES
Range
Power Supply voltage
V
CC
3 - 6
V
Operating Temperature
T
OP
40 - +85
C
Parameter
Unit
Symbol
RECOMMENDED OPERATING CONDITIONS
Typ.
Power Supply Voltage
V
CC
5
V
T
OP
+25
"L" Lebel Input Voltage
V
IL
--
"H" Lebel Input Voltage
V
IH
--
Min.
4.5
-40
-0.5
2.2
Max.
5.5
+85
+0.8
V
CC
+0.5
Parameter
Unit
Symbol
C
V
V
Operating Temperature
DC CHARACTERISTICS
Typ.
Max.
"L" Level Output Voltage
V
OL
--
0.4
V
"H" Level Output Voltage
V
OH
--
--
V
--
--
Parameter
Unit
Symbol
Min.
--
3.0
V
CC
0.4
I
OL
= 2.5 mA
I
OH
= 2.5 mA
I
OH
= 100 mA
Conditions
V
CC
= 4.5 V - 5.5 V
Ta
= 40C - +85C
Input Leak Current
I
LI
--
1
mA
Output Leak Current
I
LO
--
10
mA
1
10
0 V
IN
V
CC
0 V
OUT
V
CC
CS = V
CC,
IR = V
CC
V
IL
= 0 V, V
IH
= V
CC
Standby Power Supply
Current
I
CCS
0.1
100
mA
5
mA
--
--
V
IN
= 0 V/V
CC
C
L
= 0 pF
I
CC
Average Operation
Power Supply Current
300
--
10
mA
IR Input Leak Current
I
LIR
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Semiconductor
MSM82C59A-2RS/GS/JS
AC CHARACTERISTICS
AC Test Circuits
Test Point
C1*
R2
Output from
Device under Test
V1
R1
* Includes Stray and Jig Capacitance
R1
1
1.7 V 523 W Open
Test Condition
R2
V1
2
4.5 V 1.8k W 1.8k W
100 pF
C1
30 pF
Test Condition Definition Table
V
IH
+0.4 V
Input
Output
V
IL
0.4 V
1.5V
1.5 V
V
OH
V
OL
A. C. Testing: All input signals must switch between
V
IL
0.4 V and V
IH
+0.4 V.
T
R
and T
F
must be less than of equal to 15 ns.
A.C. Testing Input, Output Waveform
Min.
Max.
Address Setup Time (to RD)
t
AHRL
10
--
ns
Address Hold Time (after RD)
t
RHAX
5
--
ns
Parameter
Unit
Symbol
TEST Conditions
RD/INTA Pulse Width
t
RLRH
160
--
ns
Address Setup Time (to WR)
t
AHWL
0
--
ns
WR Pulse Width
t
WLWH
190
--
ns
Data Setup Time (to WR)
t
DVWH
160
--
ns
Data Hold Time (after WR)
t
WHDX
0
--
ns
IR Input Width(Low)
t
JLJH
100
--
ns
t
CVIAL
40
--
ns
t
RHRL
160
--
ns
End of RD to Next RD
End of INTA to Next INTA
End of WR to Next WR
t
WHWL
190
--
ns
End of Command to Next Command
t
CHCL
400
--
ns
Data Valid Following RD/ INTA
t
RLDV
--
120
ns
Data Floating Following RD/ INTA
t
RHDZ
10
85
ns
INT Output Delay Time
t
JHIH
--
300
ns
CAS Valid Following 1 st. INTA (master)
t
IALCV
--
360
ns
EN Active Following RD/INTA
t
RLEL
--
100
ns
EN Inactive Following RD/ INTA
t
RHEH
--
150
ns
Data Valid after Address
t
AHDV
--
200
ns
Data Valid after CAS
t
CVDV
--
200
ns
Ta = 40C - +85C, V
CC
= 5 V 10%
Address Hold Time (after WR)
t
WHAX
0
--
CAS Input Setup Time (to INTA) (Slave)
Read INTA timing
Write timing
INTA sequence
Other timing
Delay times
1
2
1
1
1
1
1
--
--
--
--
--
1
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