Semiconductor Components Industries, LLC, 2000
May, 2000 Rev. 0
1
Publication Order Number:
DTA114EET1/D
DTA114EET1 SERIES
Preferred Devices
Bias Resistor Transistor
PNP Silicon Surface Mount Transistor
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a baseemitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the
SC75/SOT416 package which is designed for low power surface
mount applications.
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
The SC75/SOT416 package can be soldered using
wave or reflow. The modified gullwinged leads absorb
thermal stress during soldering eliminating the possibility
of damage to the die.
Available in 8 mm, 7 inch/3000 Unit Tape & Reel
MAXIMUM RATINGS
(T
A
= 25
C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
V
CBO
50
Vdc
Collector-Emitter Voltage
V
CEO
50
Vdc
Collector Current
I
C
100
mAdc
DEVICE MARKING AND RESISTOR VALUES
Device
Marking
R1 (K)
R2 (K)
Shipping
DTA114EET1
DTA124EET1
DTA144EET1
DTA114YET1
DTA114TET1
DTA143TET1
DTA123EET1
DTA143ZET1
DTA124XET1
DTA123JET1
6A
6B
6C
6D
6E
6F
6H
6K
6L
6M
10
22
47
10
10
4.7
2.2
4.7
22
2.2
10
22
47
47
2.2
47
47
47
3000/Tape & Reel
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CASE 463
SOT416/SC75
STYLE 1
Preferred devices are recommended choices for future use
and best overall value.
PNP SILICON
BIAS RESISTOR
TRANSISTORS
3
2
1
COLLECTOR
3
1
BASE
2
EMITTER
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2
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Total Device Dissipation,
FR4 Board
(1.)
@ T
A
= 25
C
Derate above 25
C
P
D
200
1.6
mW
mW/
C
Thermal Resistance, Junction to Ambient
(1.)
R
JA
600
C/W
Total Device Dissipation,
FR4 Board
(2.)
@ T
A
= 25
C
Derate above 25
C
P
D
300
2.4
mW
mW/
C
Thermal Resistance, Junction to Ambient
(2.)
R
JA
400
C/W
Junction and Storage Temperature Range
T
J
, T
stg
55 to +150
C
ELECTRICAL CHARACTERISTICS
(T
A
= 25
C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
CollectorBase Cutoff Current (V
CB
= 50 V, I
E
= 0)
I
CBO
--
--
100
nAdc
CollectorEmitter Cutoff Current (V
CE
= 50 V, I
B
= 0)
I
CEO
--
--
500
nAdc
EmitterBase Cutoff Current
DTA114EET1
(V
EB
= 6.0 V, I
C
= 0)
DTA124EET1
DTA144EET1
DTA114YET1
DTA114TET1
DTA143TET1
DTA123EET1
DTA143ZET1
DTA124XET1
DTA123JET1
I
EBO
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0.5
0.2
0.1
0.2
0.9
1.9
2.3
0.18
0.13
0.2
mAdc
CollectorBase Breakdown Voltage (I
C
= 10
A, I
E
= 0)
V
(BR)CBO
50
--
--
Vdc
CollectorEmitter Breakdown Voltage
(3.)
(I
C
= 2.0 mA, I
B
= 0)
V
(BR)CEO
50
--
--
Vdc
ON CHARACTERISTICS
(3.)
DC Current Gain
DTA114EET1
(V
CE
= 10 V, I
C
= 5.0 mA)
DTA124EET1
DTA144EET1
DTA114YET1
DTA114TET1
DTA143TET1
DTA123EET1
DTA143ZET1
DTA124XET1
DTA123JET1
h
FE
35
60
80
80
160
160
8.0
80
80
80
60
100
140
140
250
250
15
140
130
140
--
--
--
--
--
--
--
--
--
--
CollectorEmitter Saturation Voltage (I
C
= 10 mA, I
E
= 0.3 mA)
(I
C
= 10 mA, I
B
= 5 mA) DTA123EET1
(I
C
= 10 mA, I
B
= 1 mA) DTA114TET1/DTA143TET1/
DTA143ZET1/DTA124XET1
V
CE(sat)
--
--
0.25
Vdc
Output Voltage (on)
(V
CC
= 5.0 V, V
B
= 2.5 V, R
L
= 1.0 k
)
DTA114EET1
DTA124EET1
DTA114YET1
DTA114TET1
DTA143TET1
DTA123EET1
DTA143ZET1
DTA124XET1
DTA123JET1
(V
CC
= 5.0 V, V
B
= 3.5 V, R
L
= 1.0 k
)
DTA144EET1
V
OL
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
Vdc
1. FR4 @ Minimum Pad
2. FR4 @ 1.0
1.0 Inch Pad
3. Pulse Test: Pulse Width < 300
s, Duty Cycle < 2.0%
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ELECTRICAL CHARACTERISTICS
(T
A
= 25
C unless otherwise noted) (Continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage (off) (V
CC
= 5.0 V, V
B
= 0.5 V, R
L
= 1.0 k
)
(V
CC
= 5.0 V, V
B
= 0.050 V, R
L
= 1.0 k
)
DTA114TET1
(V
CC
= 5.0 V, V
B
= 0.25 V, R
L
= 1.0 k
)
DTA143TET1
DTA123EET1
V
OH
4.9
--
--
Vdc
Input Resistor
DTA114EET1
DTA124EET1
DTA144EET1
DTA114YET1
DTA114TET1
DTA143TET1
DTA123EET1
DTA143ZET1
DTA124XET1
DTA123JET1
R1
7.0
15.4
32.9
7.0
7.0
3.3
1.5
3.3
15.4
1.54
10
22
47
10
10
4.7
2.2
4.7
22
2.2
13
28.6
61.1
13
13
6.1
2.9
6.1
28.6
2.86
k
Resistor Ratio
DTA114EET1/DTA124EET1/DTA144EET1
DTA114YET1
DTA114TET1/DTA143TET1
DTA123EET1
DTA143ZET1
DTA124XET1
DTA123JET1
R
1
/R
2
0.8
0.17
--
0.8
0.055
0.38
0.038
1.0
0.21
--
1.0
0.1
0.47
0.047
1.2
0.25
--
1.2
0.185
0.56
0.056
Figure 1. Derating Curve
250
200
150
100
50
0
50
0
50
100
150
T
A
, AMBIENT TEMPERATURE (
C)
P
D
, POWER DISSIP
A
TION
(MILLIW
A
TTS)
R
JA
= 600
C/W
0.00001
0.0001
0.001
0.01
0.1
1.0
10
100
1000
0.001
0.01
0.1
1.0
r(t), NORMALIZED
TRANSIENT
THERMAL
RESIST
ANCE
t, TIME (s)
Figure 2. Normalized Thermal Response
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
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4
TYPICAL ELECTRICAL CHARACTERISTICS -- DTA114EET1
V
in
, INPUT
VOL
T
AGE (VOL
TS)
I C
, COLLECT
OR
CURRENT
(mA)
h
FE
, DC CURRENT
GAIN (NORMALIZED)
Figure 3. V
CE(sat)
versus I
C
100
10
1
0.1
0.01
0.001
0
V
in
, INPUT VOLTAGE (VOLTS)
T
A
= 25
C
25
C
1
2
3
4
5
6
7
8
9
10
Figure 4. DC Current Gain
Figure 5. Output Capacitance
Figure 6. Output Current versus Input Voltage
Figure 7. Input Voltage versus Output Current
0.01
20
I
C
, COLLECTOR CURRENT (mA)
V
CE(sat)
, MAXIMUM COLLECT
OR
VOL
T
AGE (VOL
TS)
0.1
1
0
40
50
1000
1
10
100
I
C
, COLLECTOR CURRENT (mA)
T
A
= 75
C
25
C
100
10
0
I
C
, COLLECTOR CURRENT (mA)
0.1
1
10
100
10
20
30
40
50
T
A
= 25
C
25
C
75
C
75
C
I
C
/I
B
= 10
50
0
10
20
30
40
4
3
1
2
V
R
, REVERSE BIAS VOLTAGE (VOLTS)
C
ob
, CAP
ACIT
ANCE
(pF)
0
T
A
= 25
C
25
C
75
C
25
C
V
CE
= 10 V
f = 1 MHz
l
E
= 0 V
T
A
= 25
C
V
O
= 5 V
V
O
= 0.2 V
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TYPICAL ELECTRICAL CHARACTERISTICS -- DTA124EET1
V
in
, INPUT
VOL
T
AGE (VOL
TS)
I C
, COLLECT
OR
CURRENT
(mA)
h
FE
, DC CURRENT
GAIN (NORMALIZED)
Figure 8. V
CE(sat)
versus I
C
Figure 9. DC Current Gain
1000
10
I
C
, COLLECTOR CURRENT (mA)
100
10
1
100
Figure 10. Output Capacitance
I
C
, COLLECTOR CURRENT (mA)
0
10
20
30
V
O
= 0.2 V
T
A
= 25
C
75
C
100
10
1
0.1
40
50
Figure 11. Output Current versus Input Voltage
100
10
1
0.1
0.01
0.001
0
1
2
3
4
V
in
, INPUT VOLTAGE (VOLTS)
5
6
7
8
9
10
Figure 12. Input Voltage versus Output Current
0.01
V
CE(sat)
,
MA
X
IM
U
M
COLLECT
OR
VOL
T
AGE
(
VOL
TS)
0.1
1
10
40
I
C
, COLLECTOR CURRENT (mA)
0
20
50
75
C
25
C
T
A
= 25
C
50
0
10
20
30
40
4
3
2
1
0
V
R
, REVERSE BIAS VOLTAGE (VOLTS)
C
ob
,
CA
P
ACIT
A
N
CE
(p
F)
25
C
I
C
/I
B
= 10
25
C
25
C
V
CE
= 10 V
T
A
= 75
C
f = 1 MHz
l
E
= 0 V
T
A
= 25
C
75
C
25
C
T
A
= 25
C
V
O
= 5 V
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TYPICAL ELECTRICAL CHARACTERISTICS -- DTA144EET1
V
in
, INPUT
VOL
T
AGE (VOL
TS)
I C
, COLLECT
OR
CURRENT
(mA)
h
FE
, DC CURRENT
GAIN (NORMALIZED)
Figure 13. V
CE(sat)
versus I
C
I
C
, COLLECTOR CURRENT (mA)
1
0.1
0.01
0
10
20
30
40
75
C
25
C
V
CE(sat)
,
MA
X
IM
U
M
COLLECT
OR
VOL
T
AGE
(
VOL
TS)
Figure 14. DC Current Gain
1000
100
10
1
10
100
I
C
, COLLECTOR CURRENT (mA)
25
C
Figure 15. Output Capacitance
Figure 16. Output Current versus Input Voltage
100
10
1
0.1
0.01
0.001
0
10
25
C
V
in
, INPUT VOLTAGE (VOLTS)
25
C
50
0
10
20
30
40
1
0.8
0.6
0.4
0.2
0
V
R
, REVERSE BIAS VOLTAGE (VOLTS)
C
ob
, CAP
ACIT
ANCE
(pF)
1
2
3
4
5
6
7
8
9
Figure 17. Input Voltage versus Output Current
100
10
1
0.1
0
10
20
30
40
I
C
, COLLECTOR CURRENT (mA)
T
A
= 25
C
25
C
75
C
50
I
C
/I
B
= 10
T
A
= 25
C
25
C
T
A
= 75
C
f = 1 MHz
l
E
= 0 V
T
A
= 25
C
V
O
= 5 V
T
A
= 75
C
V
O
= 0.2 V
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TYPICAL ELECTRICAL CHARACTERISTICS -- DTA114YET1
10
1
0.1
0
10
20
30
40
50
100
10
1
0
2
4
6
8
10
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
0
2
4
6
8
10
15
20
25
30
35
40
45
50
V
R
, REVERSE BIAS VOLTAGE (VOLTS)
V
in
,
I
NPU
T
VOL
T
AGE
(
VOL
TS)
I C
, COLLECT
OR
CURRENT
(mA)
h
FE
, DC CURRENT
GAIN (NORMALIZED)
Figure 18. V
CE(sat)
versus I
C
I
C
, COLLECTOR CURRENT (mA)
0
20
40
60
80
V
CE(sat)
,
MA
X
IM
U
M
COLLECT
OR
VOL
T
AGE
(
VOL
TS)
Figure 19. DC Current Gain
1
10
100
I
C
, COLLECTOR CURRENT (mA)
Figure 20. Output Capacitance
Figure 21. Output Current versus Input Voltage
V
in
, INPUT VOLTAGE (VOLTS)
C
ob
,
CA
P
ACIT
A
N
CE
(p
F)
Figure 22. Input Voltage versus Output Current
I
C
, COLLECTOR CURRENT (mA)
1
0.1
0.01
0.001
25
C
25
C
T
A
= 75
C
V
CE
= 10 V
180
160
140
120
100
80
60
40
20
0
2
4
6
8
15
20 40
50 60 70
80 90
f = 1 MHz
l
E
= 0 V
T
A
= 25
C
LOAD
+12 V
Figure 23. Inexpensive, Unregulated Current Source
Typical Application
for PNP BRTs
25
C
I
C
/I
B
= 10
T
A
= 25
C
T
A
= 75
C
25
C
25
C
V
O
= 5 V
V
O
= 0.2 V
25
C
T
A
= 25
C
75
C
75
C
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8
MINIMUM RECOMMENDED FOOTPRINTS FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
1.4
1
0.5 min. (3x)
0.5 min. (3x)
TYPICAL
0.5
SOLDERING PATTERN
Unit: mm
SOT416/SC75 POWER DISSIPATION
The power dissipation of the SOT416/SC75 is a
function of the pad size. This can vary from the minimum
pad size for soldering to the pad size given for maximum
power dissipation. Power dissipation for a surface mount
device is determined by T
J(max)
, the maximum rated
junction temperature of the die, R
JA
, the thermal
resistance from the device junction to ambient; and the
operating temperature, T
A
. Using the values provided on
the data sheet, P
D
can be calculated as follows:
P
D
=
T
J(max)
T
A
R
JA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature T
A
of 25
C,
one can calculate the power dissipation of the device which
in this case is 200 milliwatts.
P
D
= 150
C 25
C = 200 milliwatts
600
C/W
The 600
C/W assumes the use of the recommended
footprint on a glass epoxy printed circuit board to achieve a
power dissipation of 200 milliwatts. Another alternative
would be to use a ceramic substrate or an aluminum core
board such as Thermal Clad
TM
. Using a board material such
as Thermal Clad, a higher power dissipation can be
achieved using the same footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
Always preheat the device.
The delta temperature between the preheat and
soldering should be 100
C or less.*
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference should be a maximum of 10
C.
The soldering temperature and time should not exceed
260
C for more than 10 seconds.
When shifting from preheating to soldering, the
maximum temperature gradient should be 5
C or less.
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
Mechanical stress or shock should not be applied
during cooling.
* Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
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9
SOLDER STENCIL GUIDELINES
Prior to placing surface mount components onto a printed
circuit board, solder paste must be applied to the pads. A
solder stencil is required to screen the optimum amount of
solder paste onto the footprint. The stencil is made of brass
or stainless steel with a typical thickness of 0.008 inches.
The stencil opening size for the surface mounted package
should be the same as the pad size on the printed circuit
board, i.e., a 1:1 registration.
TYPICAL SOLDER HEATING PROFILE
For any given circuit board, there will be a group of
control settings that will give the desired heat pattern. The
operator must set temperatures for several heating zones,
and a figure for belt speed. Taken together, these control
settings make up a heating "profile" for that particular
circuit board. On machines controlled by a computer, the
computer remembers these profiles from one operating
session to the next. Figure 24 shows a typical heating
profile for use when soldering a surface mount device to a
printed circuit board. This profile will vary among
soldering systems but it is a good starting point. Factors that
can affect the profile include the type of soldering system in
use, density and types of components on the board, type of
solder used, and the type of board or substrate material
being used. This profile shows temperature versus time.
The line on the graph shows the actual temperature that
might be experienced on the surface of a test board at or
near a central solder joint. The two profiles are based on a
high density and a low density board. The Vitronics
SMD310 convection/infrared reflow soldering system was
used to generate this profile. The type of solder used was
62/36/2 Tin Lead Silver with a melting point between
177 189
C. When this type of furnace is used for solder
reflow work, the circuit boards and solder joints tend to
heat first. The components on the board are then heated by
conduction. The circuit board, because it has a large surface
area, absorbs the thermal energy more efficiently, then
distributes this energy to the components. Because of this
effect, the main body of a component may be up to 30
degrees cooler than the adjacent solder joints.
Figure 24. Typical Solder Heating Profile
STEP 1
PREHEAT
ZONE 1
"RAMP"
STEP 2
VENT
"SOAK"
STEP 3
HEATING
ZONES 2 & 5
"RAMP"
STEP 4
HEATING
ZONES 3 & 6
"SOAK"
STEP 5
HEATING
ZONES 4 & 7
"SPIKE"
STEP 6
VENT
STEP 7
COOLING
200
C
150
C
100
C
50
C
TIME (3 TO 7 MINUTES TOTAL)
T
MAX
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
MASS OF ASSEMBLY)
205
TO 219
C
PEAK AT
SOLDER JOINT
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
100
C
150
C
160
C
140
C
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
170
C
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10
PACKAGE DIMENSIONS
SC75
(SOT416)
CASE 46301
ISSUE B
DIM
MIN
MAX
MIN
MAX
INCHES
MILLIMETERS
A
0.70
0.80
0.028
0.031
B
1.40
1.80
0.055
0.071
C
0.60
0.90
0.024
0.035
D
0.15
0.30
0.006
0.012
G
1.00 BSC
0.039 BSC
H
0.10
0.004
J
0.10
0.25
0.004
0.010
K
1.45
1.75
0.057
0.069
L
0.10
0.20
0.004
0.008
S
0.50 BSC
0.020 BSC
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
M
0.20 (0.008)
B
A
B
S
D
G
3 PL
0.20 (0.008) A
K
J
L
C
H
3
2
1
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 2:
PIN 1. ANODE
2. N/C
3. CATHODE
STYLE 3:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. ANODE
DTA114EET1 SERIES
http://onsemi.com
11
Notes
DTA114EET1 SERIES
http://onsemi.com
12
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