Semiconductor Components Industries, LLC, 2000
March, 2000 Rev. 3
1
Publication Order Number:
MC14511B/D
MC14511B
BCD-To-Seven Segment
Latch/Decoder/Driver
The MC14511B BCDtoseven segment latch/decoder/driver is
constructed with complementary MOS (CMOS) enhancement mode
devices and NPN bipolar output drivers in a single monolithic structure.
The circuit provides the functions of a 4bit storage latch, an 8421
BCDtoseven segment decoder, and an output drive capability. Lamp
test (LT), blanking (BI), and latch enable (LE) inputs are used to test the
display, to turnoff or pulse modulate the brightness of the display, and
to store a BCD code, respectively. It can be used with sevensegment
lightemitting diodes (LED), incandescent, fluorescent, gas discharge,
or liquid crystal readouts either directly or indirectly.
Applications include instrument (e.g., counter, DVM, etc.) display
driver, computer/calculator display driver, cockpit display driver, and
various clock, watch, and timer uses.
Low Logic Circuit Power Dissipation
HighCurrent Sourcing Outputs (Up to 25 mA)
Latch Storage of Code
Blanking Input
Lamp Test Provision
Readout Blanking on all Illegal Input Combinations
Lamp Intensity Modulation Capability
Time Share (Multiplexing) Facility
Supply Voltage Range = 3.0 V to 18 V
Capable of Driving Two Lowpower TTL Loads, One Lowpower
Schottky TTL Load or Two HTL Loads Over the Rated Temperature
Range
Chip Complexity: 216 FETs or 54 Equivalent Gates
Triple Diode Protection on all Inputs
MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
(2.)
Symbol
Parameter
Value
Unit
V
DD
DC Supply Voltage Range
0.5 to +18.0
V
V
in
Input Voltage Range, All Inputs
0.5 to V
DD
+ 0.5
V
I
DC Current Drain per Input Pin
10
mA
P
D
Power Dissipation,
per Package
(3.)
500
mW
T
A
Operating Temperature Range
55 to +125
C
T
stg
Storage Temperature Range
65 to +150
C
I
OHmax
Maximum Output Drive Current
(Source) per Output
25
mA
P
OHmax
Maximum Continuous Output
Power (Source) per Output
(4.)
50
mA
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic "P and D/DW" Packages: 7.0 mW/
_
C From 65
_
C To 125
_
C
4. P
OHmax
= I
OH
(V
DD
V
OH
)
http://onsemi.com
A
= Assembly Location
WL or L
= Wafer Lot
YY or Y
= Year
WW or W = Work Week
Device
Package
Shipping
ORDERING INFORMATION
MC14511BCP
PDIP16
2000/Box
MC14511BD
SOIC16
48/Rail
MC14511BDW
SOIC16
47/Rail
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
MARKING
DIAGRAMS
1
16
PDIP16
P SUFFIX
CASE 648
MC14511BCP
AWLYYWW
MC14511BDWR2
SOIC16
1000/Tape & Reel
SOIC16
DW SUFFIX
CASE 751G
1
16
14511B
AWLYYWW
SOEIAJ16
F SUFFIX
CASE 966
1
16
MC14511B
AWLYWW
SOIC16
D SUFFIX
CASE 751B
1
16
14511B
AWLYWW
MC14511BF
SOEIAJ16
See Note 1.
MC14511BFEL
SOEIAJ16
See Note 1.
MC14511B
http://onsemi.com
2
This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this highimpedance circuit. A
destructive high current mode may occur if V
in
and V
out
are not constrained to the range V
SS
v
(V
in
or V
out
)
v
V
DD
.
Due to the sourcing capability of this circuit, damage can occur to the device if V
DD
is applied, and the outputs are shorted to V
SS
and are at a
logical 1 (See Maximum Ratings).
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V
SS
or V
DD
).
PIN ASSIGNMENT
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
b
a
g
f
V
DD
e
d
c
BI
LT
C
B
V
SS
A
D
LE
0
1
2
3
4
5
6
7
8
9
DISPLAY
a
b
c
d
e
f
g
Inputs
Outputs
LE BI LT
D
C
B
A
a
b
c
d
e
f
g
Display
X
X
0
X
X
X
X
1
1
1
1
1
1
1
8
X
0
1
X
X
X
X
0
0
0
0
0
0
0
Blank
0
1
1
0
0
0
0
1
1
1
1
1
1
0
0
0
1
1
0
0
0
1
0
1
1
0
0
0
0
1
0
1
1
0
0
1
1
1
1
1
1
0
0
1
2
0
1
1
0
0
1
1
1
1
1
1
0
0
1
3
0
1
1
0
1
0
0
0
1
1
0
0
1
1
4
0
1
1
0
1
0
1
1
0
1
1
0
1
1
5
0
1
1
0
1
1
0
0
0
1
1
1
1
1
6
0
1
1
0
1
1
1
1
1
1
0
0
0
0
7
0
1
1
1
0
0
0
1
1
1
1
1
1
1
8
0
1
1
1
0
0
1
1
1
1
0
0
1
1
9
0
1
1
1
0
1
0
0
0
0
0
0
0
0
Blank
0
1
1
1
0
1
1
0
0
0
0
0
0
0
Blank
0
1
1
1
1
0
0
0
0
0
0
0
0
0
Blank
0
1
1
1
1
0
1
0
0
0
0
0
0
0
Blank
0
1
1
1
1
1
0
0
0
0
0
0
0
0
Blank
0
1
1
1
1
1
1
0
0
0
0
0
0
0
Blank
1
1
1
X
X
X
X
*
*
X = Don't Care
* Depends upon the BCD code previously applied when LE = 0
TRUTH TABLE
MC14511B
http://onsemi.com
3
ELECTRICAL CHARACTERISTICS
(Voltages Referenced to V
SS
)
V
DD
55
_
C
25
_
C
125
_
C
Characteristic
Symbol
V
DD
Vdc
Min
Max
Min
Typ
(5.)
Max
Min
Max
Unit
Output Voltage
"0" Level
V
in
= V
DD
or 0
V
OL
5.0
10
15
--
--
--
0.05
0.05
0.05
--
--
--
0
0
0
0.05
0.05
0.05
--
--
--
0.05
0.05
0.05
Vdc
"1" Level
V
in
= 0 or V
DD
V
OH
5.0
10
15
4.1
9.1
14.1
--
--
--
4.1
9.1
14.1
4.57
9.58
14.59
--
--
--
4.1
9.1
14.1
--
--
--
Vdc
Input Voltage #
"0" Level
(V
O
= 3.8 or 0.5 Vdc)
(V
O
= 8.8 or 1.0 Vdc)
(V
O
= 13.8 or 1.5 Vdc)
V
IL
5.0
10
15
--
--
--
1.5
3.0
4.0
--
--
--
2.25
4.50
6.75
1.5
3.0
4.0
--
--
--
1.5
3.0
4.0
Vdc
"1" Level
(V
O
= 0.5 or 3.8 Vdc)
(V
O
= 1.0 or 8.8 Vdc)
(V
O
= 1.5 or 13.8 Vdc)
V
IH
5.0
10
15
3.5
7.0
11
--
--
--
3.5
7.0
11
2.75
5.50
8.25
--
--
--
3.5
7.0
11
--
--
--
Vdc
Output Drive Voltage
(I
OH
= 0 mA)
Source
(I
OH
= 5.0 mA)
(I
OH
= 10 mA)
(I
OH
= 15 mA)
(I
OH
= 20 mA)
(I
OH
= 25 mA)
V
OH
5.0
4.1
--
3.9
--
3.4
--
--
--
--
--
--
--
4.1
--
3.9
--
3.4
--
4.57
4.24
4.12
3.94
3.70
3.54
--
--
--
--
--
--
4.1
--
3.5
--
3.0
--
--
--
--
--
--
--
Vdc
(I
OH
= 0 mA)
(I
OH
= 5.0 mA)
(I
OH
= 10 mA)
(I
OH
= 15 mA)
(I
OH
= 20 mA)
(I
OH
= 25 mA)
10
9.1
--
9.0
--
8.6
--
--
--
--
--
--
--
9.1
--
9.0
--
8.6
--
9.58
9.26
9.17
9.04
8.90
8.70
--
--
--
--
--
--
9.1
--
8.6
--
8.2
--
--
--
--
--
--
--
Vdc
(I
OH
= 0 mA)
(I
OH
= 5.0 mA)
(I
OH
= 10 mA)
(I
OH
= 15 mA)
(I
OH
= 20 mA)
(I
OH
= 25 mA)
15
14.1
--
14
--
13.6
--
--
--
--
--
--
--
14.1
--
14
--
13.6
--
14.59
14.27
14.18
14.07
13.95
13.70
--
--
--
--
--
--
14.1
--
13.6
--
13.2
--
--
--
--
--
--
--
Vdc
Output Drive Current
(V
OL
= 0.4 V)
Sink
(V
OL
= 0.5 V)
(V
OL
= 1.5 V)
I
OL
5.0
10
15
0.64
1.6
4.2
--
--
--
0.51
1.3
3.4
0.88
2.25
8.8
--
--
--
0.36
0.9
2.4
--
--
--
mAdc
Input Current
I
in
15
--
0.1
--
0.00001
0.1
--
1.0
Adc
Input Capacitance
C
in
--
--
--
--
5.0
7.5
--
--
pF
Quiescent Current
(Per Package) V
in
= 0 or V
DD
,
I
out
= 0
A
I
DD
5.0
10
15
--
--
--
5.0
10
20
--
--
--
0.005
0.010
0.015
5.0
10
20
--
--
--
150
300
600
Adc
Total Supply Current
(6.) (7.)
(Dynamic plus Quiescent,
Per Package)
(C
L
= 50 pF on all outputs, all
buffers switching)
I
T
5.0
10
15
I
T
= (1.9
A/kHz) f + I
DD
I
T
= (3.8
A/kHz) f + I
DD
I
T
= (5.7
A/kHz) f + I
DD
Adc
5. Noise immunity specified for worstcase input combination.
Noise Margin for both "1" and "0" level =
1.0 Vdc min @ V
DD
= 5.0 Vdc
2.0 Vdc min @ V
DD
= 10 Vdc
2.5 Vdc min @ V
DD
= 15 Vdc
6. The formulas given are for the typical characteristics only at 25
_
C.
7. To calculate total supply current at loads other than 50 pF:
I
T
(C
L
) = I
T
(50 pF) + 3.5 x 10
3
(C
L
50) V
DD
f
where: I
T
is in
A (per package), C
L
in pF, V
DD
in Vdc, and f in kHz is input frequency.
MC14511B
http://onsemi.com
5
Figure 1. Dynamic Power Dissipation Signal Waveforms
Input LE low, and Inputs D, BI and LT high.
f in respect to a system clock.
All outputs connected to respective C
L
loads.
20 ns
20 ns
V
DD
V
SS
V
OH
V
OL
90%
50%
10%
50%
A, B, AND C
ANY OUTPUT
50% DUTY CYCLE
1
2f
Figure 2. Dynamic Signal Waveforms
20 ns
20 ns
V
DD
90%
INPUT C
(a) Inputs D and LE low, and Inputs A, B, BI and LT high.
V
SS
V
OH
V
OL
50%
10%
OUTPUT g
t
PLH
t
PHL
90%
10%
50%
t
TLH
t
THL
(b) Input D low, Inputs A, B, BI and LT high.
20 ns
10%
90%
50%
V
DD
V
SS
V
DD
V
SS
V
OH
V
OL
t
h
t
su
50%
INPUT C
OUTPUT g
LE
(c) Data DCBA strobed into latches.
20 ns
20 ns
V
DD
V
SS
LE
90%
50%
10%
t
WL
PDF 
ZIP