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Электронный компонент: MC74ACT299DWR2

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Semiconductor Components Industries, LLC, 2003
April, 2003 - Rev. 6
1
Publication Order Number:
MC74AC299/D
MC74AC299, MC74ACT299
8-Input Universal Shift/
Storage Register with
Common Parallel I/O Pins
The MC74AC299/74ACT299 is an 8-bit universal shift/storage
register with 3-state outputs. Four modes of operation are possible:
hold (store), shift left, shift right and load data. The parallel load inputs
and flip-flop outputs are multiplexed to reduce the total number of
package pins. Additional outputs are provided for flip-flops Q
0
, Q
7
to
allow easy serial cascading. A separate active LOW Master Reset is
used to reset the register.
Common Parallel I/O for Reduced Pin Count
Additional Serial Inputs and Outputs for Expansion
Four Operating Modes: Shift Left, Shift Right, Load and Store
3-State Outputs for Bus-Oriented Applications
Outputs Source/Sink 24 mA
ACT299 Has TTL Compatible Inputs
Figure 1. Pinout: 20-Lead Packages Conductors
(Top View)
19
20
18
17
16
15
14
2
1
3
4
5
6
7
V
CC
13
8
12
9
11
10
S
1
DS
7
Q
7
I/O
7
I/O
5
I/O
3
I/O
1
CP
DS
0
S
0
OE
1
OE
2
I/O
6
I/O
4
I/O
2
I/O
0
Q
0
MR GND
PIN ASSIGNMENT
PIN
FUNCTION
CP
Clock Pulse Input
DS
0
Serial Data Input for Right Shift
DS
7
Serial Data Input for Left Shift
S
0
, S
1
Mode Select Inputs
MR
Asynchronous Master Reset
OE
1
, OE
2
3-State Output Enable Inputs
I/O
0
-I/O
7
Parallel Data Inputs or 3-State Parallel Outputs
Q
0
, Q
7
Serial Outputs
1
20
PDIP-20
N SUFFIX
CASE 738
1
20
SO-20
DW SUFFIX
CASE 751
Device
Package
Shipping
ORDERING INFORMATION
MC74AC299N
PDIP-20
18 Units/Rail
MC74ACT299N
PDIP-20
18 Units/Rail
MC74AC299DW
SOIC-20
38 Units/Rail
MC74AC299DWR2
SOIC-20
1000 Tape & Reel
MC74ACT299DW
SOIC-20
38 Units/Rail
MC74ACT299DWR2
SOIC-20
1000 Tape & Reel
See general marking information in the device marking
section on page 9 of this data sheet.
DEVICE MARKING INFORMATION
http://onsemi.com
Figure 3. Logic Diagram
D Q
C
D
D Q
C
D
D Q
C
D
D Q
C
D
D Q
C
D
D Q
C
D
D Q
C
D
D Q
C
D
CP
S
0
OE
1
OE
2
I/O
6
I/O
4
I/O
2
I/O
0
Q
0
MR
S
1
DS
7
Q
7
I/O
7
I/O
5
I/O
3
DS
0
I/O
1
CP
CP
CP
CP
CP
CP
CP
NOTE:
That this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
MC74AC299, MC74ACT299
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2
Figure 2. Logic Symbol
DS
0
DS
7
Q
7
S
0
S
1
CP
OE MR Q
0
I/O
0
I/O
6
I/O
5
I/O
4
I/O
3
I/O
2
I/O
1
I/O
7
MC74AC299, MC74ACT299
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3
FUNCTIONAL DESCRIPTION
The MC74AC299/74ACT299 contains eight edge-triggered
D-type flip-flops and the interstage logic necessary to
perform synchronous shift left, shift right, parallel load and
hold operations. The type of operation is determined by S
0
and S
1
, as shown in the Truth Table. All flip-flop outputs are
brought out through 3-state buffers to separate I/O pins that
also serve as data inputs in the parallel load mode. Q
0
and Q
7
are also brought out on other pins for expansion in serial
shifting of longer words.
A LOW signal on MR overrides the Select and CP inputs
and resets the flip-flops. All other state changes are initiated
by the rising edge of the clock. Inputs can change when the
clock is in either state provided only that the recommended
setup and hold times, relative to the rising edge of CP, are
observed.
A HIGH signal on either OE
1
or OE
2
disables the 3
-
state
buffers and puts the I/O pins in the high impedance state. In
this condition the shift, hold, load and reset operations can
still occur. The 3-state buffers are also disabled by HIGH
signals on both S
0
and S
1
in preparation for a parallel load
operation.
TRUTH TABLE
Inputs
Response
MR
S
1
S
0
CP
Response
L
X
X
X
Asynchronous Reset; Q
0
-Q
7
= LOW
H
H
H
Parallel Load; I/O
n
Q
n
H
L
H
Shift Rights; DS
0
Q
0
, Q
0
Q
1
, etc.
H
H
L
Shift Left; DS
7
Q
7
, Q
7
Q
6
, etc.
H
L
L
X
Hold
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Transition
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
V
IN
DC Input Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
V
OUT
DC Output Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
I
IN
DC Input Current, per Pin
20
mA
I
OUT
DC Output Sink/Source Current, per Pin
50
mA
I
CC
DC V
CC
or GND Current per Output Pin
50
mA
T
stg
Storage Temperature
-65 to +150
C
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the
Recommended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
Max
Unit
V
Supply Voltage
AC
2.0
5.0
6.0
V
V
CC
Supply Voltage
ACT
4.5
5.0
5.5
V
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Ref. to GND)
0
-
V
CC
V
V
CC
@ 3.0 V
-
150
-
t
r
, t
f
Input Rise and Fall Time (Note 1)
AC Devices except Schmitt Inputs
V
CC
@ 4.5 V
-
40
-
ns/V
r
,
f
AC Devices except Schmitt Inputs
V
CC
@ 5.5 V
-
25
-
t t
Input Rise and Fall Time (Note 2)
V
CC
@ 4.5 V
-
10
-
ns/V
t
r
, t
f
In ut Rise and Fall Time (Note 2)
ACT Devices except Schmitt Inputs
V
CC
@ 5.5 V
-
8.0
-
ns/V
T
J
Junction Temperature (PDIP)
-
-
140
C
T
A
Operating Ambient Temperature Range
-40
25
85
C
I
OH
Output Current - High
-
-
-24
mA
I
OL
Output Current - Low
-
-
24
mA
1. V
IN
from 30% to 70% V
CC
; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. V
IN
from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
MC74AC299, MC74ACT299
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4
DC CHARACTERISTICS
74AC
74AC
Symbol
Parameter
V
CC
(V)
T
A
= +25
C
T
A
=
-40
C to
+85
C
Unit
Conditions
Typ
Guaranteed Limits
V
IH
Minimum High Level
3.0
1.5
2.1
2.1
V
OUT
= 0.1 V
u
g
e e
Input Voltage
4.5
2.25
3.15
3.15
V
or V
CC
- 0.1 V
5.5
2.75
3.85
3.85
V
IL
Maximum Low Level
3.0
1.5
0.9
0.9
V
OUT
= 0.1 V
a
u
o
e e
Input Voltage
4.5
2.25
1.35
1.35
V
or V
CC
- 0.1 V
5.5
2.75
1.65
1.65
V
OH
Minimum High Level
3.0
2.99
2.9
2.9
I
OUT
= -50
A
u
g
e e
Output Voltage
4.5
4.49
4.4
4.4
V
5.5
5.49
5.4
5.4
*V
IN
= V
IL
or V
IH
3.0
-
2.56
2.46
V
-12 mA
4.5
-
3.86
3.76
V
I
OH
-24 mA
5.5
-
4.86
4.76
-24 mA
V
OL
Maximum Low Level
3.0
0.002
0.1
0.1
I
OUT
= 50
A
a
u
o
e e
Output Voltage
4.5
0.001
0.1
0.1
V
5.5
0.001
0.1
0.1
*V
IN
= V
IL
or V
IH
3.0
-
0.36
0.44
V
12 mA
4.5
-
0.36
0.44
V
I
OL
24 mA
5.5
-
0.36
0.44
24 mA
I
IN
Maximum Input
5 5
-
0 1
1 0
A
V
I
= V
CC
GND
a
u
u
Leakage Current
5.5
-
0.1
1.0
A
V
I
= V
CC
, GND
I
OZT
Maximum 3-State
Current
5 5
-
0 6
6 0
A
V
I
(OE) = V
IL
, V
IH
V
I
= V
CC
GND
Current
5.5
-
0.6
6.0
A
V
I
= V
CC
, GND
V
O
= V
CC
, GND
I
OLD
Minimum Dynamic
O t
t C
t
5.5
-
-
75
mA
V
OLD
= 1.65 V Max
I
OHD
Output Current
5.5
-
-
-75
mA
V
OHD
= 3.85 V Min
I
CC
Maximum Quiescent
5 5
-
8 0
80
A
V
IN
= V
CC
or GND
a
u
Qu esce
Supply Current
5.5
-
8.0
80
A
V
IN
= V
CC
or GND
*All outputs loaded; thresholds on input associated with output under test.
Maximum test duration 2.0 ms, one output loaded at a time.
NOTE:
I
IN
and I
CC
@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
CC
.
AC CHARACTERISTICS
(For Figures and Waveforms - See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC
74AC
Symbol
Parameter
V
CC
*
(V)
T
A
= +25
C
C
L
= 50 pF
T
A
= -40
C
to +85
C
C
L
= 50 pF
Unit
Fig.
No.
Min
Typ
Max
Min
Max
f
Maximum Input
3.3
90
-
-
80
-
MHz
3-3
f
max
Frequency
5.0
130
-
-
105
-
MHz
3-3
t
PLH
Propagation Delay
3.3
8.5
-
20.5
7.0
22
ns
3-6
t
PLH
CP to Q
0 or
Q
7
5.0
5.5
-
14
4.5
15
ns
3-6
t
PHL
Propagation Delay
3.3
8.5
-
21.5
7.0
23
ns
3-6
t
PHL
CP to Q
0 or
Q
7
5.0
5.5
-
14.5
5.0
16
ns
3-6
*Voltage Range 3.3 V is 3.3 V
0.3 V.
Voltage Range 5.0 V is 5.0 V
0.5 V.
MC74AC299, MC74ACT299
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5
AC CHARACTERISTICS
(For Figures and Waveforms - See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
Symbol
Fig.
No.
Unit
74AC
74AC
V
CC
*
(V)
Parameter
Symbol
Fig.
No.
Unit
T
A
= -40
C
to +85
C
C
L
= 50 pF
T
A
= +25
C
C
L
= 50 pF
V
CC
*
(V)
Parameter
Symbol
Fig.
No.
Unit
Max
Min
Max
Typ
Min
V
CC
*
(V)
Parameter
t
PLH
Propagation Delay
3.3
9.0
-
20.5
7.5
22.5
ns
3-6
t
PLH
CP to I/O
n
5.0
6.0
-
14.5
5.0
16
ns
3-6
t
PHL
Propagation Delay
3.3
10
-
23
8.5
24.5
ns
3-6
t
PHL
CP to I/O
n
5.0
6.5
-
16
6.0
17.5
ns
3-6
t
PHL
Propagation Delay
3.3
9.0
-
22.5
7.5
25.0
ns
3-6
t
PHL
MR to Q
0
or Q
7
5.0
5.5
-
15.5
5.0
17.0
ns
3-6
t
PHL
Propagation Delay
3.3
9.0
-
21.5
7.5
24.0
ns
3-6
t
PHL
MR to I/O
n
5.0
5.5
-
15.0
5.0
16.5
ns
3-6
t
PZH
Output Enable Time
3.3
7.0
-
18
6.0
19.5
ns
3-7
t
PZH
OE to I/O
n
5.0
4.5
-
12.5
4.0
13.5
ns
3-7
t
PZL
Output Enable Time
3.3
7.0
-
18
6.0
20.5
ns
3-8
t
PZL
OE to I/O
n
5.0
5.0
-
12.5
4.0
14
ns
3-8
t
PHZ
Output Disable Time
3.3
6.5
-
18.5
5.5
19.5
ns
3-7
t
PHZ
OE to I/O
n
5.0
3.5
-
14
3.0
15
ns
3-7
t
PLZ
Output Disable Time
3.3
5.5
-
17
4.5
19
ns
3-8
t
PLZ
OE to I/O
n
5.0
3.5
-
12.5
2.0
13.5
ns
3-8
*Voltage Range 3.3 V is 3.3 V
0.3 V.
Voltage Range 5.0 V is 5.0 V
0.5 V.
AC OPERATING REQUIREMENTS
74AC
74AC
Symbol
Parameter
V
CC
*
(V)
T
A
= +25
C
C
L
= 50 pF
T
A
= -40
C
to +85
C
C
L
= 50 pF
Unit
Fig.
No.
Typ
Guaranteed Minimum
t
Setup Time, HIGH or LOW
3.3
-
8.0
8.5
ns
3-9
t
s
S
0
or
S
1
to CP
5.0
-
5.0
5.5
ns
3-9
t
h
Hold Time, HIGH or LOW
3.3
-
0.5
0.5
ns
3-9
t
h
S
0
or
S
1
to CP
5.0
-
1.0
1.0
ns
3-9
t
Setup Time, HIGH or LOW
3.3
-
5.5
6.0
ns
3-9
t
s
I/O
n
to CP
5.0
-
3.5
4.0
ns
3-9
t
h
Hold Time, HIGH or LOW
3.3
-
0
0
ns
3-9
t
h
I/O
n
to CP
5.0
-
1.0
1.0
ns
3-9
t
Setup Time, HIGH or LOW
3.3
-
6.5
7.0
ns
3-6
t
s
DS
0
or DS
7
to CP
5.0
-
4.0
4.5
ns
3-6
t
h
Hold Time, HIGH or LOW
3.3
-
0
0.5
ns
3-6
t
h
DS
0
or DS
7
to CP
5.0
-
1.0
1.0
ns
3-6
t
CP Pulse Width LOW
3.3
-
4.5
5.0
ns
3-6
t
w
CP Pulse Width, LOW
5.0
-
3.5
3.5
ns
3-6
t
MR Pulse Width LOW
3.3
-
4.5
5.0
ns
3-9
t
w
MR Pulse Width, LOW
5.0
-
3.5
3.5
ns
3-9
t
Recovery TIme
3.3
-
1.5
1.5
ns
3-9
t
rec
MR to CP
5.0
-
1.5
1.5
ns
3-9
*Voltage Range 3.3 V is 3.3 V
0.3 V.
Voltage Range 5.0 V is 5.0 V
0.5 V.