Semiconductor Components Industries, LLC, 2000
March, 2000 Rev. 3
1
Publication Order Number:
MC14174B/D
MC14174B
Hex Type D Flip-Flop
The MC14174B hex type D flipflop is constructed with MOS
Pchannel and Nchannel enhancement mode devices in a single
monolithic structure. Data on the D inputs which meets the setup time
requirements is transferred to the Q outputs on the positive edge of the
clock pulse. All six flipflops share common clock and reset inputs.
The reset is active low, and independent of the clock.
Static Operation
All Inputs and Outputs Buffered
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two LowPower TTL Loads or One LowPower
Schottky TTL Load over the Rated Temperature Range
Functional Equivalent to TTL 74174
MAXIMUM RATINGS
(Voltages Referenced to V
SS
) (Note 2.)
Symbol
Parameter
Value
Unit
V
DD
DC Supply Voltage Range
0.5 to +18.0
V
V
in
, V
out
Input or Output Voltage Range
(DC or Transient)
0.5 to V
DD
+ 0.5
V
I
in
, I
out
Input or Output Current
(DC or Transient) per Pin
10
mA
P
D
Power Dissipation,
per Package (Note 3.)
500
mW
T
A
Ambient Temperature Range
55 to +125
C
T
stg
Storage Temperature Range
65 to +150
C
T
L
Lead Temperature
(8Second Soldering)
260
C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic "P and D/DW" Packages: 7.0 mW/
_
C From 65
_
C To 125
_
C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
highimpedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
v
(V
in
or V
out
)
v
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V
SS
or V
DD
). Unused outputs must be left open.
http://onsemi.com
A
= Assembly Location
WL or L
= Wafer Lot
YY or Y
= Year
WW or W = Work Week
Device
Package
Shipping
ORDERING INFORMATION
MC14174BCP
PDIP16
2000/Box
MC14174BD
SOIC16
48/Rail
MC14174BDR2
SOIC16
2500/Tape & Reel
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
MARKING
DIAGRAMS
1
16
PDIP16
P SUFFIX
CASE 648
MC14174BCP
AWLYYWW
SOIC16
D SUFFIX
CASE 751B
1
16
14174B
AWLYWW
SOEIAJ16
F SUFFIX
CASE 966
1
16
MC14174B
AWLYWW
MC14174BF
SOEIAJ16
See Note 1.
MC14174BFEL
SOEIAJ16
See Note 1.
MC14174B
http://onsemi.com
3
ELECTRICAL CHARACTERISTICS
(Voltages Referenced to V
SS
)
V
DD
55
_
C
25
_
C
125
_
C
Characteristic
Symbol
V
DD
Vdc
Min
Max
Min
Typ
(4.)
Max
Min
Max
Unit
Output Voltage
"0" Level
V
in
= V
DD
or 0
V
OL
5.0
10
15
--
--
--
0.05
0.05
0.05
--
--
--
0
0
0
0.05
0.05
0.05
--
--
--
0.05
0.05
0.05
Vdc
"1" Level
V
in
= 0 or V
DD
V
OH
5.0
10
15
4.95
9.95
14.95
--
--
--
4.95
9.95
14.95
5.0
10
15
--
--
--
4.95
9.95
14.95
--
--
--
Vdc
Input Voltage
"0" Level
(V
O
= 4.5 or 0.5 Vdc)
(V
O
= 9.0 or 1.0 Vdc)
(V
O
= 13.5 or 1.5 Vdc)
V
IL
5.0
10
15
--
--
--
1.5
3.0
4.0
--
--
--
2.25
4.50
6.75
1.5
3.0
4.0
--
--
--
1.5
3.0
4.0
Vdc
"1" Level
(V
O
= 0.5 or 4.5 Vdc)
(V
O
= 1.0 or 9.0 Vdc)
(V
O
= 1.5 or 13.5 Vdc)
V
IH
5.0
10
15
3.5
7.0
11
--
--
--
3.5
7.0
11
2.75
5.50
8.25
--
--
--
3.5
7.0
11
--
--
--
Vdc
Output Drive Current
(V
OH
= 2.5 Vdc)
Source
(V
OH
= 4.6 Vdc)
(V
OH
= 9.5 Vdc)
(V
OH
= 13.5 Vdc)
I
OH
5.0
5.0
10
15
3.0
0.64
1.6
4.2
--
--
--
--
2.4
0.51
1.3
3.4
4.2
0.88
2.25
8.8
--
--
--
--
1.7
0.36
0.9
2.4
--
--
--
--
mAdc
(V
OL
= 0.4 Vdc)
Sink
(V
OL
= 0.5 Vdc)
(V
OL
= 1.5 Vdc)
I
OL
5.0
10
15
0.64
1.6
4.2
--
--
--
0.51
1.3
3.4
0.88
2.25
8.8
--
--
--
0.36
0.9
2.4
--
--
--
mAdc
Input Current
I
in
15
--
0.1
--
0.00001
0.1
--
1.0
Adc
Input Capacitance
(V
in
= 0)
C
in
--
--
--
--
5.0
7.5
--
--
pF
Quiescent Current
(Per Package)
I
DD
5.0
10
15
--
--
--
5.0
10
20
--
--
--
0.005
0.010
0.015
5.0
10
20
--
--
--
150
300
600
Adc
Total Supply Current
(5.) (6.)
(Dynamic plus Quiescent,
Per Package)
(C
L
= 50 pF on all outputs, all
buffers switching)
I
T
5.0
10
15
I
T
= (1.1
A/kHz) f + I
DD
I
T
= (2.3
A/kHz) f + I
DD
I
T
= (3.7
A/kHz) f + I
DD
Adc
4. Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance.
5. The formulas given are for the typical characteristics only at 25
_
C.
6. To calculate total supply current at loads other than 50 pF:
I
T
(C
L
) = I
T
(50 pF) + (C
L
50) Vfk
where: I
T
is in
A (per package), C
L
in pF, V = (V
DD
V
SS
) in volts, f in kHz is input frequency, and k = 0.003.
MC14174B
http://onsemi.com
4
SWITCHING CHARACTERISTICS
(7.)
(C
L
= 50 pF, T
A
= 25
_
C)
V
DD
All Types
Characteristic
Symbol
DD
Vdc
Min
Typ
(8.)
Max
Unit
Output Rise and Fall Time
t
TLH
, t
THL
= (1.35 ns/pF) C
L
+ 32 ns
t
TLH
, t
THL
= (0.6 ns/pF) C
L
+ 20 ns
t
TLH
, t
THL
= (0.4 ns/pF) C
L
+ 20 ns
t
TLH
, t
THL
5.0
10
15
--
--
--
100
50
40
200
100
80
ns
Propagation Delay Time -- Clock to Q
t
PLH
, t
PHL
= (0.9 ns/pF) C
L
+ 165 ns
t
PLH
, t
PHL
= (0.36 ns/pF) C
L
+ 64 ns
t
PLH
, t
PHL
= (0.26 ns/pF) C
L
+ 52 ns
t
PLH
, t
PHL
5.0
10
15
--
--
--
210
85
65
400
160
120
ns
Propagation Delay Time -- Reset to Q
t
PHL
= (0.9 ns/pF) C
L
+ 205 ns
t
PHL
= (0.36 ns/pF) C
L
+ 79 ns
t
PHL
= (0.26 ns/pF) C
L
+ 62 ns
t
PHL
5.0
10
15
--
--
--
250
100
75
500
200
150
ns
Clock Pulse Width
t
WH
5.0
10
15
150
90
70
75
45
35
--
--
--
ns
Reset Pulse Width
t
WL
5.0
10
15
200
100
80
100
50
40
--
--
--
ns
Clock Pulse Frequency
f
cl
5.0
10
15
--
--
--
7.0
12
15.5
2.0
5.0
6.5
mHz
Clock Pulse Rise and Fall Time
t
TLH
, t
THL
5.0
10
15
--
--
--
--
--
--
15
5.0
4.0
m
s
Data Setup Time
t
su
5.0
10
15
40
20
15
20
10
0
--
--
--
ns
Data Hold Time
t
h
5.0
10
15
80
40
30
40
20
15
--
--
--
ns
Reset Removal Time
t
rem
5.0
10
15
250
100
80
125
50
40
--
--
--
ns
7. The formulas given are for the typical characteristics only at 25
_
C.
8. Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance.
PDF 
ZIP
