2000 Infineon Technologies Corp. Optoelectronics Division San Jose, CA
www.infineon.com/opto 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG Regensburg, Germany
www.osram-os.com +49-941-202-7178
1
March 23, 2000-02
STANDARD RED
SCF5740
HIGH EFFICIENCY RED
SCF5742
HIGH EFFICIENCY GREEN
SCF5744
0.270" 4-Character 5x7 Dot Matrix
Serial Input Dot Addressable
Intelligent Display
Devices
FEATURES
Four 0.270" (6.85 mm) 5x7 Dot Matrix Characters
in Red, High Efficiency Red, High Efficiency Green
Optimum Display Surface Efficiency
(display area to package ratio)
High Speed Data Input Rate: 5.0 MHz
ROMless Serial Input, Dot Addressable Display
Ideal for User Defined Characters
Built-in Decoders, Multiplexers and LED Drivers
Readable from 6 Feet (1.8 meters)
Wide Viewing Angle, X Axis 55
, Y Axis 55
Attributes:
140 Bit RAM for User Defined Characters
Eight Dimming Levels
Power Down Model (<250
W)
Hardware/Software Clear Functions
Internal or External Clock
DESCRIPTION
The SCF574X is a four digit, dot addressable 5 x 7 dot matrix, serial
input, alphanumeric Intelligent Display device. The four digits are
packaged in a rugged, high quality, optically transparent, plastic 22
pin DIP with 0.1" pin spacing.
The on-board CMOS has a 140 bit RAM, one bit associated with one
LED, each to generate User Defined Characters. In Power Down
Mode, quiescent current is <50
A.
The SCF574X is designed for work with the serial port of most com-
mon microprocessors. Data is transferred into the display through the
Serial Data Input (DATA), clocked by the Serial Data Clock (SDCLK),
and enabled by the Load Input (LOAD).
The Clock I/O (CLK I/O) and Clock Select (CLK SEL) pins offer the
user the capability to supply a high speed external multiplex clock.
This feature can minimize audio in-band interference for portable com-
munication equipment or eliminate the visual sychronization effects
found in high vibration environments such as avionic equipment.
SCF574X
OSRAM
.270
(6.86)
.790
.010
(20.07
.25)
.276 (7.0) max.
.100
.015
(2.54
.38)
.157
.007
(3.99
.18)
.175 (4.45)
Pin 1
indicator
EIA date code
.160
.020 (4.06
.51)
Z
.145
.015
(3.68
.38)
YYWW
1.300 max
(33.02)
.018 x .012 (.46 x .30)
Leads 22 plcs.
Luminous intensity code
.325
(8.26)
.600
.020
(15.25
.51)
Dimensions in Inches (mm)
2000 Infineon Technologies Corp. Optoelectronics Division San Jose, CA
SCF5740/2/4
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OSRAM Opto Semiconductors GmbH & Co. OHG Regensburg, Germany
www.osram-os.com +49-941-202-7178
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March 23, 2000-02
Maximum Ratings
DC Supply Voltage ............................................ 0.5 to +7.0 Vdc
Input Voltage Levels Relative
to Ground ............................................... 0.5 to
V
CC
+0.5 Vdc
Operating Temperature ..................................... 40
C to +85
C
Storage Temperature ....................................... 40
C to +100
C
Maximum Solder Temperature 0.063"
below Seating Plane, t<5 s ........................................... 260
C
Relative Humidity at 85
C ...................................................85%
Maximum Number of LEDs at 100% Brightness................... 64
Maximum Power Dissipation ..........................................0.65 W
ESD (100 pF, 1.5 kW)........................................................ 2.0 kV
Maximum Input Current .............................................. 186 mA
Figure 1. Timing Diagram--Data Write Cycle
Figure 2. Timing Diagram--Instruction Cycle
SDCLK
SDCLK
T
SDCW
T
DATA
LOAD
D0
DS
T
LDS
T
TDH
D7
LDH
T
LOAD
LOAD
DATA
DATA
SDCLK
SDCLK
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D0
BL
T
WR
T
OR
2000 Infineon Technologies Corp. Optoelectronics Division San Jose, CA
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March 23, 2000-02
Optical Characteristics at 25
C
(
V
CC
=5.0 V at 100% brightness level, viewing angle: X axis 55
, Y axis 65
)
Red SCF5740
High Efficiency Red SCF5742
High Efficiency Green SCF5744
Notes:
1. Dot to dot intensity matching at 100% brightness is 1.8:1.
2. Displays within a given intensity category have an intensity matching of 1.5:1 (max.)
Switching Specifications
(over operating temperature range and
V
CC
=4.5 V to 5.5 V)
Note:
T
SDCW
is the minimum time the SDCLK may be low or high.
The SDCLK period must be a minimum of 200 ns.
Description
Symbol
Min.
Typ.
Units
Luminous Intensity
I
V
55
--
cd/dot
Peak Wavelength
(peak)
--
655
nm
Dominant Wavelength
(d)
--
639
nm
Description
Symbol
Min.
Typ.
Units
Luminous Intensity
I
V
110
--
cd/dot
Peak Wavelength
(peak)
--
630
nm
Dominant Wavelength
(d)
--
626
nm
Description
Symbol
Min.
Typ.
Units
Luminous Intensity
I
V
110
--
cd/dot
Peak Wavelength
(peak)
--
568
nm
Dominant Wavelength
(d)
--
574
nm
Symbol
Description
Min.
Units
T
RC
Reset Active Time
600
ns
T
LDS
Load Setup Time
50
ns
T
DS
Data Setup Time
50
ns
T
SDCLK
Clock Period
200
ns
T
SDCW
Clock Width
70
ns
T
LDH
Load Hold Time
0
ns
T
DH
Data Hold Time
25
ns
T
WR
Total Write Time
2.2
s
T
BL
Time Between Loads
600
ns
2000 Infineon Technologies Corp. Optoelectronics Division San Jose, CA
SCF5740/2/4
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March 23, 2000-02
Electrical Characteristics
(over operating temperature)
Notes:
1) Peak current
5
/
3
x
I
CC
.
2) Unused inputs must be tied high.
3) Contact Infineon for 3.3 volt operation.
4) External oscillator must be stopped if being used to maintain an
I
CC
<50
A.
Input/Output Circuits
Figures 3 and 4 show the input and output resistor/diode
networks used for ESD protection and to eliminate substrate
latch-up caused by input voltage over/under shoot.
Figure 3. Inputs
Figure 4. Clock I/O
Parameter
Min.
Typ.
Max.
Units
Conditions
V
CC
4.5
5.0
5.5
V
--
I
CC
(PWR DWN)(4)
--
--
50
A
V
CC
=5.0 V, all inputs=0 V or
V
CC
I
CC
4 digits
20 dots/character
--
150
186
mA
V
CC
=5.0 V, "#" displayed in all 4 digits
at 100% brightness at 25
C
I
IL
Input current
--
--
10
A
V
CC
=5.0 V,
V
IN
=0 (all inputs)
I
IH
Input current
--
--
10
A
V
CC
=
V
IN
=5.0 V (all inputs)
V
IH
3.5
--
--
V
V
CC
=4.5 V to 5.5 V
V
IL
--
--
1.5
V
V
CC
=4.5 V to 5.5 V
I
OH
(CLK I/O)
--
28
--
mA
V
CC
=4.5 V,
V
OH
=2.4 V
I
OL
(CLK I/O)
--
23
--
mA
V
CC
=4.5 V,
V
OL
=0.4 V
JC
-pin
--
--
32
C/W
--
Fext External Clock Input
Frequency
120
--
347
KHz
V
CC
=5.0 V, CLKSEL=0
Fosc Internal Clock Input
Frequency
120
--
347
KHz
V
CC
=5.0 V, CLKSEL=1
Clock I/O Bus Loading
--
--
240
pF
--
Clock Out Rise Time
--
--
500
ns
V
CC
=4.5 V,
V
OH
=2.4 V
Clock Out Fall Time
--
--
500
ns
V
CC
=4.5 V,
V
OH
=0.4 V
FM, Digit
375
768
1086
Hz
--
VCC
1 k
GND
input
V
CC
1 k
GND
input/output
2000 Infineon Technologies Corp. Optoelectronics Division San Jose, CA
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March 23, 2000-02
Figure 5. Top View
Pin Assignment
Figure 6. Dot Matrix Format
Pin
Function
Pin
Function
1
N/C
22
N/C
2
GND
21
CLKSEL
3
N/C
20
CLK I/O
4
N/C
19
RST
5
N/C
18
N/C
6
N/C
17
N/C
7
N/C
16
N/C
8
N/C
15
SCLK
9
V
LL
14
DATA
10
V
CC
13
LOAD
11
N/C
12
N/C
1 Pins 11
22 Pins 12
Digit 0 Digit 1 Digit 2 Digit 3
0.175
(4.45)
0.043
(1.09)
typ.
0.009
(0.23)
typ.
0.045
(1.14) typ.
0.270
(6.86)
R1
C1 C2 C3 C4 C5
R0
R2
R3
R4
R5
R6
Dimensions in inches (mm)
Tolerance: .XXX .010 (.25)
Pin Definitions
Pin
Function
Definitions
1
N/C
--
2
GND
Power supply ground
3
N/C
--
4
N/C
--
5
N/C
--
6
N/C
--
7
N/C
--
8
N/C
--
9
V
LL
LED supply
10
V
CC
Logic supply
11
N/C
--
12
N/C
--
13
LOAD
Low input enables data clocking
into 8-bit serial shift register.
When load goes high, the con-
tents of 8-bit serial shift register
will be decoded.
14
DATA
Serial data input
15
SDCLK
For loading data into the 8-bit
serial data register
16
N/C
--
17
N/C
--
18
N/C
--
19
RST
Asynchronous input, when low
clears the multiplex counter,
address register, control word reg-
ister, user RAM and data register.
Control word register is set to
100% brightness. The display will
be blank.
20
CLK I/O
Outputs Master Clock or inputs
External Clock
21
CLKSEL
High=Internal Clock (Master)
Low=External Clock (Slave)
22
N/C
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March 23, 2000-02
Display Column and Row Format
Column Data Ranges
Figure 7. Block Diagram
C0
C1
C2
C3
C4
Row 0
1
1
1
1
1
Row 1
0
0
1
0
0
Row 2
0
0
1
0
0
Row 3
0
0
1
0
0
Row 4
0
0
1
0
0
Row 5
0
0
1
0
0
Row 6
0
0
1
0
0
Row 0
00H to 1FH
Row 1
00H to LFH
Row 2
00H to LFH
Row 3
00H to LFH
Row 4
00H to LFH
Row 5
00H to LFH
Row 6
00H to LFH
Y Address Decode
RST
CLKSEL
CLK I/O
Data
SDCLK
Load
V1
V2
Columns
0 to 20
User RAM
Memory
7x20 Bits
X Address Decode
3 Bit Address Register
6 Bit Control
Word Register
Control Word Logic
VDIM Controls
8 Bit Serial Register
Column
Drivers
Digit
0 to 4
Display
OSC
7
Counter
Row Control Logic
and Row Drivers
Rows
0 to 6
0 1 2 3
64
Counter
Mux
Rate
Operation of the SCF574X
The SCF574X display consists of a CMOS IC containing control
logic and drivers for four 5x7 characters. These components
are assembled in a compact plastic package.
Individual LED dot addressability allows the user great freedom
in creating special characters or mini-icons.
The serial data interface provides a highly efficient interconnec-
tion between the display and the mother board. The SCF574X
requires only three lines as compared to 14 for an equivalent
four character parallel input part.
The on-board CMOS IC is the electronic heart of the display.
The IC accepts decoded serial data, which is stored in the inter-
nal RAM. Asynchronously the RAM is read by the character
multiplexer at a strobe rate that results in a flicker free display.
Figure 7 shows the three functional areas of the IC. These
include: the input serial data register and control logic, a 140
bits two port RAM, and an internal multiplexer/display driver.
1=Display dot "On"
0=Display dot "Off'
2000 Infineon Technologies Corp. Optoelectronics Division San Jose, CA
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March 23, 2000-02
The following explains how to format the serial data to be
loaded into the display. The user supplies a string of bit mapped
decoded characters. The contents of this string is shown in Fig-
ure 8a. Figure 8b shows that each character consist of eight 8
bit words. The first word encodes the display character location
and the succeeding seven bytes are row data. The row data
represents the status (On, Off) of individual column LEDs. Fig-
ure 8c shows that each 8 bit word is formatted to represent
Character Address, or Column Data.
Figure 8d shows the sequence for loading the bytes of data.
Bringing the LOAD line low enables the serial register to accept
data. The shift action occurs on the low to high transition of the
serial data clock (SDCLK). The least significant bit (D0) is loaded
first. After eight clock pulses the LOAD line is brought high.
With this transition the OPCODE is decoded. The decoded
OPCODE directs D4D0 to be latched in the Character Address
register, stored in the RAM as Column data, or latched in the
Control Word register. The control IC requires a minimum 600
ns delay between successive byte loads. As indicated in Figure
8a, a total of 256 bits of data are required to load all four charac-
ters into the display.
The Character Address Register bits, D4D0 (Table 2), and Row
Address Register bits, D7D5 (Table 3), direct the Column Data
bits, D4D0 (Table 3) to specific RAM location.
Figure 8. Loading Serial Character Data
Character 0
Character 1
Character 2
Character 3
352 Clock Cycles, 70.4
s
Example: Serial Clock = 5.0 MHz, Clock Period = 200 ns
Time between LOADS
LOAD
Clock
Period
t 0
D0
D1
D2
D3
D4
D5
D6
D7
11 Clock Cycles, 2.2
s
Time
Between
Loads
600 ns(min)
OPCODE
Character Address
OPCODE
Column Data
D0
D
D1
D
D2
D
D3
D
D4
D
11 Clock Cycles, 2.2
s
Character 0
Address
Row 0 Column
Data
88 Clock Cycles, 17.6
s
Row 1 Column
Data
Row 2 Column
Data
Row 3 Column
Data
Row 4 Column
Data
D0
0
D1
0
D2
0
D3
0
D4
0
D5
1
D6
0
D7
1
a.
b.
c.
d.
Row 5 Column
Data
Row 6 Column
Data
D5
0
D6
0
D7
0
Time
Between
Loads
600 ns(min)
Serial
Clock
DATA
Table 1 shows the Row Address for the example character
"D." Column data is written and read asynchronously from the
140 bit RAM. Once loaded the internal oscillator and character
multiplexer reads the data from the RAM. These characters are
row strobed with column data as shown in Figures 9 and 10.
The character strobe rate is determined by the internal or user
supplied external MUX Clock and the IC's 320 counter.
Table 1. Character "D"
Op code
D7 D6 D5
Column Data
D4 D3 D2 D1 D0
C0 C1 C2 C3 C4
Hex
Row 0
0
0
0
1
1
1
1
0
1E
Row 1
0
0
0
1
0
0
0
1
11
Row 2
0
0
0
1
0
0
0
1
11
Row 3
0
0
0
1
0
0
0
1
11
Row 4
0
0
0
1
0
0
0
1
11
Row 5
0
0
0
1
0
0
0
1
11
Row 6
0
0
0
1
1
1
1
0
1E
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March 23, 2000-02
Table 2. Load Character Address
Table 3. Load Column Data
The user can activate four Control functions. These include: LED
Brightness Level, IC Power Down, Prescaler, or Display Clear.
OPCODEs and six bit words are used to initiate these functions.
The OPCODEs and Control Words for the Character Address
and Loading Column Data are shown in Tables 2 and 3.
The user can select eight specific LED brightness levels, Tables
4 and 5. Depending on how D3 is selected either one (1) for
maximum peak current or zero (0) for 12.5% of maximum peak
current in the control word per Tables 4 and 5, the user can
select 16 specific LED brightness levels. These brightness lev-
els (in percentages of full brightness of the display) depending
on how the user selects D3 can be one (1) or zero (0) are as fol-
lows: 100% (E0
HEX
or E8
HEX
), 53% (E1
HEX
or E9
HEX
), 40%
(E2
HEX
or EA
HEX
), 27% (E3
HEX
or EB
HEX
), 20% (E4
HEX
or
EC
HEX
), 13% (E5
HEX
or ED
HEX
), and 6.6% (E6
HEX
or EE
HEX
),
0.0% (E7
HEX
or EF
HEX
). The brightness levels are controlled by
changing the duty factor of the row strobe pulse.
The SCF574X offers a unique Display Power Down feature
which reduces
I
CC
to less than 50
A. When EF
HEX
is loaded
(Table 6) the display is set to 0% brightness. When in the
Power Down mode data may still be written into the RAM. The
display is reactivated by loading a new brightness Level Control
Word into the display.
Op code
D7 D6 D5
Character Address
D4 D3 D2 D1 D0
Hex
Operation
Load
1
0
1
0
0
0
0
0
A0
Character 0
1
0
1
0
0
0
0
1
A1
Character 1
1
0
1
0
0
0
1
0
A2
Character 2
1
0
1
0
0
0
1
1
A3
Character 3
Op code
D7 D6 D5
Column Data
D4 D3 D2 D1 D0
Operation Load
0
0
0
C0 C1 C2 C3 C4
Row 0
0
0
0
C0 C1 C2 C3 C4
Row 1
0
0
0
C0 C1 C2 C3 C4
Row 2
0
0
0
C0 C1 C2 C3 C4
Row 3
0
0
0
C0 C1 C2 C3 C4
Row 4
0
0
0
C0 C1 C2 C3 C4
Row 5
0
0
0
C0 C1 C2 C3 C4
Row 6
Table 4. Display Brightness
Table 5. Display Brightness
Table 6. Power Down
Figure 9. Row and Column Locations for a Character "D"
Op code
D7 D6 D5
Control Word
D4 D3 D2 D1 D0
Hex
Operation
Level
1
1
1
0
0
0
0
0
E0
100%
1
1
1
0
0
0
0
1
E1
53%
1
1
1
0
0
0
1
0
E2
40%
1
1
1
0
0
0
1
1
E3
27%
1
1
1
0
0
1
0
0
E4
20%
1
1
1
0
0
1
0
1
E5
13%
1
1
1
0
0
1
1
0
E6
6.6%
1
1
1
0
0
1
1
1
E7
0.0%
Op code
D7 D6 D5
Control Word
D4 D3 D2 D1 D0
Hex
Operation
Level
1
1
1
0
1
0
0
0
E8
100%
1
1
1
0
1
0
0
1
E9
53%
1
1
1
0
1
0
1
0
EA
40%
1
1
1
0
1
0
1
1
EB
27%
1
1
1
0
1
1
0
0
EC
20%
1
1
1
0
1
1
0
1
ED
13%
1
1
1
0
1
1
1
0
EE
6.6%
1
1
1
0
1
1
1
1
EF
0.0%
Op code
D7 D6 D5
Control Word
D4 D3 D2 D1 D0
Hex
Operation
Level
1
1
1
0
1
1
1
1
EF
0% brightness
off LED
on LED
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Previously "on" LED
0 1 2 3 4
Columns
2000 Infineon Technologies Corp. Optoelectronics Division San Jose, CA
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March 23, 2000-02
Figure 10. Row Strobing
The SCF574X allows a high frequency external oscillator
source to drive the display. Data bit, D4, in the control word
format controls the prescaler function. The prescaler allows
the oscillator source to be divided by 16 by setting D4=1.
However, the prescaler should not be used, i.e., when using
the internal oscillator source.
The Software Clear (C0
HEX
), given in Table 7, clears the
Address Register and the RAM. The display is blanked and the
Character Address Register will be set to Character 0. The
internal counter and the Control Word Register are unaffected.
The Software Clear will remain active until the next data input
cycle is initiated.
Table 7. Software Clear
Multiplexer and Display Driver
The four characters are row multiplexed with RAM resident col-
umn data. The strobe rate is established by the internal or
external MUX Clock rate. The MUX Clock frequency is divided
by a 448 counter chain. This results in a typical strobe rate of
768 Hz. By pulling the Clock SEL line low, the display can be
operated from an external MUX Clock. The external clock is
attached to the CLK I/O connection (pin 9). The maximum
external MUX Clock frequency should be limited to 1.0 MHz.
An asynchronous hardware Reset Pin is also provided. Bringing
this pin low will clear the Character Address Register, Control
Word Register, RAM, and blanks the display. This action leaves
the display set at Character Address 0, and the Brightness
Level set at 100%.
Electrical and Mechanical Considerations
Thermal Considerations
Optimum product performance can be had when the following
electrical and mechanical recommendations are adopted. The
SCF574X's IC is constructed in a high speed CMOS process,
consequently high speed noise on the SERIAL DATA, SERIAL
DATA CLOCK, LOAD and RESET lines may cause incorrect
data to be written into the serial shift register. Adhere to trans-
mission line termination procedures when using fast line driv-
ers and long cables (>10 cm).
Op code
D7 D6
Control Word
D5 D4 D3 D2 D1 D0
Hex
Operation
1
1
0
0
0
0
0
0
C0
CLEAR
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0 1 2 3 4
Columns
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0 1 2 3 4
Columns
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0 1 2 3 4
Columns
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0 1 2 3 4
Columns
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0 1 2 3 4
Columns
ROW LOAD LOAD ROW 0 LOAD ROW 1 LOAD ROW 2 LOAD ROW 3 LOAD ROW 4 LOAD ROW 5 LOAD ROW 6
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0 1 2 3 4
Columns
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0 1 2 3 4
Columns
Good ground (pin 2) and power supply decoupling (pins 9 and
10) will insure that I
CC
(<400 mA peak) switching currents do
not generate localized ground bounce. Therefore it is recom-
mended that each display package use a 0.1
F and 20
F
capacitor between V
CC
and ground.
When the internal MUX Clock is being used connect the
CLKSEL pin to V
CC
. In those applications where RESET will not
be connected to the system's reset control, it is recommended
that this pin be connected to the center node of a series
0.1,
F and 100 k
RC network. Thus upon initial power up the
RESET will be held low for 10 ms allowing adequate time for
the system power supply to stabilize.
ESD Protection
The input protection structure of the SCF574X provides signifi-
cant protection against ESD damage. It is capable of withstand-
ing discharges greater than 2.0 kV. Take all the standard
precautions, normal for CMOS components. These include
properly grounding personnel, tools, tables, and transport carri-
ers that come in contact with unshielded parts. If these condi-
tions are not, or cannot be met, keep the leads of the device
shorted together or the parts in anti-static packaging.
Soldering Considerations
The SCF574X can be hand soldered with SN63 solder using a
grounded iron set to 260
C.
Wave soldering is also possible following these conditions:
Preheat that does not exceed 93
C on the solder side of the
PC board or a package surface temperature of 85
C. Water sol-
uble organic acid flux (except carboxylic acid) or rosin-based
RMA flux without alcohol can be used.
Wave temperature of 245
C 5
C with a dwell between 1.5 sec.
to 3.0 sec. Exposure to the wave should not exceed tempera-
tures above 260
C for five seconds at 0.063" below the seating
plane. The packages should not be immersed in the wave.
2000 Infineon Technologies Corp. Optoelectronics Division San Jose, CA
SCF5740/2/4
www.infineon.com/opto 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG Regensburg, Germany
www.osram-os.com +49-941-202-7178
10
March 23, 2000-02
Post Solder Cleaning Procedures
The least offensive cleaning solution is hot D.I. water (60
C) for
less than 15 minutes. Addition of mild saponifiers is accept-
able. Do not use commercial dishwasher detergents.
For faster cleaning, solvents may be used. Exercise care in
choosing solvents as some may chemically attack the nylon
package. For further information refer to Appnotes 18 and 19.
An alternative to soldering and cleaning the display modules is
to use sockets. Naturally, 14 pin DIP sockets .300" wide with
.100" centers work well for single displays. Multiple display
assemblies are best handled by longer SIP sockets or DIP sock-
ets when available for uniform package alignment. Socket man-
ufacturers are Aries Electronics, Inc., Frenchtown, NJ; Garry
Manufacturing, New Brunswick, NJ; Robinson-Nugent, New
Albany, IN; and Samtec Electronic Hardward, New Albany, IN.
For further information refer to Appnote 22.
Optical Considerations
The 0.270" high character of the SCF574X gives readability up
to five feet. Proper filter selection enhances readability over
this distance.
Using filters emphasizes the contrast ratio between a lit LED
and the character background. This will increase the discrimina-
tion of different characters. The only limitation is cost. Take into
consideration the ambient lighting environment for the best
cost/benefit ratio for filters.
Incandescent (with almost no green) or fluorescent (with
almost no red) lights do not have the flat spectral response of
sunlight. Plastic band-pass filters are an inexpensive and effec-
tive way to strengthen contrast ratios. The SCF5740 is a red
display and should be used with long wavelength pass filter
having a sharp cut-off in the 600 nm to 620 nm range. The
SCF5742 is a high efficiency red display and should be used
with long wavelength pass filter having a sharp cut-off in the
570 nm to 600 nm range. The SCF5744 is a high efficiency
green display and should be used with long wavelength pass
filter that peaks at 565 nm.
Figure 11. Display Interface to Siemens/Intel 8031
Microprocessor (using serial port in mode 0)
V
CC
V
CC
V
CC
U1
8031
9 RST
18
19
XTAL2
XTAL1
40
RXD
TXD
10
11
10
21
8
22
f
TAN
.01
f
P3.7 17
P3.3 13
P3.4 14
GND
DATA
V
CC
CLKSEL
CLK I/O
SDCLK
LD
RST
GND
ID
+
15
13
19
2
14
Additional contrast enhancement is gained by shading the
displays. Plastic band-pass filters with built-in louvers offer the
next step up in contrast improvement. Plastic filters can be
improved further with anti-reflective coatings to reduce glare.
The trade-off is fuzzy characters. Mounting the filters close to
the display reduces this effect. Take care not to overheat the
plastic filter by allowing for proper air flow.
Optimal filter enhancements are gained by using circular polar-
ized, anti-reflective, band-pass filters. The circular polarizing fur-
ther enhances contrast by reducing the light that travels through
the filter and reflects back off the display to less than 1.0 %.
Several filter manufacturers supply quality filter materials.
Some of them are: Panelgraphic Corporation, W. Caldwell, NJ;
SGL Homalite, Wilmington, DE; 3M Company, Visual Products
Division, St. Paul, MN; Polaroid Corporation, Polarizer Division,
Cambridge, MA; Marks Polarized Corporation, Deer Park, NY,
Hoya Optics, Inc., Fremont, CA.
One last note on mounting filters: recessing displays and bezel
assemblies is an inexpensive way to provide a shading effect in
overhead lighting situations. Several Bezel manufacturers are:
R.M.F. Products, Batavia, IL; Nobex Components, Griffith Plas-
tic Corp., Burlingame, CA; Photo Chemical Products of Califor-
nia, Santa Monica, CA; I.E.E.-Atlas, Van Nuys, CA.
Microprocessor Interface
The microprocessor interface is through the serial port, SPI port
or one out of eight data bits on the eight bit parallel port and
also control lines SDCLK and LOAD.
Power Up Sequence
Upon power up display will come on at random. Thus the dis-
play should be reset at power-up. The reset will set the
Address Register to Digit 0, User RAM is set to 0 (display
blank) the Control Word is set to 0 (100% brightness) and the
internal counters are reset.
2000 Infineon Technologies Corp. Optoelectronics Division San Jose, CA
SCF5740/2/4
www.infineon.com/opto 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG Regensburg, Germany
www.osram-os.com +49-941-202-7178
11
March 23, 2000-02
Figure 12. Display Interface to Siemens/Intel 8031 Microprocessor
(using one bit of parallel port as serial port)
Figure 13. Display Interface with Motorola 68HC05C4 Microprocessor
(using SPI port)
Figure 14. Cascading Multiple Displays
V
CC
V
CC
U1
8031
1
9
20
RST
P1.0
18
19
XTAL2
XTAL1
40 P3.0
P3.1
P3.6
P0.0
10
11
16
39
V
CC
10
21
8
22
F
TAN
.01
F
GND
DATA
V
CC
CLKSEL
CLK I/O
SDCLK
LD
RST
GND
ID
+
15
13
19
2
14
V
CC
V
CC
U1
68HC05C4
1
9
20
RST
PA2
38
39
OSC1
OSC2
40
PA0
PA1
SCLK
MOSI
11
10
33
32
V
CC
10
21
8
22
F
TAN
.01
F
GND
DATA
V
CC
CS
CLK I/O
SDCLK
LD
RST
GND
ID
+
15
13
19
2
14
RST CLK I/O CLK SEL
DATA SDCLK
LOAD
14 more displays
in between
RST CLK I/O CLK SEL
DATA SDCLK LOAD
Chip
Address
Decoder
0
15
Address Decode 114
V
CC
RST
DATA
SDCLK
A0
A1
A2
A3
LD
Intelligent Display
Intelligent Display
CE
2000 Infineon Technologies Corp. Optoelectronics Division San Jose, CA
SCF5740/2/4
www.infineon.com/opto 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG Regensburg, Germany
www.osram-os.com +49-941-202-7178
12
March 23, 2000-02
Multiple displays can be cascaded using the CLK SEL and CLK
I/O pins (Figure 14). The display designated as the Master-
Clock source should have its CLK SEL pin tied high and the
slaves should have their CLK SEL pins tied low. All CLK I/O
pins should be tied together. One display CLK I/O can drive 15
slave CLK I/Os. Use RST to synchronize all display counters.
Loading Data into the Display
Use following procedure to load data into the display:
1. Power up the display.
2. Bring RST low (600 ns duration minimum) to clear the
Multiplex Counter, Address Register, Control Word
Register, User Ram and Data Register. The display will be
blank. Display brightness is set to 100%.
3. If a different brightness is desired, load the proper bright-
ness opcode into the Control Word Register.
4. Load the Digit Address into the display.
5. Load display row and column data for the selected digit.
6. Repeat steps 4 and 5 for all digits.
Data Contents for the Word "ABCD"
Step
D7 D6
D5
D4 D3
D2
D1
D0
Function
A
B (optional)
1 1
0
1 1
1
0
0
0
0
0
0
0
0
0
0
CLEAR
100% BRIGHTNESS
1
2
3
4
5
6
7
8
1
0
1
0
0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
1
0
1
0
0
0
1
1
1
1
1
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
DIGIT D0 SELECT
ROW 0 (A)
ROW 1 (A)
ROW 2 (A)
ROW 3 (A)
ROW 4 (A)
ROW 5 (A)
ROW 6 (A)
9
10
11
12
13
14
15
16
1 0
1
0
0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
1
1
0
0
0
1
1
1
1
1
0
1
0
0
0
1
1
0
0
0
1
1
1
1
1
1
DIGIT D1 SELECT
ROW 0 (B)
ROW 1 (B)
ROW 2 (B)
ROW 3 (B)
ROW 4 (B)
ROW 5 (B)
ROW 6 (B)
17
18
19
20
21
22
23
24
1 0
1
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0
0
0
1
0
0
0
1
1
1
0
1
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
1
1
DIGIT D2 SELECT
ROW 0 (C)
ROW 1 (C)
ROW 2 (C)
ROW 3 (C)
ROW 4 (C)
ROW 5 (C)
ROW 6 (C)
25
26
27
28
29
30
31
32
1 0
1
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0 0
0
0
0
0
1
1
1
1
1
1
0
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
1
1
1
0
DIGIT D3 SELECT
ROW 0 (D)
ROW 1 (D)
ROW 2 (D)
ROW 3 (D)
ROW 4 (D)
ROW 5 (D)
ROW 6 (D)
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