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Электронный компонент: PI29FCT52T

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PI29FCT52/53T
REGISTERED TRANSCEIVERS
1
PS2001A 03/08/96
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Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
CE CP
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
CE CP
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
CPA
CEA
OEA
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
CPB
CEB
OEB
A
REG
B
REG
PI29FCT52T and PI29FCT53T Logic Block Diagram
NOTE: PI29FCT52T function is shown.
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PI29FCT52T
PI29FCT53T
Fast CMOS
Registered Transceivers
Product Description:
Pericom Semiconductor's PI29FCT series of logic circuits are pro-
duced in the Company's advanced 0.8 micron CMOS technology,
achieving industry leading speed grades.
The PI29FCT52T and the PI29FCT53T are 8-bit registered
transceivers designed with two 8-bit back-to-back registers to store
data flowing in both directions between two bidirectional buses.
Separate clock enable and 3-state output enable signals are provided
for each register. The PI29FCT52T is a non-inverting option of the
PI29FCT53T.
Product Features:
PI29FCT52/53T is pin compatible with bipolar FASTTM
Series at a higher speed and lower power consumption
TTL input and output levels
Extremely low static power
Hysteresis on all inputs
Industrial operating temperature range: 40C to +85C
Packages available:
24-pin 300 mil wide plastic DIP (P)
24-pin 150 mil wide plastic QSOP (Q)
24-pin 150 mil wide plastic TQSOP (R)
24-pin 300 mil wide plastic SOIC (S)
PI29FCT52/53T
REGISTERED TRANSCEIVERS
2
PS2001A 03/08/96
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Pin Name
Description
A
0
-A
7
A Register Inputs or B Register Outputs
B
0
-B
7
B Register Inputs or A Register Outputs
CPA
Clock for A Register
CPB
Clock for B Register
OEA
Output Enable for B Register
OEB
Output Enable for A Register
CEA
Clock Enable for A Register
CEB
Clock Enable for B Register
GND
Ground
V
CC
Power
Product Pin Description
B
7
B
6
B
5
B
4
B
3
B
2
B
1
B
0
OEB
CPA
CEA
GND
V
CC
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
OEA
CPB
CEB
24-PIN
P24
Q24
R24
S24
PI29FCT52/53T Product Pin Configuration
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Inputs
Internal
Function
D
N
CP
CE
Q
N
Hold Data
X
X
H
NC
Load Data
L
L
L
H
L
H
PI29FCT52/53T Register Truth Table
(1)
(Applies to A or B Register)
Internal
Y-Outputs
Function
OE
Q
N
52
53
Disable Outputs
H
X
Z
Z
Enable Outputs
L
L
L
H
L
H
H
L
PI29FCT52/53T Output Control Table
(1)
1. H = High Voltage Level
L = Low Voltage Level
X = Don't Care
Z = High Impedance
NC = No Change
= LOW-to-HIGH transition
PI29FCT52/53T
REGISTERED TRANSCEIVERS
3
PS2001A 03/08/96
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................................................... 65C to +150C
Ambient Temperature with Power Applied .....................................-40C to +85C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. 0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) ........... 0.5V to +7.0V
DC Input Voltage ............................................................................ 0.5V to +7.0V
DC Output Current ..................................................................................... 120 mA
Power Dissipation .......................................................................................... 0.5W
Note:
Stresses greater than those listed under
MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions above those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect reliability.
DC Electrical Characteristics
(Over the Operating Range, T
A
= 40C to +85C, V
CC
= 5V 5%)
Parameters Description
Test Conditions
(1)
Min.
Typ
(2)
Max.
Units
V
OH
Output HIGH Voltage
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OH
= 15.0 mA
2.4
3.0
V
V
OL
Output LOW Current
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OL
= 64 mA
0.3
0.55
V
V
IH
Input HIGH Voltage
Guaranteed Logic HIGH Level
2.0
V
V
IL
Input LOW Voltage
Guaranteed Logic LOW Level
0.8
V
I
IH
Input HIGH Current
V
CC
= Max.
V
IN
= V
CC
1
A
I
IL
Input LOW Current
V
CC
= Max.
V
IN
= GND
1
A
I
OZH
High Impedance
V
CC
= Max.
V
OUT
= 2.7V
1
A
I
OZL
Output Current
V
OUT
= 0.5V
1
A
V
IK
Clamp Diode Voltage
V
CC
= Min., I
IN
= 18 mA
0.7
1.2
V
I
OS
Short Circuit Current
V
CC
= Max.
(3)
, V
OUT
= GND
60
120
mA
I
OFF
Power Down Disable
V
CC
= GND, V
OUT
= 4.5V
--
--
100
A
V
H
Input Hysteresis
200
mV
Capacitance
(T
A
= 25C, f = 1 MHz)
Parameters
(4)
Description
Test Conditions
Typ
Max.
Units
C
IN
Input Capacitance
V
IN
= 0V
6
10
pF
C
OUT
Output Capacitance
V
OUT
= 0V
8
12
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
PI29FCT52/53T
REGISTERED TRANSCEIVERS
4
PS2001A 03/08/96
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Power Supply Characteristics
Parameters Description
Test Conditions
(1)
Min.
Typ
(2)
Max.
Units
I
CC
Quiescent Power
V
CC
= Max.
V
IN
= GND
0.1
500
A
Supply Current
or V
CC
I
CC
Supply Current per
V
CC
= Max.
V
IN
= 3.4V
(3)
0.5
2.0
mA
Input @ TTL HIGH
I
CCD
Supply Current per
V
CC
= Max.,
V
IN
= V
CC
0.15
0.25
mA/
Input per MHz
(4)
Outputs Open
V
IN
= GND
MHz
OEA or OEB = GND
One Input Toggling
50% Duty Cycle
I
C
Total Power Supply
V
CC
= Max.,
V
IN
= V
CC
1.5
3.5
(5)
mA
Current
(6)
Outputs Open
V
IN
= GND
f
CP
= 10 MH
Z
50% Duty Cycle
V
IN
= 3.4V
2.0
5.5
(5)
OEA or OEB = GND
V
IN
= GND
f
I
= 5 MH
Z
One Bit Toggling
V
CC
= Max.,
V
IN
= V
CC
3.8
7.3
(5)
Outputs Open
V
IN
= GND
f
CP
= 10 MH
Z
50% Duty Cycle
V
IN
= 3.4V
6.0
16.3
(5)
OEA or OEB = GND
V
IN
= GND
Eight Bits Toggling
f
I
= 2.5 MH
Z
50% Duty Cycle
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. I
C
=I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
I
N
I
)
I
CC
= Quiescent Current
I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
I
= Input Frequency
N
I
= Number of Inputs at f
I
All currents are in milliamps and all frequencies are in megahertz.
PI29FCT52/53T
REGISTERED TRANSCEIVERS
5
PS2001A 03/08/96
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PI29FCT52T Switching Characteristics over Operating Range
29FCT52AT
29FCT52BT
29FCT52CT
C o m .
C o m .
C o m .
Parameters
Description
Conditions
(1)
Min
Max
Min
Max
Min
Max
Unit
t
PLH
Propagation Delay
C
L
= 50 pF
2.0
10.0
2.0
7.5
2.0
6.3
ns
t
PHL
CPA, CPB, to A
N
, B
N
R
L
= 500
t
PZH
Output Enable Time
1.5
10.5
1.5
8.0
1.5
7.0
ns
t
PZL
OEA, OEB, to A
N
, B
N
t
PHZ
Output Disable Time
(3)
1.5
10.0
1.5
7.5
1.5
6.5
ns
t
PLZ
OEA, OEB, to A
N
, B
N
t
SU
Set-up Time HIGH or
2.5
--
2.5
--
2.5
--
ns
LOW, A
N
, B
N
to
CPA, CPB
t
H
Hold Time HIGH or
2.0
--
1.5
--
1.5
--
ns
LOW, A
N
, B
N
to
CPA, CPB
t
SU
Set-up Time HIGH or
3.0
--
3.0
--
3.0
--
ns
LOW, CEA, CEB to
CPA, CPB
t
H
Hold Time HIGH or
2.0
--
2.0
--
2.0
--
ns
LOW, CEA, CEB to
CPA, CPB
t
W
Pulse Width HIGH
(3)
or
3.0
--
3.0
--
3.0
--
ns
LOW, CPA or CPB
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.