1
PS8685 05/27/03
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PI6C2973
Description
The PI6C2973 are 3.3V compatible, PLL based clock driver
devices targeted for high-performance CISC or RISC processor
based systems. With output frequencies of up to 125 MHz and
skews of 550ps the PI6C2973 are ideally suited for most synchro-
nous systems. The devices offer twelve low skew outputs plus a
feedback and sync output for added flexibility and ease of
system implementation.
The PI6C2973 features an extensive level of frequency program-
mability between the 12 outputs as well as the input vs output
relationships. Using the select lines output frequency ratios of
1:1, 2:1, 3:1, 3:2, 4:1, 4:3, 5:1, 5:2, 5:3, 6:1 and 6:5 between outputs
Features
Fully Integrated PLL
Output Frequency up to 125 MHz
Compatible with PowerPC and Pentium Microprocessors
3.3V V
CC
+ 100ps Typical CycletoCycle Jitter
Packaging:
-52-pin LQFP
Low Voltage PLL Clock Driver
can be realized by pulsing low one clock edge prior to the
coincident edges of the Qa and Qc outputs. The Sync output will
indicate when the coincident rising edges of the above relation-
ships will occur. The PowerOn Reset ensures proper program-
ming if the frequency select pins are set at power up. If the
fselFB2 pin is held high, it may be necessary to apply a reset after
powerup to ensure synchronization between the QFB output
and the other outputs. The internal poweron reset is designed
to provide this function, but with powerup conditions being
dependent, it is difficult to guarantee. All other conditions of the
fsel pins will automatically synchronize during PLL lock acquisi-
tion.
The PI6C2973 offers a very flexible output enable/disable scheme.
Note that all of the control inputs on the PI6C2973 have internal
pullup resistors.
The PI6C2973 is fully 3.3V compatible and requires no external
loop filter components. All inputs accept LVCMOS/LVTTL
compatible levels while the outputs provide LVCMOS levels with
the capability to drive 50 Ohm transmission lines. For series
terminated lines each PI6C2973 output can drive two 50 Ohm
lines in parallel thus effectively doubling the fanout of the
device.
Pin Configuration - PI6C2973
40
41
42
43
44
45
46
47
48
49
50
51
52
26
25
24
23
22
21
20
19
18
17
16
15
14
1 2 3 4 5 6 7 8 9 10 11 12 13
39 38 37 36 35 34 33 32 31 30 29 28 27
fselb1
fselb0
fsela1
fsela0
Qa3
VCCO
Qa2
GNDO
Qa1
VCCO
Qa0
GND0
VCO_Sel
fselFB1
QSync
GNDO
Qc0
VCCO
Qc1
fselc0
fselc1
Qc2
VCCO
Qc3
GND0
Inv_Clk
GNDO
Qb0
VCCO
Qb1
GND0
Qb2
VCCO
Qb3
Ext_FB
GNDO
QFB
VCCI
fselFB0
GND1
MR/OE
Frz_Clk
Frz_Data
fselFB2
PLL_EN
Ref_Sel
TClk_Sel
TClk0
TClk1
PECL_CLK
PECL_CLK
VCCA
2
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PI6C2973
Low Voltage PLL Clock Driver
Block Diagram
VCO
PHASE
DETECTOR
V
Qa1
Qa0
Qa3
Qa2
Qb3
Qb2
Qb1
Qb0
Qc3
Qc2
Qc1
Qc0
QSync
QFB
V
V
V
Sync
Frz
2
2
2
2
2
4, 6, 8, 12
4, 6, 8, 10
2, 4, 6, 8
4, 6, 8, 10
Sync Pulse
Data Generator
0
D
Q
D
Q
1
Sync
Frz
Sync
Frz
LPF
0
1
0
1
TCLK1
TCLK_Sel
Ext_FB
TCLK0
PLL_En
REF_Sel
VC0_Sel
PECL_CLK
PECL_CLK
V
D
Q
fsela0:1
fselb0:1
fselc0:1
fselFBO:1
Frz_Clk
Frz_Data
Inv_Clk
MR/OE
fselFB2
POWER-ON
RESET
Output Disable
Circuitry
V
12
V
D
Q
V
D
Q
D
Q
Sync
Frz
Sync
Frz
V
3
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PI6C2973
Low Voltage PLL Clock Driver
Function Table 1
1
a
l
e
s
f
0
a
l
e
s
f
a
Q
1
b
l
e
s
f
0
b
l
e
s
f
b
Q
1
c
l
e
s
f
0
c
l
e
s
f
c
Q
0
0
1
1
0
1
0
1
4
6
8
2
1
0
0
1
1
0
1
0
1
4
6
8
0
1
0
0
1
1
0
1
0
1
2
4
6
8
2
B
F
l
e
s
f
1
B
F
l
e
s
f
0
B
F
l
e
s
f
B
F
Q
0
0
0
0
0
0
1
1
0
1
0
1
4
6
8
0
1
1
1
1
1
0
0
1
1
0
1
0
1
8
2
1
6
1
0
2
n
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P
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C
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0
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c
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1
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P
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/
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C
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v
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2
/
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C
V
K
L
C
T
0
K
L
C
T
L
L
P
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B
Z
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3
c
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2
c
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v
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-
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1
K
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b
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u
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l
b
a
n
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3
c
Q
,
2
c
Q
d
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t
r
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v
n
I
Function Table 2
Function Table 3
4
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PI6C2973
Low Voltage PLL Clock Driver
1:1 Mode
2:1 Mode
3:1 Mode
3:2 Mode
4:1 Mode
4:3 Mode
1:6 Mode
fVCO
Qa
Qc
Sync
Qa
Qc
Sync
Qc( 2)
Qa( 6)
Sync
Qa( 4)
Qc( 6)
Sync
Qc( 2)
Qa( 8)
Sync
Qa( 6)
Qc( 8)
Sync
Qa( 12)
Qc( 2)
Sync
Timing Diagrams
5
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PI6C2973
Low Voltage PLL Clock Driver
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2
Notes:
1. V
CMR
is the difference from the most positive side of the differential input signal. Normal operation is obtained when
the "High" input is within the V
CMR
range and the input lies within the V
PP
specification.
2. The PI6C2973 outputs can drive series or parallel terminated 50 Ohm (or 50 Ohm to V
CC
/2) transmission lines on the
incident edge.
3. Inputs have pullup/pulldown resistors which affect input current.
4. Special thermal handling may be required in some configurations.
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1
C
Absolute Maximum Ratings
*Absolute maximum continuous ratings are those values beyond which damage to the device may occur.
Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability.
Functional operation under absolute-maximum-rated conditions is not implied.
DC Characteristics (T
A
= 0C to 70C, V
CC
= 3.3V 5%)
(4)
6
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PI6C2973
Low Voltage PLL Clock Driver
Notes:
7. 50 Ohm transmission line terminated into V
CC
/2
8. tpd is specified for a 50 MHz input reference. The window will shrink/grow proportionally from the minimum limit with shorter/
longer input reference periods. The tpd does not include jitter.
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z
H
M
PLL Input Reference Characteristic (T
A
= 0C to 70C)
Notes:
5. Maximum input reference frequency is limited by the VCO lock range and the feedback divider or 100 MHz,
minimum input reference frequency is limited by the VCO lock range and the feedback divider.
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AC Characteristics (T
A
= 0C to 70C, V
CC
= 3.3V 5%)
7
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PI6C2973
Low Voltage PLL Clock Driver
Packaging Mechanical: 52-Pin LQFP
D0D3 are the control bits for Qa0Qa3, respectively
D4D7 are the control bits for Qb0Qb3, respectively
D8D10 are the control bits for Qc1Qc3, respectively
D11 is the control bit for QSync
Freeze Data Input Protocol
t
r
a
t
S
ti
B
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
D
0
1
D
1
1
D
Seating Plane
0.65 BSC
.026
0.22
0.38
.009
.015
1.60
.063
1.35
1.45
.053
.057
0.05
0.15
.002
.006
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
12.00 BSC
.394
Square
10.00 BSC
.472
Square
GAUGE PLANE
1.00 REF
.039
0.45
0.75
.018
.030
0.09
0.20
.004
.008
0.25 mm
Max.
0.10
.004
0
7
8
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PI6C2973
Low Voltage PLL Clock Driver
Pericom Semiconductor Corporation
2380 Bering Drive San Jose, CA 95131 1-800-435-2336 Fax (408) 435-1100 http://www.pericom.com
e
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3
7
9
2
C
6
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C
F
P
F
Q
L
n
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p
-
2
5
Ordering Information
Notes:
1. Thermal characteristics can be found on the company web site at http://www.pericom.com/packaging/mechanicals.php
PDF 
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