1
PS8134A 02/23/98
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PI74ALVCH16601
18-Bit Universal Bus Transceiver
With 3-State Outputs
Logic Block Diagram
Product Description
Pericom Semiconductor's PI74ALVCH series of logic
circuits are produced using the Company's advanced
0.5 micron CMOS technology, achieving industry
leading speed.
The PI74ALVCH16601 uses D-type latches and D-
type flip-flops with 3-state outputs to allow data flow
in transparent, latched, and clocked modes.
Data flow in each direction is controlled by Output
Enable (OEAB and OEBA), Latched Enable (LEAB
and LEBA), and Clock (CLKAB and CLKBA) inputs.
The clock can be controlled by the Clock Enable
(CLKENAB and CLKENBA) inputs. For A-to-B data
flow, the device operates in the transparent mode when
LEAB is HIGH. When LEAB is LOW, the A data is
latched if CLKAB is held at a high or low logic level.
If LEAB is low, the A-bus is stored in the latch/flip-flop
on the low-to-high transition of CLKAB. When OEAB
is low, the outputs are active. When OEAB is HIGH, the
outputs are in the high-impedance state.
Data flow for B to A is similar to that of A to B but uses
OEBA, LEBA, CLKBA, and CLKENBA.
To ensure the high-impedance state during power up
or power down, OE should be tied to V
CC
through a pull-
up resistor; the minimum value of the resistor is
determined by the current-sinking capability of the
driver.
The PI74ALVCH16601 has "Bus Hold" which retains
the data input's last state whenever the data input goes
to high-impedance preventing "floating" inputs and
eliminating the need for pullup/down resistors.
Product Features
PI74ALVCH16601 is designed for low voltage operation
V
CC
= 2.3V to 3.6V
Hysteresis on all inputs
Typical V
OLP
(Output Ground Bounce)
< 0.8V at V
CC
= 3.3V, T
A
= 25C
Typical V
OHV
(Output V
OH
Undershoot)
< 2.0V at V
CC
= 3.3V, T
A
= 25C
Bus Hold retains last active bus state during 3-State,
eliminating the need for external pullup resistors
Industrial operation at 40C to +85C
Packages available:
56-pin 240 mil wide plastic TSSOP (A)
56-pin 300 mil wide plastic SSOP (V)
PI74ALVCH16601
18-Bit Universal Bus Transceiver
2
PS8134A 02/23/98
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Pin Name
Description
CLKEN
Clock Enable Input (Active LOW)
OE
Output Enable Input (Active LOW)
LE
Latch Enable (Active HIGH)
CLK
Clock Input (Active HIGH)
Ax
Data I/O
Bx
Data I/O
GND
Ground
V
CC
Power
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
25
26
27
28
32
31
30
29
Product Pin Description
Truth Table
(1)
Notes:
1. H = High Signal Level
L = Low Signal Level
Z = High Impedance
= LOW-to-HIGH Transition
A-to-B data flow is shown: B-to-A flow is similar but
uses OEBA, LEBA, CLKBA, and CLKENBA.
Output level before the indicated steady-state input
conditions were established.
Output level before the indicated steady-state input
conditions were established, provided that CLKAB is
HIGH before LEAB goes LOW.
Product Pin Configuration
56-PIN
A-56
V-56
s
t
u
p
n
I
B
t
u
p
t
u
O
B
A
N
E
K
L
C
B
A
E
O
B
A
E
L
B
A
K
L
C
A
X
H
X
X
X
Z
X
L
H
X
L
L
X
L
H
X
H
H
H
L
L
X
X
B
0
H
L
L
X
X
B
0
L
L
L
L
L
L
L
L
H
H
L
L
L
L
X
B
0
L
L
L
H
X
B
0
OEAB
LEAB
A1
GND
A2
A3
VCC
A4
A5
A6
GND
A7
A8
A9
A10
A11
A12
GND
A13
A14
A15
VCC
A16
A17
GND
A18
OEBA
LEBA
CLKENAB
CLKAB
B1
GND
B2
B3
VCC
B4
B5
B6
GND
B7
B8
B9
B10
B11
B12
GND
B13
B14
B15
VCC
B16
B17
GND
B18
CLKBA
CLKENBA
PI74ALVCH16601
18-Bit Universal Bus Transceiver
3
PS8134A 02/23/98
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Recommended Operating Conditions
(1)
Note: Unused control inputs must be held HIGH or LOW to prevent them from floating.
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=
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2
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8
C
Note:
Stresses greater than those listed under MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ........................................ 65C to +150C
Ambient Temperature with Power Applied ........ 10C to +85C
Input Voltage Range,V
IN
.............................0.5V to V
CC
+ 0.5V
Output Voltage Range, V
OUT
......................0.5V to V
CC
+ 0.5V
DC Input Voltage ................................................ 0.5V to + 0.5V
DC Output Current .......................................................... 100mA
Power Dissipation ............................................................... 1.0W
PI74ALVCH16601
18-Bit Universal Bus Transceiver
4
PS8134A 02/23/98
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DC Electrical Characteristics
(Over the Operating Range, T
A
= 40C to +85C, V
CC
= 3.3V 10%)
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3
8
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25C ambient and maximum loading.
3. Bus Hold maximum dynamic current required to switch the input from one state to another.
4. For I/O ports, the I
OZ
includes the input leakage current.
PI74ALVCH16601
18-Bit Universal Bus Transceiver
5
PS8134A 02/23/98
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Timing Requirements over Operating Range
Switching Characteristics over Operating Range
(1)
Pericom Semiconductor Corporation
2380 Bering Drive San Jose, CA 95131 1-800-435-2336 Fax (408) 435-1100 http://www.pericom.com
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Notes:
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2. Minimum limits are guaranteed but not tested on Propagation Delays.
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Note: Unused control inputs must be held HIGH or LOW to prevent them from floating.
Operating Characteristics, T
A
= 25C
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