1
PS8525 12/10/01
Product Description
Pericom Semiconductors PI74AVC+ series of logic circuits are
produced using the Companys advanced submicron CMOS
technology, achieving industry leading speed.
The 16-bit PI74AVC+16334 universal bus driver is designed
for 2.3V to 3.6V V
CC
operation.
Data flow from A to Y is controlled by Output Enable (OE).
The device operates in the transparent mode when LE is LOW.
When LE is HIGH, the A data is latched if CLK is held at a high or
low logic level. If LE is HIGH, the A-data is stored in the latch/flip-
flop on the low-to-high transition of CLK. When OE is HIGH, the
outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down,
OE should be tied to V
CC
through a pullup resistor; the minimum
value of the resistor is determined by the current-sinking capability
of the driver.
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2.5V 16-Bit Universal Bus Driver
with 3-State Outputs
Logic Block Diagram
Product Features
PI74AVC+16334 is designed for low-voltage operation,
V
CC
= 1.65V to 3.6V
True 24mA Balanced Drive @ 3.3V
Compatible with Philips and T.I. AVC Logic family
I
OFF
supports partial power-down operation
3.6V I/O Tolerant inputs and outputs
Meets PC133 SDRAM Registered DIMM specifications
All outputs contain a patented DDC
(Dynamic Drive Control) circuit that reduces noise
without degrading propagation delay
Industrial operation: 40C to +85C
Available Packages:
48-pin 240-mil wide plastic TSSOP (A)
48-pin 173-mil wide plastic TVSOP (K)
PI74AVC+16334
TO 15 OTHER CHANNELS
CLK
LE
A1
47
25
48
OE
1
1D
C1
CLK
Y1
2
2
PS8525 12/10/01
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PI74AVC+16334
2.5V 16-Bit Universal Bus Driver
with 3-State Outputs
1
2
3
4
5
6
7
8
9
48
10
47
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
32
31
30
29
28
27
26
25
OE
Y1
Y2
GND
Y3
Y4
V
CC
Y5
Y6
GND
Y7
Y8
Y9
Y10
Y11
Y12
V
CC
Y13
Y14
GND
Y15
Y16
NC
GND
CLK
A1
A2
GND
A3
A4
V
CC
A5
A6
GND
A7
A8
A9
A10
A11
A12
V
CC
A13
A14
GND
A15
A16
LE
GND
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Supply voltage range, V
CC
............................................. 0.5V to +4.6V
Input voltage range, V
I
................................................... 0.5V to +4.6V
Voltage range applied to any output in the
high-impedance or power-off state, V
O
(1)
...................... 0.5V to +4.6V
Voltage range applied to any output in the
high or low state, V
O
(1,2)
......................................... 0.5V to V
CC
+0.5V
Input clamp current, I
IK
(V
I
<0) .................................................... 50mA
Output clamp current, I
OK
(V
O
<0) .............................................. 50mA
Continuous output current, I
O
.................................................... 50mA
Continuous current through each V
CC
or GND ......................... 100mA
Package thermal impedance,
JA
(3)
: package A .........................64C/W
package K .........................48C/W
Storage Temperature range, T
stg
.................................... 65C to 150C
1. Input & output negative-voltage ratings may be
exceeded if the input and output curent rating are
observed.
2. Output positive-voltage rating may be exceeded up to
4.6V maximum if the output current rating is observed.
3. The package thermal impedance is calculated in accor-
dance with JESD 51.
Notes:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
s
t
u
p
n
I
s
t
u
p
t
u
O
Y
E
O
x
E
L
K
L
C
A
H
X
X
X
Z
L
L
X
L
L
L
L
X
H
H
L
H
L
L
L
H
H
H
L
H
H
r
o
L
X
o
Y
)
2
(
Pin Name
Description
OE
Output Enable Input (Active LOW)
LE
Latch Enable (Active LOW)
CLK
Clock Input
A
Data Input
Y
Data Output
GND
Ground
V
CC
Power
Product Pin Description
Truth Table
(1)
Product Pin Configuration
Notes:
1. H = High Signal Level
L = Low Signal Level
= Transition LOW-to-HIGH
X = Dont Care or Irrelevant
Z = High Impedance
2. Output level before the indicated steady-state
input conditions were established.
48-Pin
A, K
3
PS8525 12/10/01
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PI74AVC+16334
2.5V 16-Bit Universal Bus Driver
with 3-State Outputs
Recommended Operating Conditions
(1)
.
n
i
M
.
x
a
M
s
ti
n
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V
C
C
e
g
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1
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.
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-
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V
C
C
V
2
.
1
=
V
C
C
V
C
C
V
6
.
1
o
t
V
4
.
1
=
V
x
5
6
.
0
C
C
V
C
C
V
5
9
.
1
o
t
V
5
6
.
1
=
V
x
5
6
.
0
C
C
V
C
C
V
7
.
2
o
t
V
3
.
2
=
7
.
1
V
C
C
V
6
.
3
o
t
V
3
=
2
V
L
I
e
g
a
tl
o
V
t
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n
I
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v
el
-
w
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L
V
C
C
V
2
.
1
=
D
N
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V
C
C
V
6
.
1
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t
V
4
.
1
=
V
x
5
3
.
0
C
C
V
C
C
V
5
9
.
1
o
t
V
5
6
.
1
=
V
x
5
3
.
0
C
C
V
C
C
V
7
.
2
o
t
V
3
.
2
=
7
.
0
V
C
C
V
6
.
3
o
t
V
3
=
8
.
0
V
I
e
g
a
tl
o
V
t
u
p
n
I
0
6
.
3
V
O
e
g
a
tl
o
V
t
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e
t
a
t
S
e
v
it
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A
0
V
C
C
e
t
a
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S
-
3
0
6
.
3
I
S
H
O
t
n
e
rr
u
c
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t
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o
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e
v
el
-
h
g
i
H
V
C
C
V
6
.
1
o
t
V
4
.
1
=
4
A
m
V
C
C
V
5
9
.
1
o
t
V
5
6
.
1
=
6
V
C
C
V
7
.
2
o
t
V
3
.
2
=
2
1
V
C
C
V
6
.
3
o
t
V
3
=
4
2
I
S
L
O
t
n
e
rr
u
c
t
u
p
t
u
o
l
e
v
el
-
w
o
L
V
C
C
V
6
.
1
o
t
V
4
.
1
=
4
V
C
C
V
5
9
.
1
o
t
V
5
6
.
1
=
6
V
C
C
V
7
.
2
o
t
V
3
.
2
=
2
1
V
C
C
V
6
.
3
o
t
V
3
=
4
2
DtD
e
t
a
r
ll
a
f
r
o
e
si
r
n
o
it
i
s
n
a
rt
t
u
p
n
I
v
V
C
C
V
6
.
3
o
t
V
4
.
1
=
5
V
/
s
n
T
A
e
r
u
t
a
r
e
p
m
e
t
ri
a
-
e
e
rf
g
n
it
a
r
e
p
O
0
4
5
8
C
Notes:
1. All unused inputs must be held at V
CC
or GND to ensure proper device operation.
4
PS8525 12/10/01
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PI74AVC+16334
2.5V 16-Bit Universal Bus Driver
with 3-State Outputs
s
r
e
t
e
m
a
r
a
P
s
n
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it
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C
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)
1
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C
.
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.
p
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T
.
x
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s
ti
n
U
V
H
O
I
H
O
0
0
1
=
A
V
6
.
3
o
t
V
4
.
1
V
C
C
V
2
.
0
V
I
S
H
O
4
=
m
V
A
H
I
V
1
9
.
0
=
V
4
.
1
5
0
.
1
I
S
H
O
6
=
m
V
A
H
I
V
7
0
.
1
=
V
5
6
.
1
2
.
1
I
S
H
O
2
1
=
m
V
A
H
I
V
7
.
1
=
V
3
.
2
5
7
.
1
I
S
H
O
4
2
=
m
V
A
H
I
V
2
=
V
3
0
.
2
V
L
O
I
S
L
O
0
0
1
=
A
V
6
.
3
o
t
V
4
.
1
2
.
0
I
S
L
O
4
= m
V
A
L
I
V
9
4
.
0
=
V
4
.
1
4
.
0
I
S
L
O
6
= m
V
A
L
I
V
7
5
.
0
=
V
5
6
.
1
5
4
.
0
I
S
L
O
2
1
=
m
V
A
L
I
V
7
.
0
=
V
3
.
2
5
5
.
0
I
S
L
O
4
2
=
m
V
A
L
I
V
8
.
0
=
V
3
8
.
0
I
I
V
I
V
=
C
C
D
N
G
r
o
V
6
.
3
5
.
2
A
I
F
F
O
V
I
V
r
o
O
V
6
.
3
=
0
0
1
I
Z
O
V
O
V
=
C
C
D
N
G
r
o
V
6
.
3
0
1
I
C
C
V
I
V
=
C
C
I
D
N
G
r
o
O
0
=
V
6
.
3
0
4
C
I
st
u
p
n
I
l
o
rt
n
o
C
V
I
V
=
C
C
D
N
G
r
o
V
5
.
2
5
.
3
F
p
V
3
.
3
5
.
3
st
u
p
n
I
a
t
a
D
V
5
.
2
6
V
3
.
3
6
C
O
st
u
p
t
u
O
V
O
V
=
C
C
D
N
G
r
o
V
5
.
2
5
.
6
V
3
.
3
5
.
6
Note:
1. Typical values are measured at T
A
= 25C.
DC Electrical Characteristics
(Over Operating Range, T
A
= 40C +85C)
5
PS8525 12/10/01
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PI74AVC+16334
2.5V 16-Bit Universal Bus Driver
with 3-State Outputs
V
C
C
V
2
.
1
=
V
C
C
V
5
.
1
=
V
1
.
0
V
C
C
V
8
.
1
=
V
5
1
.
0
V
C
C
V
5
.
2
=
V
2
.
0
V
C
C
V
3
.
3
=
V
3
.
0
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1
4
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1
3
.
1
Switching Characteristics
(Over recommended operating free-air temperature range, unless otherwise noted, see Figures 1 thru 4)
Operating Characteristics,
T
A
= 25C
s
r
e
t
e
m
a
r
a
P
t
s
e
T
s
n
o
it
i
d
n
o
C
V
C
C
V
8
.
1
=
V
5
1
.
0
V
C
C
V
5
.
2
=
V
2
.
0
V
C
C
V
3
.
3
=
V
3
.
0
s
ti
n
U
l
a
c
i
p
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T
l
a
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p
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l
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C
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C
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it
a
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D
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e
w
o
P
d
el
b
a
n
E
st
u
p
t
u
O
C
L
,
F
p
0
=
z
H
M
0
1
=
f
5
4
8
4
2
5
F
p
d
el
b
a
si
D
st
u
p
t
u
O
3
2
5
2
8
2
Operating Requirements
(Over recommended operating free-air temperature range, unless otherwise noted, see Figures 1 thru 4)
r
e
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a
P
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r
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O
(
V
C
C
V
2
.
1
=
V
C
C
V
5
.
1
=
V
1
.
0
V
C
C
V
8
.
1
=
V
5
1
.
0
V
C
C
V
5
.
2
=
V
2
.
0
V
C
C
V
3
.
3
=
V
3
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5
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