1
PS8650A 05/19/03
Product Description
Pericom Semiconductor's PI74LVTC series of logic circuits are pro
duced using Pericom's advanced CMOS technology, achieving
industry leading speed.
The PI74LVTCH16244 is a non-inverting 16-bit buffer and line
driver designed for low-voltage 2.7V to 3.6V V
CC
operation, with the
capability of interfacing to the 5V system environment. This buffer/
driver is designed specifically to improve both the performance and
density of 3-State memory address drivers, clock drivers, and bus-
oriented receivers and transmitters. The device can be used as four
4-bit buffers, two 8-bit buffers, or one 16-bit buffer.
The PI74LVTCH16244 has "Bus Hold" which retains the data
input's last valid logic state whenever the data input goes to high-
impedance, preventing "floating" inputs and eliminating the need
for pull-up/down resistors.
When Vcc is between 0 to 1.5V during power up or power down,
the device is in the high-impedance state. To ensure the high-
impedance state above 1.5V, OE should be tied to Vcc through a
pullup resistor; the minimum value of the resistor is determined by
the current sinking capability of the driver.
The device fully supports live-insertion with its I
off
and power-up/
down 3-state. The I
off
circuitry disables the outputs when the
power is off, preventing the backflow of damaging current through
the device. Power-up/down 3-state places the outputs in the high-
impedance state during power up or power down, preventing driver
conflict.
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3.3V 16-Bit Buffer/Line Driver
with 3-State Outputs
Logic Block Diagram
Product Features
Advanced low power CMOS design for 2.7V to 3.6V
Vcc operation
Supports 5V input/output tolerance in mixed signal mode
operation
Function compatible with LVT family of products
Balanced 24mA output drive
Typical V
OGB
(Output Ground Bounce) <0.8V at V
CC
=3.3V,
T
A
=25C
I
off
and Power Up/Down 3-State support live insertion
Bus Hold on data inputs eliminates the need for external
pull-up/down resistors
Latch-up performance exceeds 200mA Per JESD78
ESD protection exceeds JESD 22
- 2000V Human-Body Model (A114-B)
- 200V Machine Model (A115-A)
Available Packages (Pb-free available):
- 48-pin 240-mil wide plastic TSSOP (A48)
- 48-pin 300-mil wide plastic SSOP (V48)
Industrial Temperature: -40C to +85C
PI74LVTCH16244
1OE
1A1
1Y1
1A2
1Y2
1A3
1Y3
1A4
1Y4
3OE
3A1
3Y1
3A2
3Y2
3A3
3Y3
3A4
3Y4
2OE
2A1
2Y1
2A2
2Y2
2A3
2Y3
2A4
2Y4
4OE
4A1
4Y1
4A2
4Y2
4A3
4Y3
4A4
4Y4
43
44
46
47
1
37
38
40
41
48
12
11
9
8
6
5
3
2
32
33
35
36
25
17
16
14
13
26
27
29
30
24
23
22
20
19
2
PS8650A 05/19/03
PI74LVTCH16244
3.3V 16-Bit Buffer/Line Driver
with 3-State Outputs
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Maximum Ratings
(Above which the useful life may be impaired.
For user guidelines, not tested.)
Supply voltage range, V
CC
.............................. 0.5V to +6.5V
Input voltage range, V
I
(1)
................................. 0.5V to +6.5V
Voltage range applied to any output in the
high-impedance or power-off state, V
O
(1)
........ 0.5V to +6.5V
Voltage range applied to any output in the
active state, V
O
(1),(2)
................................... 0.5V to V
CC
+0.5V
Input clamp current, I
IK
(V
I
<0) ..................................... 50mA
Output clamp current, I
OK
(V
O
<0) ............................... 50mA
Continous Output Current I
O
....................................... 50mA
Continous Current through each VCC or GND pin .............. 100mA
Package thermal impedance,
JA
(3)
: package A ......... 104C/W
package V ........... 94C/W
Storage Temperature range, T
stg
..................... 65C to 150C
1. Input negative-voltage and output voltage ratings may be ex-
ceeded if the input and output clamp current ratings are observed.
2. This value is limited to 6.5V maximum.
3. The package thermal impedance is calculated in accordance with
JESD 51.
Notes:
Stresses greater than those listed under MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
s
t
u
p
n
I
s
t
u
p
t
u
O
E
O
x
x
A
x
x
Y
x
L
H
H
L
L
L
H
X
Z
Product Pin Description
Truth Table
(4)
Product Pin Configuration
Notes:
4. H = High Signal Level
L = Low Signal Level
X = Don't Care or Irrelevant
Z = High Impedance
1
2
3
4
5
6
7
8
9
48
10
47
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
32
31
30
29
28
27
26
25
1OE
1Y1
1Y2
GND
GND
GND
GND
VCC
VCC
4OE
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
3Y1
3Y2
3Y3
3Y4
4Y1
4Y2
4Y3
4Y4
2OE
1A1
1A2
GND
GND
GND
GND
VCC
VCC
3OE
1A3
1A4
2A1
2A2
2A3
2A4
3A1
3A2
3A3
3A4
4A1
4A2
4A3
4A4
48-Pin
A, V
e
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it
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A
(
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p
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O
e
t
a
t
S
-
3
x
A
x
s
t
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p
n
I
x
Y
x
s
t
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p
t
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O
e
t
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S
-
3
D
N
G
d
n
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o
r
G
V
C
C
r
e
w
o
P
PI74LVTCH16244
3.3V 16-Bit Buffer/Line Driver
with 3-State Outputs
3
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PS8650A 05/19/03
Recommended Operating Conditions
(5)
.
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.
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.
2
6
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3
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C
V
6
.
3
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V
7
.
2
=
0
.
2
V
L
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a
tl
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-
w
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V
C
C
V
6
.
3
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7
.
2
=
8
.
0
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V
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I
0
5
.
5
V
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a
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L
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H
0
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C
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t
a
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-
3
0
5
.
5
I
H
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p
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v
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l
-
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V
C
C
V
7
.
2
=
2
1
V
C
C
V
6
.
3
o
t
V
0
.
3
=
4
2
A
m
I
O
t
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e
r
r
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c
t
u
p
t
u
o
l
e
v
e
l
-
w
o
L
L
V
C
C
V
7
.
2
=
2
1
V
C
C
V
6
.
3
o
t
V
0
.
3
=
4
2
/t
e
t
a
r
ll
a
f
r
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s
i
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n
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it
i
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/
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a
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0
5
1
V
/
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T
A
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a
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f
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it
a
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p
O
0
4
5
8
C
Notes: 5.All unused inputs must be held at V
CC
or GND to ensure proper device operation.
4
PS8650A 05/19/03
PI74LVTCH16244
3.3V 16-Bit Buffer/Line Driver
with 3-State Outputs
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p
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C
V
C
C
V
7
.
2
=
I
I
8
1
=
mA
V
2
.
1
V
V
H
O
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g
a
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V
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C
C
V
6
.
3
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V
7
.
2
=
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H
O
0
0
1
=
A
V
C
C
V
2
.
0
V
C
C
V
7
.
2
=
I
H
O
2
1
=
mA
2
.
2
V
C
C
V
3
=
I
H
O
2
1
=
mA
4
.
2
I
H
O
4
2
=
mA
2
.
2
V
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g
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V
w
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L
t
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p
t
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V
C
C
V
6
.
3
o
t
V
7
.
2
=
I
L
O
0
0
1
=
A
2
.
0
V
C
C
V
7
.
2
=
I
L
O
2
1
=
mA
4
.
0
V
C
C
V
3
=
I
L
O
2
1
=
mA
4
.
0
I
L
O
4
2
=
mA
5
5
.
0
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.
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V
0
=
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.
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V
0
=
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3
=
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5
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5
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=
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7
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2
=
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7
V
C
C
V
6
.
3
=
)
6
(
V
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6
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3
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.
3
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5
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6
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3
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6
.
0
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)
7
(
t
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2
DC Electrical Characteristics
(Over the Operating Range, T
A
= 40C +85C)
Notes: 6. This is the maximum bus-hold dynamic current. It is the minimum overdrive current required to switch the input from one
state to another.
7. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND.
PI74LVTCH16244
3.3V 16-Bit Buffer/Line Driver
with 3-State Outputs
5
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PS8650A 05/19/03
Notes:
8. All typical values are measured at V
CC
= 3.3V, T
A
= 25C
9. C
PD
is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current
consumption (I
CCD
) at no output loading and operating at 50% duty cycle, C
PD
is related to I
CCD
dynamic operating
current
by the expression: I
CCD
= (C
PD
)(V
CC
)(f
IN
)+(I
CC
static)
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3
=
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=
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,
C
C
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H
M
0
1
=
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1
Capacitance
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4
t
Z
L
P
0
.
1
4
.
2
9
.
3
3
.
4
t
)
O
(
K
S
t
u
p
t
u
O
o
t
t
u
p
t
u
O
w
e
k
S
)
1
1
(
5
.
0
Switching Characteristics Over Operating Range
Notes:
10. All typical values are measured at V
CC
= 3.3V, T
A
= 25C
11. Skew between any two outputs, switching in the same direction.
6
PS8650A 05/19/03
PI74LVTCH16244
3.3V 16-Bit Buffer/Line Driver
with 3-State Outputs
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PARAMETER MEASUREMENT INFORMATION
V
CC
= 2.7V and 3.3V 0.3V
Load Circuit
t
s
e
T
1
S
t
H
L
P
t/
L
H
P
t
Z
L
P
t/
L
Z
P
t
Z
H
P
t/
H
Z
P
n
e
p
O
V
6
D
N
G
Notes:
A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input impulses are supplied by generators having the following characteristics: PRR 10 MHz, Z
O
= 50W, t
R
2.5ns, t
F
2.5ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
Voltage Waveforms
Propagation Delay Times
Voltage Waveforms
Enable and Disable Times
Voltage Waveforms
Pulse Duration
Input
t
PLH
t
PHL
0V
Output
V
OH
V
OL
1.5V
1.5V
1.5V
2.7V
1.5V
Input
t
W
1.5V
2.7V
1.5V
0V
tPZL
Output
Control
(Low Level
Enabling)
0V
1.5V
1.5V
1.5V
1.5V
tPLZ
tPHZ
VOL+0.3V
3V
0V
tPZH
Output
Waveform 1
S1 at 6V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOH -0.3V
VOH
VOL
2.7V
500
500
6V
Open
GND
S1
From Output
Under Test
CL = 50pF
(See Note A)
PI74LVTCH16244
3.3V 16-Bit Buffer/Line Driver
with 3-State Outputs
7
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PS8650A 05/19/03
Packaging Mechanical: 48-pin TSSOP (A)
Packaging Mechanical: 48-pin SSOP (V)
.236
.244
.488
.496
.002
.006
SEATING PLANE
.007
.010
.0197
BSC
.004
.008
.319
1
48
12.4
12.6
6.0
6.2
0.50
0.17
0.27
8.1
0.05
0.15
0.09
0.20
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
.018
.030
0.45
0.75
.047
1.20 Max
BSC
0.20
0.51
1.01
0.25
0.381
0.635
.008
.008
.016
0-8
0.20
0.40
.110 2.79
.010
Gauge Plane
.02
.04
.015
.025
x 45
.025 BSC
0.635
.291
.299
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
7.39
7.59
.395
.420
10.03
10.67
.620
.630
15.75
16.00
.008
.0135
0.20
0.34
1
48
Nom.
Max
8
PS8650A 05/19/03
PI74LVTCH16244
3.3V 16-Bit Buffer/Line Driver
with 3-State Outputs
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Notes:
1. Thermal characteristics can be found on the company web site at http://www.pericom.com/packaging/mechanicals.php
2. X = Tape/Reel
Pericom Semiconductor Corporation
2380 Bering Drive San Jose, CA 95131 1-800-435-2336 Fax (408) 435-1100 http://www.pericom.com
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Ordering Information
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