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Электронный компонент: 2N7002

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DATA SHEET
Product specification
File under Discrete Semiconductors, SC13b
April 1995
DISCRETE SEMICONDUCTORS
2N7002
N-channel vertical D-MOS
transistor
April 1995
2
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
2N7002
FEATURES
Direct interface to C-MOS, TTL,
etc.
High-speed switching
No secondary breakdown.
DESCRIPTION
N-channel enhancement mode
vertical D-MOS transistor in a SOT23
envelope. It is designed for use as a
Surface Mounted Device (SMD) in
thin and thick-film circuits, with
applications in relay, high-speed and
line transformer drivers.
PINNING - SOT23
PIN
DESCRIPTION
1
gate
2
source
3
drain
QUICK REFERENCE DATA
PIN CONFIGURATION
SYMBOL
PARAMETER
CONDITIONS
MAX.
UNIT
V
DS
drain-source voltage
60
V
I
D
drain current
DC value
180
mA
R
DS(on)
drain-source on-resistance
I
D
= 500 mA
V
GS
= 10 V
5
V
GS(th)
gate-source threshold
voltage
I
D
= 1 mA
V
GS
= V
DS
3
V
Fig.1 Simplified outline and symbol.
Marking code: 702
ook, halfpage
MSB003
Top view
1
2
3
handbook, 2 columns
s
d
g
MBB076 - 1
April 1995
3
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
2N7002
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
Notes
1. Mounted on a ceramic substrate measuring 10
8
0.7 mm.
2. Mounted on a printed circuit board.
THERMAL RESISTANCE
Notes
1. Mounted on a ceramic substrate measuring 10
8
0.7 mm.
2. Mounted on a printed circuit board.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DS
drain-source voltage
-
60
V
V
GSO
gate-source voltage
open drain
-
40
V
I
D
drain current
DC value
-
180
mA
I
DM
drain current
peak value
-
800
mA
P
tot
total power dissipation
T
amb
= 25
C
(note 1)
(note 2)
-
-
300
250
mW
mW
T
stg
storage temperature range
-
65
150
C
T
j
junction temperature
-
150
C
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
R
th j-a
from junction to ambient
note 1
note 2
430
500
K/W
K/W
April 1995
4
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
2N7002
CHARACTERISTICS
T
j
= 25
C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
V
(BR)DSS
drain-source breakdown voltage
I
D
= 10
A
V
GS
= 0
60
90
-
V
I
DSS
drain-source leakage current
V
DS
= 48 V
V
GS
= 0
-
-
1
A
I
GSS
gate-source leakage current
V
DS
= 0
V
GS
= 15 V
-
-
10
nA
V
GS(th)
gate-source threshold voltage
I
D
= 1 mA
V
GS
= V
DS
0.8
-
3
V
R
DS(on)
drain-source on-resistance
I
D
= 500 mA
V
GS
= 10 V
-
3.5
5
I
D
= 75 mA
V
GS
= 4.5 V
-
-
5.3
Y
fs
transfer admittance
I
D
= 200 mA
V
DS
= 10 V
100
200
-
mS
C
iss
input capacitance
V
DS
= 10 V
V
GS
= 0
f = 1 MHz
-
25
40
pF
C
oss
output capacitance
V
DS
= 10 V
V
GS
= 0
f = 1 MHz
-
22
30
pF
C
rss
feedback capacitance
V
DS
= 10 V
V
GS
= 0
f = 1 MHz
-
6
10
pF
Switching times (see Figs 2 and 3)
t
on
turn-on time
I
D
= 200 mA
V
DD
= 50 V
V
GS
= 0 to 10 V
-
-
10
ns
t
off
turn-off time
I
D
= 200 mA
V
DD
= 50 V
V
GS
= 0 to 10 V
-
-
15
ns
April 1995
5
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
2N7002
Fig.2 Switching time test circuit.
handbook, halfpage
MSA631
50
VDD = 50 V
ID
10 V
0 V
Fig.3 Input and output waveforms.
handbook, halfpage
MBB692
10 %
90 %
90 %
10 %
ton
toff
OUTPUT
INPUT
Fig.4 Power derating curve.
(1) On ceramic substrate.
(2) On printed circuit board.
handbook, halfpage
0
300
200
100
0
50
100
200
150
MLA223
Ptot
(mW)
Tamb (
C)
(1)
(2)
Fig.5 Typical output characteristics; T
j
= 25
C.
handbook, halfpage
0
4
8
VDS (V)
ID
(A)
16
1.6
1.2
0.4
0
0.8
12
MDA697
VGS = 10 V
6 V
5 V
4 V
3 V