DATA SHEET
Product specification
File under Integrated Circuits, IC06
1999 May 18
INTEGRATED CIRCUITS
74AHC1G79; 74AHCT1G79
Single D-type flip-flop;
positive-edge trigger
1999 May 18
2
Philips Semiconductors
Product specification
Single D-type flip-flop; positive-edge trigger
74AHC1G79;
74AHCT1G79
FEATURES
Symmetrical output impedance
High noise immunity
ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000 V;
MM EIA/JESD22-A115-A
exceeds 200 V
Low power dissipation
Balanced propagation delays
Very small 5 pin package
Output capability: standard.
DESCRIPTION
The 74AHC1G/AHCT1G79 is a
high-speed Si-gate CMOS device.
The 74AHC1G/AHCT1G79 provides
a single positive-edge triggered
D-type flip-flop.
Information on the data input is
transferred to the Q output on the
LOW-to-HIGH transition of the clock
pulse. The D input must be stable one
set-up time prior to the LOW-to-HIGH
clock transition for predictable
operation.
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level;
= LOW-to-HIGH CP transition;
X = don't care;
Q + 1 = state after the next
LOW-to-HIGH CP transition.
INPUTS
OUTPUT
CP
D
Q + 1
L
L
H
H
L
X
Q
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
3.0 ns.
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W).
P
D
= C
PD
V
CC
2
f
i
+ (C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V.
2. The condition is V
I
= GND to V
CC
.
PINNING
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
AHC1G
AHCT1G
t
PHL
/t
PLH
propagation delay
CP to Q
C
L
= 15 pF;
V
CC
= 5 V
3.5
3.5
ns
C
I
input capacitance
1.5
1.5
pF
C
PD
power dissipation
capacitance
notes 1 and 2;
C
L
= 50 pF;
f = 1 Mhz
15
16
pF
PIN
SYMBOL
DESCRIPTION
1
D
data input
2
CP
clock pulse input
3
GND
ground (0 V)
4
Q
data output
5
V
CC
DC supply voltage
1999 May 18
4
Philips Semiconductors
Product specification
Single D-type flip-flop; positive-edge trigger
74AHC1G79;
74AHCT1G79
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V).
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 55
C the value of P
D
derates linearly with 2.5 mW/K.
SYMBOL
PARAMETER
CONDITIONS
74AHC1G
74AHCT1G
UNIT
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
V
CC
DC supply voltage
2.0
5.0
5.5
4.5
5.0
5.5
V
V
I
input voltage
0
-
5.5
0
-
5.5
V
V
O
output voltage
0
-
V
CC
0
-
V
CC
V
T
amb
operating ambient
temperature range
see DC and AC
characteristics per
device
-
40
+25
+85
-
40
+25
+85
C
t
r
, t
f
(
t/
f)
input rise and fall times
except for
Schmitt-trigger inputs
V
CC
= 3.3 V
0.3 V
-
-
100
-
-
-
ns/V
V
CC
= 5 V
0.5 V
-
-
20
-
-
20
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
CC
DC supply voltage
-
0.5
+7.0
V
V
I
input voltage range
-
0.5
+7.0
V
I
IK
DC input diode current
V
I
<
-
0.5
-
-
20
mA
I
OK
DC output diode current
V
O
<
-
0.5 or V
O
> V
CC
+ 0.5 V; note 1
-
20
mA
I
O
DC output source or sink current
-
0.5 V < V
O
< V
CC
+ 0.5 V
-
25
mA
I
CC
DC V
CC
or GND current
-
75
mA
T
stg
storage temperature
-
65
+150
C
P
D
power dissipation per package
temperature range:
-
40 to +85
C;
note 2
-
200
mW
1999 May 18
5
Philips Semiconductors
Product specification
Single D-type flip-flop; positive-edge trigger
74AHC1G79;
74AHCT1G79
DC CHARACTERISTICS
Family 74AHC1G
Over recommended operating conditions; voltage are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
(
C)
UNIT
OTHER
V
CC
(V)
25
-
40 to +85
MIN.
TYP.
MAX.
MIN.
MAX.
V
IH
HIGH-level input
voltage
2.0
1.5
-
-
1.5
-
V
3.0
2.1
-
-
2.1
-
5.5
3.85
-
-
3.85
-
V
IL
LOW-level input voltage
2.0
-
-
0.5
-
0.5
V
3.0
-
-
0.9
-
0.9
5.5
-
-
1.65
-
1.65
V
OH
HIGH-level output
voltage; all outputs
V
I
= V
IH
or V
IL
;
I
O
=
-
50
A
2.0
1.9
2.0
-
1.9
-
V
3.0
2.9
3.0
-
2.9
-
4.5
4.4
4.5
-
4.4
-
HIGH-level output
voltage
V
I
= V
IH
or V
IL
;
I
O
=
-
4.0 mA
3.0
2.58
-
-
2.48
-
V
V
I
= V
IH
or V
IL
;
I
O
=
-
8.0 mA
4.5
3.94
-
-
3.8
-
V
OL
LOW-level output
voltage; all outputs
V
I
= V
IH
or V
IL
;
I
O
= 50
A
2.0
-
0
0.1
-
0.1
V
3.0
-
0
0.1
-
0.1
4.5
-
0
0.1
-
0.1
LOW-level output
voltage
V
I
= V
IH
or V
IL
;
I
O
= 4 mA
3.0
-
-
0.36
-
0.44
V
V
I
= V
IH
or V
IL
;
I
O
= 8 mA
4.5
-
-
0.36
-
0.44
I
I
input leakage current
V
I
= V
CC
or GND
5.5
-
-
0.1
-
1.0
A
I
CC
quiescent supply
current
V
I
= V
CC
or GND;
I
O
= 0
5.5
-
-
1.0
-
10
A
C
I
input capacitance
-
1.5
10
-
10
pF
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