DATA SHEET
Product specification
Supersedes data of 1999 Feb 25
File under Integrated Circuits, IC06
1999 Sep 27
INTEGRATED CIRCUITS
74AHC04; 74AHCT04
Hex inverter
1999 Sep 27
2
Philips Semiconductors
Product specification
Hex inverter
74AHC04; 74AHCT04
FEATURES
ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000 V
MM EIA/JESD22-A115-A
exceeds 200 V
Balanced propagation delays
Inputs accepts voltages higher than
V
CC
For AHC only:
operates with CMOS input levels
For AHCT only:
operates with TTL input levels
Specified from
-
40 to +85 and +125
C.
DESCRIPTION
The 74AHC/AHCT04 are high-speed
Si-gate CMOS devices and are pin
compatible with low power Schottky
TTL (LSTTL). They are specified in
compliance with JEDEC standard
No. 7A.
The 74AHC/AHCT04 provide six
inverting buffers.
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level.
INPUT nA
OUTPUT nY
L
H
H
L
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
3.0 ns.
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W).
P
D
= C
PD
V
CC
2
f
i
+
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
(C
L
V
CC
2
f
o
) = sum of outputs;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts.
2. The condition is V
I
= GND to V
CC
.
PINNING
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
AHC
AHCT
t
PHL
/t
PLH
propagation
delay nA to nY
C
L
= 15 pF;
V
CC
= 5 V
3.0
3.0
ns
C
I
input
capacitance
V
I
= V
CC
or GND
4.0
4.0
pF
C
PD
power dissipation
capacitance
C
L
= 50 pF;
f = 1 MHz;
notes 1 and 2
13.5
13.9
pF
PIN
SYMBOL
DESCRIPTION
1, 3, 5, 9, 11 and 13
1A to 6A
data inputs
2, 4, 6, 8, 10 and 12
1Y to 6Y
data outputs
7
GND
ground (0 V)
14
V
CC
DC supply voltage
1999 Sep 27
3
Philips Semiconductors
Product specification
Hex inverter
74AHC04; 74AHCT04
ORDERING INFORMATION
OUTSIDE NORTH
AMERICA
NORTH AMERICA
PACKAGES
PINS
PACKAGE
MATERIAL
CODE
74AHC04D
74AHC04D
14
SO
plastic
SOT108-1
74AHC04PW
74AHC04PW DH
14
TSSOP
plastic
SOT402-1
74AHCT04D
74AHCT04D
14
SO
plastic
SOT108-1
74AHCT04PW
74AHCT04PW DH
14
TSSOP
plastic
SOT402-1
Fig.1 Pin configuration.
handbook, halfpage
MNA340
04
1
2
3
4
5
6
7
8
14
13
12
11
10
9
1A
1Y
2A
2Y
3A
3Y
GND
4Y
4A
5Y
5A
6Y
6A
VCC
Fig.2 Logic diagram (one gate).
handbook, halfpage
MNA341
A
Y
Fig.3 Functional diagram.
handbook, halfpage
MNA342
1A
1Y
1
2
2A
2Y
3
4
3A
3Y
5
6
4A
4Y
9
8
5A
5Y
11
10
6A
6Y
13
12
Fig.4 IEC logic symbol.
handbook, halfpage
1
1
2
MNA343
3
1
4
5
1
6
9
1
8
11
1
10
13
1
12
1999 Sep 27
4
Philips Semiconductors
Product specification
Hex inverter
74AHC04; 74AHCT04
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V).
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. For SO packages: above 70
C the value of P
D
derates linearly with 8 mW/K.
For TSSOP packages: above 60
C the value of P
D
derates linearly with 5.5 mW/K.
SYMBOL
PARAMETER
CONDITIONS
74AHC
74AHCT
UNIT
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
V
CC
DC supply voltage
2.0
5.0
5.5
4.5
5.0
5.5
V
V
I
input voltage
0
-
5.5
0
-
5.5
V
V
O
output voltage
0
-
V
CC
0
-
V
CC
V
T
amb
operating ambient temperature
range
see DC and AC
characteristics per
device
-
40
+25
+85
-
40
+25
+85
C
-
40
+25
+125
-
40
+25
+125
C
t
r
,t
f
(
t/
f) input rise and fall times except
for Schmitt-trigger inputs
V
CC
= 3.3 V
0.3 V
-
-
100
-
-
-
ns/V
V
CC
= 5 V
0.5 V
-
-
20
-
-
20
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX. UNIT
V
CC
DC supply voltage
-
0.5
+7.0
V
V
I
input voltage range
-
0.5
+7.0
V
I
IK
DC input diode current
V
I
<
-
0.5 V; note 1
-
-
20
mA
I
OK
DC output diode current
V
O
<
-
0.5 V or V
O
> V
CC
+ 0.5 V; note 1
-
20
mA
I
O
DC output source or sink current
-
0.5 V < V
O
< V
CC
+ 0.5 V
-
25
mA
I
CC
DC V
CC
or GND current
-
75
mA
T
stg
storage temperature range
-
65
+150
C
P
D
power dissipation per package
for temperature range:
-
40 to +125
C; note 2
-
500
mW
1999 Sep 27
5
Philips Semiconductors
Product specification
Hex inverter
74AHC04; 74AHCT04
DC CHARACTERISTICS
74AHC family
Over recommended operating conditions; voltage are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
(
C)
UNIT
OTHER
V
CC
(V)
25
-
40 to +85
-
40 to +125
MIN.
TYP.
MAX. MIN. MAX. MIN. MAX.
V
IH
HIGH-level input
voltage
2.0
1.5
-
-
1.5
-
1.5
-
V
3.0
2.1
-
-
2.1
-
2.1
-
5.5
3.85
-
-
3.85
-
3.85
-
V
IL
LOW-level input
voltage
2.0
-
-
0.5
-
0.5
-
0.5
V
3.0
-
-
0.9
-
0.9
-
0.9
5.5
-
-
1.65
-
1.65
-
1.65
V
OH
HIGH-level output
voltage; all
outputs
V
I
= V
IH
or V
IL
;
I
O
=
-
50
A
2.0
1.9
2.0
-
1.9
-
1.9
-
V
3.0
2.9
3.0
-
2.9
-
2.9
-
4.5
4.4
4.5
-
4.4
-
4.4
-
HIGH-level output
voltage
V
I
= V
IH
or V
IL
;
I
O
=
-
4.0 mA
3.0
2.58
-
-
2.48
-
2.40
-
V
V
I
= V
IH
or V
IL
;
I
O
=
-
8.0 mA
4.5
3.94
-
-
3.8
-
3.70
-
V
OL
LOW-level output
voltage; all
outputs
V
I
= V
IH
or V
IL
;
I
O
= 50
A
2.0
-
0
0.1
-
0.1
-
0.1
V
3.0
-
0
0.1
-
0.1
-
0.1
4.5
-
0
0.1
-
0.1
-
0.1
LOW-level output
voltage
V
I
= V
IH
or V
IL
;
I
O
= 4 mA
3.0
-
-
0.36
-
0.44
-
0.55
V
V
I
= V
IH
or V
IL
;
I
O
= 8 mA
4.5
-
-
0.36
-
0.44
-
0.55
I
I
input leakage
current
V
I
= V
CC
or GND
5.5
-
-
0.1
-
1.0
-
2.0
A
I
OZ
3-state output
OFF current
V
I
= V
IH
or V
IL
;
V
O
= V
CC
or GND
5.5
-
-
0.25
-
2.5
-
10.0
A
I
CC
quiescent supply
current
V
I
= V
CC
or GND;
I
O
= 0
5.5
-
-
4.0
-
40
-
80
A
C
I
input capacitance
-
-
3
10
-
10
-
10
pF
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