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Электронный компонент: 74AHCT1G00GW

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DATA SHEET
Product specification
Supersedes data of 2002 Feb 27
2002 May 27
INTEGRATED CIRCUITS
74AHC1G00; 74AHCT1G00
2-input NAND gate
2002 May 27
2
Philips Semiconductors
Product specification
2-input NAND gate
74AHC1G00; 74AHCT1G00
FEATURES
Symmetrical output impedance
High noise immunity
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101 exceeds 1000 V.
Low power dissipation
Balanced propagation delays
Very small 5-pin package
Output capability: standard
Specified from
-
40 to +125
C.
DESCRIPTION
The 74AHC1G/AHCT1G00 is a high-speed Si-gate CMOS
device.
The 74AHC1G/AHCT1G00 provides the 2-input NAND
function.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
3.0 ns.
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W).
P
D
= C
PD
V
CC
2
f
i
+ (C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF
V
CC
= supply voltage in Volts.
2. The condition is V
I
= GND to V
CC
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
AHC1G
AHCT1G
t
PHL
/t
PLH
propagation delay A and B to Y
C
L
= 15 pF; V
CC
= 5 V
3.5
3.6
ns
C
I
input capacitance
1.5
1.5
pF
C
PD
power dissipation capacitance
C
L
= 50 pF; f = 1 MHz;
notes 1 and 2
17
18
pF
2002 May 27
3
Philips Semiconductors
Product specification
2-input NAND gate
74AHC1G00; 74AHCT1G00
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level.
ORDERING INFORMATION
PINNING
INPUTS
OUTPUT
A
B
Y
L
L
H
L
H
H
H
L
H
H
H
L
TYPE NUMBER
PACKAGES
TEMPERATURE
RANGE
PINS
PACKAGE
MATERIAL
CODE
MARKING
74AHC1G00GW
-
40 to +125
C
5
SC-88A
plastic
SOT353
AA
74AHCT1G00GW
-
40 to +125
C
5
SC-88A
plastic
SOT353
CA
74AHC1G00GV
-
40 to +125
C
5
SC-74A
plastic
SOT753
A00
74AHCT1G00GV
-
40 to +125
C
5
SC-74A
plastic
SOT753
C00
PIN
SYMBOL
DESCRIPTION
1
B
data input B
2
A
data input A
3
GND
ground (0 V)
4
Y
data output Y
5
V
CC
supply voltage
2002 May 27
4
Philips Semiconductors
Product specification
2-input NAND gate
74AHC1G00; 74AHCT1G00
Fig.1 Pin configuration.
handbook, halfpage
1
2
3
5
4
MNA096
00
VCC
A
Y
GND
B
Fig.2 Logic symbol.
handbook, halfpage
MNA097
B
A
Y
2
1
4
Fig.3 IEC logic symbol.
handbook, halfpage
MNA098
2
4
&
1
Fig.4 Logic diagram.
handbook, halfpage
MNA099
B
A
Y
2002 May 27
5
Philips Semiconductors
Product specification
2-input NAND gate
74AHC1G00; 74AHCT1G00
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Note
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
SYMBOL
PARAMETER
CONDITIONS
74AHC1G
74AHCT1G
UNIT
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
V
CC
supply voltage
2.0
5.0
5.5
4.5
5.0
5.5
V
V
I
input voltage
0
-
5.5
0
-
5.5
V
V
O
output voltage
0
-
V
CC
0
-
V
CC
V
T
amb
operating ambient
temperature
see DC and AC
characteristics per device
-
40
+25
+125
-
40
+25
+125
C
t
r
, t
f
(
t/
f)
input rise and fall
times
V
CC
= 3.3
0.3 V
-
-
100
-
-
-
ns/V
V
CC
= 5
0.5 V
-
-
20
-
-
20
ns/V
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
CC
supply voltage
-
0.5
+7.0
V
V
I
input voltage
-
0.5
+7.0
V
I
IK
input diode current
V
I
<
-
0.5 V
-
-
20
mA
I
OK
output diode current
V
O
<
-
0.5 V or V
O
> V
CC
+ 0.5 V; note 1
-
20
mA
I
O
output source or sink current
-
0.5 V < V
O
< V
CC
+ 0.5 V
-
25
mA
I
CC
V
CC
or GND current
-
75
mA
T
stg
storage temperature
-
65
+150
C
P
D
power dissipation per package
for temperature range from
-
40 to +125
C
-
250
mW