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Электронный компонент: 74AHCT2G00DC

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DATA SHEET
Product specification
2004 Jan 21
INTEGRATED CIRCUITS
74AHC2G00; 74AHCT2G00
2-input NAND gate
2004 Jan 21
2
Philips Semiconductors
Product specification
2-input NAND gate
74AHC2G00; 74AHCT2G00
FEATURES
Symmetrical output impedance
High noise immunity
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101 exceeds 500 V.
Low power dissipation
Balanced propagation delays
SOT505-2 and SOT765-1 package
Specified from
-
40 to +85
C and
-
40 to +125
C.
DESCRIPTION
The 74AHC2G/AHCT2G00 is a high-speed Si-gate CMOS
device.
The 74AHC2G/AHCT2G00 provides the 2-input NAND
gate function.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
3.0 ns.
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W).
P
D
= C
PD
V
CC
2
f
i
N +
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
(C
L
V
CC
2
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
AHC2G
AHCT2G
t
PHL
/t
PLH
propagation delay nA and nB to nY
C
L
= 15 pF; V
CC
= 5 V
3.5
3.6
ns
C
I
input capacitance
1.5
1.5
pF
C
PD
power dissipation capacitance per
gate
C
L
= 50 pF; f = 1 MHz;
notes 1 and 2
17
18
pF
2004 Jan 21
3
Philips Semiconductors
Product specification
2-input NAND gate
74AHC2G00; 74AHCT2G00
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level.
ORDERING INFORMATION
PINNING
INPUT
OUTPUT
nA
nB
nY
L
L
H
L
H
H
H
L
H
H
H
L
TYPE NUMBER
PACKAGE
TEMPERATURE
RANGE
PINS
PACKAGE MATERIAL
CODE
MARKING
74AHC2G00DP
-
40 to +125
C
8
TSSOP8
plastic
SOT505-2
A00
74AHCT2G00DP
-
40 to +125
C
8
TSSOP8
plastic
SOT505-2
C00
74AHC2G00DC
-
40 to +125
C
8
VSSOP8
plastic
SOT765-1
A00
74AHCT2G00DC
-
40 to +125
C
8
VSSOP8
plastic
SOT765-1
C00
PIN
SYMBOL
DESCRIPTION
1
1A
data input
2
1B
data input
3
2Y
data output
4
GND
ground (0 V)
5
2A
data input
6
2B
data input
7
1Y
data output
8
V
CC
supply voltage
2004 Jan 21
4
Philips Semiconductors
Product specification
2-input NAND gate
74AHC2G00; 74AHCT2G00
handbook, halfpage
1
2
3
4
8
7
6
5
MNA711
00
VCC
1Y
1B
2B
2A
GND
2Y
1A
Fig.1 Pin configuration.
handbook, halfpage
MNA712
1A
1B
1Y
2
1
7
2A
2B
2Y
6
5
3
Fig.2 Logic symbol.
handbook, halfpage
MNA713
7
&
&
2
1
3
6
5
Fig.3 IEC logic symbol.
handbook, halfpage
MNA099
B
A
Y
Fig.4 Logic diagram.
2004 Jan 21
5
Philips Semiconductors
Product specification
2-input NAND gate
74AHC2G00; 74AHCT2G00
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Note
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
SYMBOL
PARAMETER
CONDITIONS
74AHC2G00
74AHCT2G00
UNIT
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
V
CC
supply voltage
2.0
5.0
5.5
4.5
5.0
5.5
V
V
I
input voltage
0
-
5.5
0
-
5.5
V
V
O
output voltage
0
-
V
CC
0
-
V
CC
V
T
amb
operating ambient
temperature
see DC and AC
characteristics per device
-
40
+25
+125
-
40
+25
+125
C
t
r
, t
f
input rise and fall
times
V
CC
= 3.3
0.3 V
-
-
100
-
-
-
ns/V
V
CC
= 5
0.5 V
-
-
20
-
-
20
ns/V
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
CC
supply voltage
-
0.5
+7.0
V
V
I
input voltage
-
0.5
+7.0
V
I
IK
input diode current
V
I
<
-
0.5 V
-
-
20
mA
I
OK
output diode current
V
O
<
-
0.5 V or V
O
> V
CC
+ 0.5 V; note 1
-
20
mA
I
O
output source or sink current
-
0.5 V < V
O
< V
CC
+ 0.5 V
-
25
mA
I
CC
, I
GND
V
CC
or GND current
-
75
mA
T
stg
storage temperature
-
65
+150
C
P
D
power dissipation
T
amb
=
-
40 to +125
C
-
250
mW