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Электронный компонент: 74AHCT2G125DC

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DATA SHEET
Product specification
2004 Jan 13
INTEGRATED CIRCUITS
74AHC2G125; 74AHCT2G125
Bus buffer/line driver; 3-state
2004 Jan 13
2
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74AHC2G125; 74AHCT2G125
FEATURES
Symmetrical output impedance
High noise immunity
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101 exceeds 1000 V.
Low power dissipation
Balanced propagation delays
SOT505-2 and SOT765-1 package
Specified from
-
40 to +85
C and
-
40 to +125
C.
DESCRIPTION
The 74AHC2G/AHCT2G125 is a high-speed Si-gate
CMOS device.
The 74AHC2G/AHCT2G125 provides a dual non-inverting
buffer/line driver with 3-state output. The 3-state output is
controlled by the output enable input (nOE). A HIGH at
pin nOE causes the output to assume a high-impedance
OFF-state.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
3.0 ns.
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W).
P
D
= C
PD
V
CC
2
f
i
N +
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
(C
L
V
CC
2
f
o
) = sum of outputs.
2. The condition is V
I
= GND to V
CC
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
AHC2G
AHCT2G
t
PHL
/t
PLH
propagation delay nA to nY
C
L
= 15 pF; V
CC
= 5 V
3.4
3.4
ns
C
I
input capacitance
1.5
1.5
pF
C
PD
power dissipation capacitance
C
L
= 50 pF; f = 1 MHz; notes 1 and 2
9
11
pF
2004 Jan 13
3
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74AHC2G125; 74AHCT2G125
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don't care;
Z = high-impedance OFF-state.
ORDERING INFORMATION
PINNING
INPUT
OUTPUT
nOE
nA
nY
L
L
L
L
H
H
H
X
Z
TYPE NUMBER
PACKAGE
TEMPERATURE
RANGE
PINS
PACKAGE
MATERIAL
CODE
MARKING
74AHC2G125DP
-
40 to +125
C
8
TSSOP8
plastic
SOT505-2
A25
74AHCT2G125DP
-
40 to +125
C
8
TSSOP8
plastic
SOT505-2
C25
74AHC2G125DC
-
40 to +125
C
8
VSSOP8
plastic
SOT765-1
A25
74AHCT2G125DC
-
40 to +125
C
8
VSSOP8
plastic
SOT765-1
C25
PIN
SYMBOL
DESCRIPTION
1
1OE
output enable input (active LOW)
2
1A
data input
3
2Y
data output
4
GND
ground (0 V)
5
2A
data input
6
1Y
data output
7
2OE
output enable input (active LOW)
8
V
CC
supply voltage
2004 Jan 13
4
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74AHC2G125; 74AHCT2G125
handbook, halfpage
1
2
3
4
8
7
6
5
MCE184
125
VCC
2OE
1A
1Y
2A
GND
2Y
1OE
Fig.1 Pin configuration.
handbook, halfpage
MCE185
1A
1Y
2
1
6
1OE
2A
2Y
5
7
3
2OE
Fig.2 Logic symbol.
handbook, halfpage
MCE186
1
6
2
1OE
7
3
5
2OE
Fig.3 IEC logic symbol.
Fig.3 IEC logic symbol.
handbook, halfpage
MCE187
nA
nY
nOE
Fig.4 Logic diagram.
2004 Jan 13
5
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74AHC2G125; 74AHCT2G125
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Note
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
SYMBOL
PARAMETER
CONDITIONS
74AHC2G125
74AHCT2G125
UNIT
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
V
CC
supply voltage
2.0
5.0
5.5
4.5
5.0
5.5
V
V
I
input voltage
0
-
5.5
0
-
5.5
V
V
O
output voltage
0
-
V
CC
0
-
V
CC
V
T
amb
operating ambient
temperature
see DC and AC
characteristics per device
-
40
+25
+125
-
40
+25
+125
C
t
r
, t
f
input rise and fall times
V
CC
= 3.3
0.3 V
-
-
100
-
-
-
ns/V
V
CC
= 5
0.5 V
-
-
20
-
-
20
ns/V
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX. UNIT
V
CC
supply voltage
-
0.5
+7.0
V
V
I
input voltage
-
0.5
+7.0
V
I
IK
input diode current
V
I
<
-
0.5 V
-
-
20
mA
I
OK
output diode current
V
O
<
-
0.5 V or V
O
> V
CC
+ 0.5 V; note 1
-
20
mA
I
O
output source or sink current
-
0.5 V < V
O
< V
CC
+ 0.5 V
-
25
mA
I
CC
, I
GND
V
CC
or GND current
-
75
mA
T
stg
storage temperature
-
65
+150
C
P
tot
power dissipation
T
amb
=
-
40 to +125
C
-
250
mW