Document Outline
- FEATURES
- GENERAL DESCRIPTION
- QUICK REFERENCE DATA
- ORDERING INFORMATION
- PIN DESCRIPTION
- FUNCTION TABLE
- DC CHARACTERISTICS
- AC CHARACTERISTICS
- AC WAVEFORMS
- PACKAGE OUTLINES
- SOT38-1
- SOT109-1
- SOT338-1
- SOT403-1
- SOLDERING
- DEFINITIONS
DATA SHEET
Product specification
Supersedes data of September 1993
File under Integrated Circuits, IC06
1998 Sep 30
INTEGRATED CIRCUITS
74HC/HCT257
Quad 2-input multiplexer; 3-state
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
1998 Sep 30
2
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
FEATURES
Non-inverting data path
3-state outputs interface directly with system bus
Output capability: bus driver
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT257 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT257 have four identical 2-input multiplexers
with 3-state outputs, which select 4 bits of data from two
sources and are controlled by a common data select
input (S).
The data inputs from source 0 (1I
0
to 4I
0
) are selected
when input S is LOW and the data inputs from source 1
(1I
1
to 4I
1
) are selected when S is HIGH. Data appears at
the outputs (1Y to 4Y) in true (non-inverting) form from the
selected inputs.
The "257" is the logic implementation of a 4-pole,
2-position switch, where the position of the switch is
determined by the logic levels applied to S. The outputs
are forced to a high impedance OFF-state when OE is
HIGH.
The logic equations for the outputs are:
1Y = OE.(1I
1
.S
+
1I
0
.S)
2Y = OE.(2I
1
.S
+
2I
0
.S)
3Y = OE.(3I
1
.S
+
3I
0
.S)
4Y = OE.(4I
1
.S
+
4I
0
.S)
The "257" is identical to the "258" but has non-inverting
(true) outputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W):
P
D
= C
PD
V
CC
2
f
i
+
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
(C
L
V
CC
2
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
-
1.5 V
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PHL
/ t
PLH
propagation delay
C
L
= 15 pF; V
CC
= 5 V
nI
0
, nI
1
to nY
11
13
ns
S to nY
14
17
ns
C
I
input capacitance
3.5
3.5
pF
C
PD
power dissipation capacitance per multiplexer
notes 1 and 2
45
45
pF
1998 Sep 30
3
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
ORDERING INFORMATION
PIN DESCRIPTION
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
74HC257N;
74HCT257N
DIP16
plastic dual in-line package; 16 leads (300 mil); long body
SOT38-1
74HC257D;
74HCT257D
SO16
plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
74HC257DB;
74HCT257DB
SSOP16
plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
74HC257PW;
74HCT257PW
TSSOP16
plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
PIN NO.
SYMBOL
NAME AND FUNCTION
1
S
common data select input
2, 5, 11, 14
1I
0
to 4I
0
data inputs from source 0
3, 6, 10, 13
1I
1
to 4I
1
data inputs from source 1
4, 7, 9, 12
1Y to 4Y
3-state multiplexer outputs
8
GND
ground (0 V)
15
OE
3-state output enable input (active LOW)
16
V
CC
positive supply voltage
Fig.1 Pin configuration.
fpage
GND
VCC
MLB311
S
OE
1Y
2Y
4Y
3Y
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
257
1I0
1I1
2I0
2I1
4I0
4I1
3I0
3I1
Fig.2 Logic symbol.
fpage
MGA835
S
OE
1Y
2Y
3Y
4Y
2
3
5
6
11
10
14
13
15
1
4
7
9
12
1I0
1I1
2I0
2I1
3I0
3I1
4I0
4I1
Fig.3 IEC logic symbol.
1998 Sep 30
4
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
Fig.4 Functional diagram.
MGR280
S
1
1I0
2
1Y
4
1I1
3
SELECTOR
3-STATE MULTIPLEXER OUTPUTS
2I0
5
2Y
7
2I1
6
3I0
11
3Y
12
3I1
10
4I0
14
4Y
9
4I1
13
OE
15
FUNCTION TABLE
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don't care
Z = high impedance OFF-state
INPUTS
OUTPUT
OE
S
nI
0
nI
1
nY
H
X
X
X
Z
L
H
X
L
L
L
H
X
H
H
L
L
L
X
L
L
L
H
X
H
Fig.5 Logic diagram.
1998 Sep 30
5
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
"74HC/HCT/HCU/HCMOS Logic Family Specifications"
.
Output capability: bus driver
I
CC
category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
SYMBOL
PARAMETER
T
amb
(
C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS
+
25
-
40 to
+
85
-
40 to
+
125
min.
typ. max. min. max.
min.
max.
t
PHL
/ t
PLH
propagation delay
nI
0
to nY;
nI
1
to nY
36
110
140
165
ns
2.0
Fig.6
13
22
28
33
4.5
10
19
24
28
6.0
t
PHL
/ t
PLH
propagation delay
S to nY
47
150
190
225
ns
2.0
Fig.6
17
30
38
45
4.5
14
26
33
38
6.0
t
PZH
/ t
PZL
3-state output enable time
OE to nY
33
150
190
225
ns
2.0
Fig.7
12
30
38
45
4.5
10
26
33
38
6.0
t
PHZ
/ t
PLZ
3-state output disable time
OE to nY
41
150
190
225
ns
2.0
Fig.7
15
30
38
45
4.5
12
26
33
38
6.0
t
THL
/ t
TLH
output transition time
14
60
75
90
ns
2.0
Fig.6
5
12
15
18
4.5
4
10
13
15
6.0
1998 Sep 30
6
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
"74HC/HCT/HCU/HCMOS Logic Family Specifications"
.
Output capability: bus driver
I
CC
category: MSI
Note to HCT types
The value of additional quiescent supply current (
I
CC
) for a unit load of 1 is given in the family specifications.
To determine
I
CC
per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
INPUT
UNIT LOAD COEFFICIENT
nI
0
0.40
nI
1
0.40
OE
1.35
S
0.70
SYMBOL
PARAMETER
T
amb
(
C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
WAVEFORMS
+
25
-
40 to
+
85
-
40 to
+
125
min.
typ.
max.
min.
max.
min.
max.
t
PHL
/ t
PLH
propagation delay
16
30
38
45
ns
4.5
Fig.6
nI
0
to nY
nI
1
to nY
t
PHL
/ t
PLH
propagation delay
S to nY
20
35
44
53
ns
4.5
Fig.6
t
PZH
/ t
PZL
3-state output enable time
OE to nY
15
30
38
45
ns
4.5
Fig.7
t
PHZ
/ t
PLZ
3-state output disable time
OE to nY
16
30
38
45
ns
4.5
Fig.7
t
THL
/ t
TLH
output transition time
5
12
15
18
ns
4.5
Fig.6
1998 Sep 30
7
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
AC WAVEFORMS
Fig.6
Waveforms showing the input (nI
0
, nI
1
) to
output (nY) propagation delays and the
output transition times.
(1) HC: V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.7
Waveforms showing the 3-state enable and
disable times.
(1) HC: V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
1998 Sep 30
8
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
PACKAGE OUTLINES
UNIT
A
max.
1
2
b
1
c
E
e
M
H
L
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
mm
inches
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
SOT38-1
92-10-02
95-01-19
A
min.
A
max.
b
max.
w
M
E
e
1
1.40
1.14
0.055
0.045
0.53
0.38
0.32
0.23
21.8
21.4
0.86
0.84
6.48
6.20
0.26
0.24
3.9
3.4
0.15
0.13
0.254
2.54
7.62
0.30
8.25
7.80
0.32
0.31
9.5
8.3
0.37
0.33
2.2
0.087
4.7
0.51
3.7
0.15
0.021
0.015
0.013
0.009
0.01
0.10
0.020
0.19
050G09
MO-001AE
M
H
c
(e )
1
M
E
A
L
seating plane
A
1
w
M
b
1
e
D
A
2
Z
16
1
9
8
b
E
pin 1 index
0
5
10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
(1)
(1)
D
(1)
Z
DIP16: plastic dual in-line package; 16 leads (300 mil); long body
SOT38-1
1998 Sep 30
9
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
X
w
M
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
e
c
L
v
M
A
(A )
3
A
8
9
1
16
y
pin 1 index
UNIT
A
max.
A
1
A
2
A
3
b
p
c
D
(1)
E
(1)
(1)
e
H
E
L
L
p
Q
Z
y
w
v
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
mm
inches
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
1.27
6.2
5.8
0.7
0.6
0.7
0.3
8
0
o
o
0.25
0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
1.0
0.4
SOT109-1
95-01-23
97-05-22
076E07S
MS-012AC
0.069
0.010
0.004
0.057
0.049
0.01
0.019
0.014
0.0100
0.0075
0.39
0.38
0.16
0.15
0.050
1.05
0.041
0.244
0.228
0.028
0.020
0.028
0.012
0.01
0.25
0.01
0.004
0.039
0.016
0
2.5
5 mm
scale
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
1998 Sep 30
10
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
UNIT
A
1
A
2
A
3
b
p
c
D
(1)
E
(1)
e
H
E
L
L
p
Q
Z
y
w
v
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
mm
0.21
0.05
1.80
1.65
0.25
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
0.65
1.25
7.9
7.6
1.03
0.63
0.9
0.7
1.00
0.55
8
0
o
o
0.13
0.2
0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT338-1
94-01-14
95-02-04
(1)
w
M
b
p
D
H
E
E
Z
e
c
v
M
A
X
A
y
1
8
16
9
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
MO-150AC
pin 1 index
0
2.5
5 mm
scale
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
A
max.
2.0
1998 Sep 30
11
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
UNIT
A
1
A
2
A
3
b
p
c
D
(1)
E
(2)
(1)
e
H
E
L
L
p
Q
Z
y
w
v
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
mm
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
0.4
0.3
0.40
0.06
8
0
o
o
0.13
0.1
0.2
1.0
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT403-1
MO-153
94-07-12
95-04-04
w
M
b
p
D
Z
e
0.25
1
8
16
9
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
H
E
E
c
v
M
A
X
A
y
0
2.5
5 mm
scale
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
A
max.
1.10
pin 1 index
1998 Sep 30
12
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
"Data Handbook IC26; Integrated Circuit Packages"
(order code 9398 652 90011).
DIP
S
OLDERING BY DIPPING OR BY WAVE
The maximum permissible temperature of the solder is
260
C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
stg max
). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
R
EPAIRING SOLDERED JOINTS
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300
C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400
C, contact may be up to 5 seconds.
SO, SSOP and TSSOP
R
EFLOW SOLDERING
Reflow soldering techniques are suitable for all SO, SSOP
and TSSOP packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method.
Typical reflow temperatures range from 215 to 250
C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45
C.
W
AVE SOLDERING
Wave soldering can be used for all SO packages. Wave
soldering is not recommended for SSOP and TSSOP
packages, because of the likelihood of solder bridging due
to closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
If wave soldering is used - and cannot be avoided for
SSOP and TSSOP packages - the following conditions
must be observed:
A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
The longitudinal axis of the package footprint must be
parallel to the solder flow and must incorporate solder
thieves at the downstream end.
Even with these conditions:
Only consider wave soldering SSOP packages that
have a body width of 4.4 mm, that is
SSOP16 (SOT369-1) or SSOP20 (SOT266-1).
Do not consider wave soldering TSSOP packages
with 48 leads or more, that is TSSOP48 (SOT362-1)
and TSSOP56 (SOT364-1).
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260
C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150
C within
6 seconds. Typical dwell time is 4 seconds at 250
C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
1998 Sep 30
13
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
R
EPAIRING SOLDERED JOINTS
Fix the component by first soldering two diagonally- opposite end leads. Use only a low voltage soldering iron (less
than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300
C. When using a
dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320
C.
DEFINITIONS
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
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