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Электронный компонент: 74HC4050N

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DATA SHEET
Product specification
File under Integrated Circuits, IC06
December 1990
INTEGRATED CIRCUITS
74HC4050
Hex high-to-low level shifter
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
December 1990
2
Philips Semiconductors
Product specification
Hex high-to-low level shifter
74HC4050
FEATURES
Output capability: standard
I
CC
category: SSI
GENERAL DESCRIPTION
The 74HC4050 is a high-speed Si-gate CMOS device and
is pin compatible with the "4050" of the "4000B" series. It
is specified in compliance with JEDEC standard no. 7A.
The 74HC4050 provides six non-inverting buffers with a
modified input protection structure, which has no diode
connected to V
CC
. Input voltages of up to 15 V may
therefore be used. This feature enables the non-inverting
buffers to be used as logic level translators, which will
convert high level logic to low level logic, while operating
from a low voltage power supply. For example 15 V logic
("4000B series") can be converted down to 2 V logic.
The actual input switch level remains related to the V
CC
and is the same as mentioned in the family characteristics.
APPLICATIONS
Converting 15 V logic ("4000B" series) down to 2 V logic.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W):
P
D
= C
PD
V
CC
2
f
i
+
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
(C
L
V
CC
2
f
o
) = sum of outputs
ORDERING INFORMATION
See
"74HC/HCT/HCU/HCMOS Logic Package Information"
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
t
PHL
/ t
PLH
propagation delay nA to nY
C
L
= 15 pF; V
CC
= 5 V
7
ns
C
I
input capacitance
3.5
pF
C
PD
power dissipation capacitance per buffer
note 1
14
pF
December 1990
3
Philips Semiconductors
Product specification
Hex high-to-low level shifter
74HC4050
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1
V
CC
positive supply voltage
2, 4, 6, 10, 12, 15
1Y to 6Y
data outputs
3, 5, 7, 9, 11, 14
1A to 6A
data inputs
8
GND
ground (0 V)
13, 16
n.c.
not connected
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
4
Philips Semiconductors
Product specification
Hex high-to-low level shifter
74HC4050
Fig.4 Functional diagram.
Fig.5
Input protection for HC4050. Single sided
thick oxide field effect metal gate transistor as
input protection.
FUNCTION TABLE
(1)
Note
1. H = HIGH voltage level
L = LOW voltage level
INPUT
OUTPUT
nA
nY
L
H
L
H
Fig.6 Logic diagram (one level shifter).
December 1990
5
Philips Semiconductors
Product specification
Hex high-to-low level shifter
74HC4050
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Voltages are referenced to GND (ground = 0 V)
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
CONDITIONS
V
CC
DC supply voltage
-
0.5
+7
V
V
IK
DC input voltage range
-
0.5
+16
V
-
I
IK
DC input diode current
20
mA
for V
I
< -
0.5 V
I
OK
DC output diode current
20
mA
for V
O
< -
0.5 V or V
O
>
V
CC
+ 0.5 V
I
O
DC output source or sink current
- standard outputs
25
mA
for
-
0.5 V
<
V
O
<
V
CC
+ 0.5 V
I
CC
;
I
GND
DC V
CC
or GND current for types
with:
- standard outputs
50
mA
T
stg
storage temperature range
-
65
+150
C
P
tot
power dissipation per package
for temperature range:
-
40 to +125
C
74HC
plastic DIL
750
mW
above +70
C: derate linearly with 12 mW/K
plastic mini-pack (SO)
500
mW
above +70
C: derate linearly with 8 mW/K
SYMBOL
PARAMETER
74HC
UNIT
CONDITIONS
min.
typ.
max.
V
CC
DC supply voltage
2.0
5.0
6.0
V
V
I
DC input voltage range
GND
-
15
V
T
amb
operating ambient temperature range
-
40
+85
C
see DC and AC
characteristics
T
amb
operating ambient temperature range
-
40
+125
C
t
r
, t
f
input rise and fall times
6.0
1000
500
400
650
1000
ns
V
CC
= 2.0 V; V
IN
= 2.0 V
V
CC
= 4.5 V; V
IN
= 4.5 V
V
CC
= 6.0 V; V
IN
= 6.0 V
V
CC
= 6.0 V; V
IN
= 10.0 V
V
CC
= 6.0 V; V
IN
= 15.0 V
December 1990
6
Philips Semiconductors
Product specification
Hex high-to-low level shifter
74HC4050
DC CHARACTERISTICS FOR 74HC
Voltages are referenced to GND (ground = 0 V)
SYMBOL
PARAMETER
T
amb
(
C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
V
I
OTHER
+25
-
40 to +85
-
40 to
+
125
min. typ. max. min. max. min.
max.
V
IH
HIGH level input
voltage
1.5
3.15
4.2
1.3
2.4
3.1
1.5
3.15
4.2
1.5
3.15
4.2
V
2.0
4.5
6.0
V
IL
LOW level input
voltage
0.7
1.8
2.3
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
V
2.0
4.5
6.0
V
OH
HIGH level output
voltage - all outputs
1.9
4.4
5.9
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
V
2.0
4.5
6.0
V
IH
or
V
IL
-
I
O
= 20
A
-
I
O
= 20
A
-
I
O
= 20
A
V
OH
HIGH level output
voltage - standard
outputs
3.98
5.48
3.84
5.34
3.7
5.2
V
4.5
6.0
V
IH
or
V
IL
-
I
O
= 4.0 mA
-
I
O
= 5.2 mA
V
OL
LOW level output
voltage - all outputs
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
2.0
4.5
6.0
V
IH
or
V
IL
I
O
= 20
A
I
O
= 20
A
I
O
= 20
A
V
OL
LOW level output
voltage - standard
outputs
0.26
0.26
0.33
0.33
0.4
0.4
V
4.5
6.0
V
IH
or
V
IL
I
O
= 4.0 mA
I
O
= 5.2 mA
I
I
input leakage current
0.1
1.0
1.0
A
6.0
V
CC
or
GND
0.5
5.0
5.0
A
2.0
to
6.0
15 V
I
CC
quiescent supply
current
2.0
20.0
40.0
A
6.0
15 V
or
GND
December 1990
7
Philips Semiconductors
Product specification
Hex high-to-low level shifter
74HC4050
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
AC WAVEFORMS
PACKAGE OUTLINES
See
"74HC/HCT/HCU/HCMOS Logic Package Outlines"
.
SYMBOL
PARAMETER
T
amb
(
C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS
+25
-
40 to +85
-
40 to +125
min.
typ.
max.
min. max.
min.
max.
t
PHL
/ t
PLH
propagation delay
nA to nY
25
9
7
85
17
14
105
21
18
130
26
22
ns
2.0
4.5
6.0
Fig.7
t
THL
/ t
TLH
output transition time
19
7
6
75
15
13
95
19
16
110
22
19
ns
2.0
4.5
6.0
Fig.7
Fig.7 Waveforms showing the input (nA) to output (nY) propagation delays and the output transition times.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.