Document Outline
- FEATURES
- APPLICATIONS
- DESCRIPTION
- PINNING - SOT363
- QUICK REFERENCE DATA
- LIMITING VALUES
- THERMAL CHARACTERISTICS
- STATIC CHARACTERISTICS
- DYNAMIC CHARACTERISTICS
- ALL GRAPHS FOR ONE MOS-FET
- PACKAGE OUTLINE
- DATA SHEET STATUS
- DEFINITIONS
- DISCLAIMERS
DATA SHEET
Product specification
Supersedes data of 1999 Jul 01
2000 Apr 11
DISCRETE SEMICONDUCTORS
BF1102; BF1102R
Dual N-channel dual gate
MOS-FETs
book, halfpage
MBD128
2000 Apr 11
2
Philips Semiconductors
Product specification
Dual N-channel dual gate MOS-FETs
BF1102; BF1102R
FEATURES
Two low noise gain controlled amplifiers in a single
package
Specially designed for 5 V applications
Superior cross-modulation performance during AGC
High forward transfer admittance
High forward transfer admittance to input capacitance
ratio.
APPLICATIONS
Gain controlled low noise amplifier for VHF and UHF
applications such as television tuners and professional
communications equipment.
DESCRIPTION
The BF1102 and BF1102R are both two equal dual gate
MOS-FETs which have a shared source pin and a shared
gate 2 pin. Both devices have interconnected source and
substrate; an internal bias circuit enables DC stabilization
and a very good cross-modulation performance at 5 V
supply voltage; integrated diodes between the gates and
source protect against excessive input voltage surges.
Both devices have a SOT363 micro-miniature plastic
package.
PINNING - SOT363
PIN
DESCRIPTION
BF1102
BF1102R
1
gate 1 (1)
gate 1 (1)
2
gate 2 (1 and 2)
source (1 and 2)
3
drain (1)
drain (1)
4
drain (2)
drain (2)
5
source (1 and 2)
gate 2 (1 and 2)
6
gate 1 (2)
gate 1 (2)
handbook, halfpage
MBL029
AMP1
d (1)
g1 (1)
d (2)
g1 (2)
AMP2
g2 (1, 2)
s (1, 2)
1
3
2
4
5
6
Fig.1 Simplified outline and symbol.
BF1102 marking code: W1.
BF1102R marking code: W2-.
QUICK REFERENCE DATA
Note
1. T
s
is the temperature at the soldering point of the source lead.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Per MOS-FET unless otherwise specified
V
DS
drain-source voltage
-
-
7
V
I
D
drain current (DC)
-
-
40
mA
P
tot
total power dissipation
T
s
102
C; note 1
-
-
200
mW
y
fs
forward transfer admittance
I
D
= 15 mA
36
43
-
mS
C
ig1-s
input capacitance at gate 1
I
D
= 15 mA
-
2.8
3.6
pF
C
rss
reverse transfer capacitance
f = 1 MHz
-
30
50
fF
F
noise figure
f = 800 MHz
-
2
2.8
dB
X
mod
cross-modulation
input level for k = 1% at 40 dB AGC 100
-
-
dB
V
T
j
operating junction temperature
-
-
150
C
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport
and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B.
2000 Apr 11
3
Philips Semiconductors
Product specification
Dual N-channel dual gate MOS-FETs
BF1102; BF1102R
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
Per MOS-FET unless otherwise specified
V
DS
drain-source voltage
-
7
V
I
D
drain current (DC)
-
40
mA
I
G1
gate 1 current
-
10
mA
I
G2
gate 2 current
-
10
mA
P
tot
total power dissipation
T
s
102
C
-
200
mW
T
stg
storage temperature
-
65
+150
C
T
j
operating junction temperature
-
150
C
SYMBOL
PARAMETER
VALUE
UNIT
R
th j-s
thermal resistance from junction to soldering point
240
K/W
handbook, halfpage
0
50
100
200
250
0
200
MGS359
150
150
100
50
Ts (
C)
Ptot
(mW)
Fig.2 Power derating curve.
2000 Apr 11
4
Philips Semiconductors
Product specification
Dual N-channel dual gate MOS-FETs
BF1102; BF1102R
STATIC CHARACTERISTICS
T
j
= 25
C unless otherwise specified.
Note
1. R
G1
connects gate 1 to V
GG
= 5 V.
DYNAMIC CHARACTERISTICS
Common source; T
amb
= 25
C; V
G2-S
= 4 V; V
DS
= 5 V; I
D
= 15 mA; unless otherwise specified.
Notes
1. Not used MOS-FET: V
G1-S
= 0; V
DS
= 0.
2. Gate 2 capacitance of both MOS-FETs.
3. Measured in test circuit of Fig.20.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
Per MOS-FET unless otherwise specified
V
(BR)DSS
drain-source breakdown voltage
V
G1-S
= V
G2-S
= 0; I
D
= 10
A
7
-
V
V
(BR)G1-SS
gate 1-source breakdown voltage
V
GS
= V
DS
= 0; I
G1-S
= 10 mA
6
15
V
V
(BR)G2-SS
gate 2-source breakdown voltage
V
GS
= V
DS
= 0; I
G2-S
= 5 mA
6
15
V
V
(F)S-G1
forward source-gate 1 voltage
V
G2-S
= V
DS
= 0; I
S-G1
= 10 mA
0.5
1.5
V
V
(F)S-G2
forward source-gate 2 voltage
V
G1-S
= V
DS
= 0; I
S-G2
= 10 mA
0.5
1.5
V
V
G1-S(th)
gate 1-source threshold voltage
V
DS
= 5 V; V
G2-S
= 4 V; I
D
= 100
A
0.3
1
V
V
G2-S(th)
gate 2-source threshold voltage
V
DS
= 5 V; V
G1-S
= 4 V; I
D
= 100
A
0.3
1.2
V
I
DSX
drain-source current
V
G2-S
= 4 V; V
DS
= 5 V; R
G
= 120 k
; note 1
12
20
mA
I
G1-S
gate 1 cut-off current
V
G1-S
= 5 V; V
G2-S
= V
DS
= 0
-
50
nA
I
G2-S
gate 2 cut-off current
V
G2-S
= 5 V; V
G1-S
= V
DS
= 0
-
20
nA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Per MOS-FET unless otherwise specified (note 1)
y
fs
forward transfer admittance
T
j
= 25
C
36
43
50
mS
C
ig1-ss
input capacitance at gate 1
f = 1 MHz
2
2.8
3.6
pF
C
ig2-ss
input capacitance at gate 2
f = 1 MHz; (note 2)
-
-
7
pF
C
oss
output capacitance
f = 1 MHz
-
1.6
2.5
pF
C
rss
reverse transfer capacitance
f = 1 MHz
-
30
50
fF
F
noise figure
f = 800 MHz; Y
S
= Y
S opt
-
2
2.8
dB
X
mod
cross-modulation
f
w
= 50 MHz; f
unw
= 60 MHz; (note 3)
input level for k = 1% at 0 dB AGC
85
-
-
dB
V
input level for k = 1% at 40 dB AGC
100
-
-
dB
V
2000 Apr 11
5
Philips Semiconductors
Product specification
Dual N-channel dual gate MOS-FETs
BF1102; BF1102R
ALL GRAPHS FOR ONE MOS-FET
handbook, halfpage
0
30
20
10
0
0.8
0.4
2.4
2.0
1.6
1.2
MGS360
VG1-S (V)
2.5 V
2 V
1.5 V
1 V
3.5 V
3 V
VG2-S = 4 V
ID
(mA)
Fig.3 Transfer characteristics; typical values.
V
DS
= 5 V.
T
j
= 25
C.
handbook, halfpage
0
10
30
10
0
20
MGS361
2
4
6
8
VDS (V)
ID
(mA)
1.4 V
1.3 V
1.2 V
1.1 V
1 V
VG1-S = 1.5 V
Fig.4 Output characteristics; typical values.
V
G2-S
= 4 V.
T
j
= 25
C.
handbook, halfpage
0
160
80
120
40
0
0.5
2.5
MGS362
1
1.5
2
IG1
(
A)
VG1-S (V)
2.5 V
2 V
3.5 V
3 V
VG2-S = 4 V
Fig.5
Gate 1 current as a function of gate 1
voltage; typical values.
V
DS
= 5 V.
T
j
= 25
C.
handbook, halfpage
0
10
30
50
0
40
MGS363
20
30
20
10
ID (mA)
|yfs|
(mS)
3.5 V
3 V
VG2-S = 4 V
2.5 V
2 V
Fig.6
Forward transfer admittance as a function
of drain current; typical values.
V
DS
= 5 V.
T
j
= 25
C.
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