DATA SHEET
Product specification
Supersedes data of 1995 Apr 25
File under Discrete Semiconductors, SC07
1997 Sep 05
DISCRETE SEMICONDUCTORS
BF909WR
N-channel dual-gate MOS-FET
1997 Sep 05
2
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FET
BF909WR
FEATURES
Specially designed for use at 5 V supply voltage
Short channel transistor with high forward transfer
admittance to input capacitance ratio
Low noise gain controlled amplifier up to 1 GHz
Superior cross-modulation performance during AGC.
APPLICATIONS
VHF and UHF applications with 3 to 7 V supply voltage
such as television tuners and professional
communications equipment.
DESCRIPTION
Enhancement type field-effect transistor in a plastic
microminiature SOT343R package. The transistor
consists of an amplifier MOS-FET with source and
substrate interconnected and an internal bias circuit to
ensure good cross-modulation performance during AGC.
CAUTION
The device is supplied in an antistatic package. The
gate-source input must be protected against static
discharge during transport or handling.
PINNING
PIN
SYMBOL
DESCRIPTION
1
s, b
source
2
d
drain
3
g
2
gate 2
4
g
1
gate 1
Fig.1 Simplified outline (SOT343R) and symbol.
Marking code: ME.
handbook, halfpage
MAM192
s,b
d
g
1
g
2
Top view
2
1
3
4
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DS
drain-source voltage
-
-
7
V
I
D
drain current
-
-
40
mA
P
tot
total power dissipation
-
-
280
mW
T
j
operating junction temperature
-
-
150
C
y
fs
forward transfer admittance
36
43
50
mS
C
ig1-s
input capacitance at gate 1
-
3.6
4.3
pF
C
rs
reverse transfer capacitance
f = 1 MHz
-
30
50
fF
F
noise figure
f = 800 MHz
-
2
2.8
dB
1997 Sep 05
3
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FET
BF909WR
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Note
1. Device mounted on a printed-circuit board.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DS
drain-source voltage
-
7
V
I
D
drain current
-
40
mA
I
G1
gate 1 current
-
10
mA
I
G2
gate 2 current
-
10
mA
P
tot
total power dissipation
up to T
amb
= 50
C; see Fig.2;
note 1
-
280
mW
T
stg
storage temperature range
-
65
+150
C
T
j
operating junction temperature
-
+150
C
Fig.2 Power derating curve.
handbook, halfpage
0
50
100
200
300
0
MLD150
150
200
100
Ptot
(mW)
T ( C)
amb
o
1997 Sep 05
4
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FET
BF909WR
THERMAL CHARACTERISTICS
Notes
1. Device mounted on a printed-circuit board.
2. T
s
is the temperature at the soldering point of the source lead.
STATIC CHARACTERISTICS
T
j
= 25
C; unless otherwise specified.
Note
1. R
G1
connects gate 1 to V
GG
= 5 V.
DYNAMIC CHARACTERISTICS
Common source; T
amb
= 25
C; V
DS
= 5 V; V
G2-S
= 4 V; I
D
= 15 mA; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
R
th j-a
thermal resistance from junction to ambient
note 1
350
K/W
R
th j-s
thermal resistance from junction to soldering point
T
s
= 91
C; note 2
210
K/W
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
(BR)G1-SS
gate 1-source breakdown voltage
V
G2-S
= V
DS
= 0; I
G1-S
= 10 mA
6
15
V
V
(BR)G2-SS
gate 2-source breakdown voltage
V
G1-S
= V
DS
= 0; I
G2-S
= 10 mA
6
15
V
V
(F)S-G1
forward source-gate 1 voltage
V
G2-S
= V
DS
= 0; I
S-G1
= 10 mA
0.5
1.5
V
V
(F)S-G2
forward source-gate 2 voltage
V
G1-S
= V
DS
= 0; I
S-G2
= 10 mA
0.5
1.5
V
V
G1-S(th)
gate 1-source threshold voltage
V
G2-S
= 4 V; V
DS
= 5 V; I
D
= 20
A
0.3
1
V
V
G2-S(th)
gate 2-source threshold voltage
V
G1-S
= V
DS
= 5 V; I
D
= 20
A
0.3
1.2
V
I
DSX
drain-source current
V
G2-S
= 4 V; V
DS
= 5 V; R
G1
= 120 k
;
note 1
12
20
mA
I
G1-SS
gate 1 cut-off current
V
G2-S
= V
DS
= 0; V
G1-S
= 5 V
-
50
nA
I
G2-SS
gate 2 cut-off current
V
G1-S
= V
DS
= 0; V
G2-S
= 5 V
-
50
nA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
y
fs
forward transfer admittance
pulsed; T
j
= 25
C
36
43
50
mS
C
ig1-s
input capacitance at gate 1
f = 1 MHz
-
3.6
4.3
pF
C
ig2-s
input capacitance at gate 2
f = 1 MHz
-
2.3
3
pF
C
os
drain-source capacitance
f = 1 MHz
-
2.3
3
pF
C
rs
reverse transfer capacitance f = 1 MHz
-
30
50
fF
F
noise figure
f = 800 MHz; G
S
= G
Sopt
; B
S
= B
Sopt
-
2
2.8
dB
1997 Sep 05
5
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FET
BF909WR
Fig.3
Unwanted voltage for 1% cross-modulation
as a function of gain reduction; typical
values; see Fig.17.
V
DS
= 5 V; V
GG
= 5 V; f
w
= 50 MHz.
f
unw
= 60 MHz; T
amb
= 25
C; R
G1
= 120 k
.
handbook, halfpage
0
110
100
90
80
10
50
MLB936
20
30
40
Vunw
(dB
V)
gain reduction (dB)
Fig.4 Transfer characteristics; typical values.
V
DS
= 5 V.
T
j
= 25
C.
handbook, halfpage
0
30
20
10
0
0.4
2.0
MLB937
0.8
1.2
1.6
I D
(mA)
V (V)
G1 S
V = 4 V 3 V
2.5 V
2 V
1.5 V
1 V
G2 S
Fig.5 Output characteristics; typical values.
V
DS
= 5 V.
V
G2-S
= 4 V.
T
j
= 25
C.
handbook, halfpage
0
30
20
10
0
2
10
MLB938
4
6
8
I D
(mA)
V (V)
DS
1.3 V
1.2 V
1.1 V
1.0 V
0.9 V
V = 1.4 V
G1 S
Fig.6
Gate 1 current as a function of gate 1
voltage; typical values.
V
DS
= 5 V.
T
j
= 25
C.
handbook, halfpage
0
1
2
3
200
150
50
0
100
MLB939
I G1
(
A)
V (V)
G1 S
3 V
2.5 V
2 V
3.5 V
V = 4 V
G2 S
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