Philips Semiconductors
Product specification
N-channel enhancement mode
BSH105
MOS transistor
FEATURES
SYMBOL
QUICK REFERENCE DATA
Very low threshold voltage
V
DS
= 20 V
Fast switching
Logic level compatible
I
D
= 1.05 A
Subminiature surface mount
package
R
DS(ON)
250 m
(V
GS
= 2.5 V)
V
GS(TO)
0.4 V
GENERAL DESCRIPTION
PINNING
SOT23
N-channel, enhancement mode,
PIN
DESCRIPTION
logic
level,
field-effect
power
transistor. This device has very low
1
gate
threshold voltage and extremely
fast switching making it ideal for
2
source
battery powered applications and
high speed digital interfacing.
3
drain
The BSH105 is supplied in the
SOT23
subminiature
surface
mounting package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DS
Drain-source voltage
-
20
V
V
DGR
Drain-gate voltage
R
GS
= 20 k
-
20
V
V
GS
Gate-source voltage
-
8
V
I
D
Drain current (DC)
T
a
= 25 C
-
1.05
A
T
a
= 100 C
-
0.67
A
I
DM
Drain current (pulse peak value)
T
a
= 25 C
-
4.2
A
P
tot
Total power dissipation
T
a
= 25 C
-
0.417
W
T
a
= 100 C
-
0.17
W
T
stg
, T
j
Storage & operating temperature
- 55
150
C
THERMAL RESISTANCES
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
R
th j-a
Thermal resistance junction to
FR4 board, minimum
300
-
K/W
ambient
footprint
d
g
s
1
2
3
Top view
August 1998
1
Rev 1.000
Philips Semiconductors
Product specification
N-channel enhancement mode
BSH105
MOS transistor
ELECTRICAL CHARACTERISTICS
T
j
= 25C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
V
(BR)DSS
Drain-source breakdown
V
GS
= 0 V; I
D
= 10
A
20
-
-
V
voltage
V
GS(TO)
Gate threshold voltage
V
DS
= V
GS
; I
D
= 1 mA
0.4
0.57
-
V
T
j
= 150C
0.1
-
-
V
R
DS(ON)
Drain-source on-state
V
GS
= 4.5 V; I
D
= 0.6 A
-
140
200
m
resistance
V
GS
= 2.5 V; I
D
= 0.6 A
-
180
250
m
V
GS
= 1.8 V; I
D
= 0.3 A
-
240
300
m
V
GS
= 2.5 V; I
D
= 0.6 A; T
j
= 150C
-
270
375
m
g
fs
Forward transconductance
V
DS
= 16 V; I
D
= 0.6 A
0.5
1.6
-
S
I
GSS
Gate source leakage current V
GS
=
8 V; V
DS
= 0 V
-
10
100
nA
I
DSS
Zero gate voltage drain
V
DS
= 16 V; V
GS
= 0 V;
-
50
100
nA
current
T
j
= 150C
-
1.3
10
A
Q
g(tot)
Total gate charge
I
D
= 1 A; V
DD
= 20 V; V
GS
= 4.5 V
-
3.9
-
nC
Q
gs
Gate-source charge
-
0.4
-
nC
Q
gd
Gate-drain (Miller) charge
-
1.4
-
nC
t
d on
Turn-on delay time
V
DD
= 20 V; I
D
= 1 A;
-
2
-
ns
t
r
Turn-on rise time
V
GS
= 8 V; R
G
= 6
-
4.5
-
ns
t
d off
Turn-off delay time
Resistive load
-
45
-
ns
t
f
Turn-off fall time
-
20
-
ns
C
iss
Input capacitance
V
GS
= 0 V; V
DS
= 16 V; f = 1 MHz
-
152
-
pF
C
oss
Output capacitance
-
71
-
pF
C
rss
Feedback capacitance
-
33
-
pF
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
T
j
= 25C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
I
DR
Continuous reverse drain
T
a
= 25 C
-
-
1.05
A
current
I
DRM
Pulsed reverse drain current
-
-
4.2
A
V
SD
Diode forward voltage
I
F
= 0.5 A; V
GS
= 0 V
-
0.74
1
V
t
rr
Reverse recovery time
I
F
= 0.5 A; -dI
F
/dt = 100 A/
s;
-
27
-
ns
Q
rr
Reverse recovery charge
V
GS
= 0 V; V
R
= 16 V
-
19
-
nC
August 1998
2
Rev 1.000
Philips Semiconductors
Product specification
N-channel enhancement mode
BSH105
MOS transistor
Fig.1. Normalised power dissipation.
PD% = 100
P
D
/P
D 25 C
= f(T
a
)
Fig.2. Normalised continuous drain current.
ID% = 100
I
D
/I
D 25 C
= f(T
a
); conditions: V
GS
4.5 V
Fig.3. Safe operating area. T
a
= 25 C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
Fig.4. Transient thermal impedance.
Z
th j-a
= f(t); parameter D = t
p
/T
Fig.5. Typical output characteristics, T
j
= 25 C.
I
D
= f(V
DS
); parameter V
GS
Fig.6. Typical on-state resistance, T
j
= 25 C.
R
DS(ON)
= f(I
D
); parameter V
GS
Normalised Power Dissipation, PD (%)
0
20
40
60
80
100
120
0
25
50
75
100
125
150
Ambient Temperature, Ta (C)
BSH105
0.1
1
10
100
1000
1E-06
1E-05
1E-04
1E-03
1E-02
1E-01
1E+00
1E+01
Pulse width, tp (s)
Peak Pulsed Drain Current, IDM (A)
single pulse
D = 0.5
0.2
0.1
0.05
0.02
tp
D = tp/T
D
P
T
Normalised Drain Current, ID (%)
0
20
40
60
80
100
120
0
25
50
75
100
125
150
Ambient Temperature, Ta (C)
BSH105
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
0.5
1
1.5
2
Drain-Source Voltage, VDS (V)
Drain Current, ID (A)
1.1 V
1.5 V
1.3 V
1.7 V
4.5V
Tj = 25 C
2.5V
VGS = 1.9 V
2.1 V
BSH105
0.01
0.1
1
10
100
0.1
1
10
100
Drain-Source Voltage, VDS (V)
Peak Pulsed Drain Current, IDM (A)
d.c.
100 ms
10 ms
RDS(on) = VDS/ ID
tp = 100 us
1 ms
BSH105
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Drain Current, ID (A)
Drain-Source On Resistance, RDS(on) (Ohms)
VGS = 4.5 V
2.5 V
2.1 V
1.9 V
1.7 V
Tj = 25 C
1.5 V
August 1998
3
Rev 1.000
Philips Semiconductors
Product specification
N-channel enhancement mode
BSH105
MOS transistor
Fig.7. Typical transfer characteristics.
I
D
= f(V
GS
)
Fig.8. Typical transconductance, T
j
= 25 C.
g
fs
= f(I
D
)
Fig.9. Normalised drain-source on-state resistance.
R
DS(ON)
/R
DS(ON)25 C
= f(T
j
)
Fig.10. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= V
GS
Fig.11. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 C
Fig.12. Typical capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
BSH105
0
0.5
1
1.5
2
2.5
3
0
0.5
1
1.5
2
2.5
3
Gate-Source Voltage, VGS (V)
VDS > ID X RDS(on)
Tj = 25 C
150 C
Drain Current, ID (A)
Threshold Voltage, VGS(to), (V)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0
25
50
75
100
125
150
Junction Temperature, Tj (C)
minimum
typical
BSH105
0
0.5
1
1.5
2
2.5
3
3.5
4
0
0.5
1
1.5
2
2.5
3
Drain Current, ID (A)
Transconductance, gfs (S)
BSH105
1E-07
1E-06
1E-05
1E-04
1E-03
1E-02
1E-01
1E+00
0
0.2
0.4
0.6
0.8
1
Gate-Source Voltage, VGS (V)
Drain Current, ID (A)
VDS = 5 V
Tj = 25 C
Normalised Drain-Source On Resistance
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
0
25
50
75
100
125
150
Junction Temperature, Tj (C)
VGS = 4.5 V
2.5 V
1.8 V
RDS(ON) @ Tj
RDS(ON) @ 25C
BSH105
10
100
1000
0.1
1
10
100
Drain-Source Voltage, VDS (V)
Capacitances, Ciss, Coss, Crss (pF)
Ciss
Coss
Crss
August 1998
4
Rev 1.000
Philips Semiconductors
Product specification
N-channel enhancement mode
BSH105
MOS transistor
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
)
Fig.14. Typical reverse diode current.
I
F
= f(V
SDS
); conditions: V
GS
= 0 V; parameter T
j
BSH105
0
1
2
3
4
5
6
7
8
9
10
0
2
4
6
8
Gate charge, QG (nC)
VDD = 20 V
RD = 20 Ohms
Tj = 25 C
Gate-source voltage, VGS (V)
BSH105
-5
-4.5
-4
-3.5
-3
-2.5
-2
-1.5
-1
-0.5
0
-1.2
-1
-0.8
-0.6
-0.4
-0.2
0
Drain-Source Voltage, VSDS (V)
Source-Drain Diode Current, IF (A)
Tj = 25 C
150 C
August 1998
5
Rev 1.000
Philips Semiconductors
Product specification
N-channel enhancement mode
BSH105
MOS transistor
MECHANICAL DATA
Fig.15. SOT23 surface mounting package.
Notes
1. This product is supplied in anti-static packaging. The gate-source input must be protected against static
discharge during transport or handling.
2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18.
3. Epoxy meets UL94 V0 at 1/8".
UNIT
A
1
max.
b
p
c
D
E
e
1
H
E
L
p
Q
w
v
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
97-02-28
IEC
JEDEC
EIAJ
mm
0.1
0.48
0.38
0.15
0.09
3.0
2.8
1.4
1.2
0.95
e
1.9
2.5
2.1
0.55
0.45
0.1
0.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15
SOT23
bp
D
e1
e
A
A1
Lp
Q
detail X
HE
E
w
M
v
M
A
B
A
B
0
1
2 mm
scale
A
1.1
0.9
c
X
1
2
3
Plastic surface mounted package; 3 leads
SOT23
August 1998
6
Rev 1.000
Philips Semiconductors
Product specification
N-channel enhancement mode
BSH105
MOS transistor
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1998
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
August 1998
7
Rev 1.000
PDF 
ZIP