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Электронный компонент: BUK553-100B

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Philips Semiconductors
Product Specification
PowerMOS transistor
BUK553-100A/B
Logic level FET
GENERAL DESCRIPTION
QUICK REFERENCE DATA
N-channel enhancement mode
SYMBOL
PARAMETER
MAX.
MAX.
UNIT
logic level field-effect power
transistor in a plastic envelope.
BUK553
-100A
-100B
The device is intended for use in
V
DS
Drain-source voltage
100
100
V
Switched Mode Power Supplies
I
D
Drain current (DC)
13
12
A
(SMPS), motor control, welding,
P
tot
Total power dissipation
75
75
W
DC/DC and AC/DC converters, and
T
j
Junction temperature
175
175
C
in automotive and general purpose
R
DS(ON)
Drain-source on-state
0.18
0.22
switching applications.
resistance;
V
GS
= 5 V
PINNING - TO220AB
PIN CONFIGURATION
SYMBOL
PIN
DESCRIPTION
1
gate
2
drain
3
source
tab
drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DS
Drain-source voltage
-
-
100
V
V
DGR
Drain-gate voltage
R
GS
= 20 k
-
100
V
V
GS
Gate-source voltage
-
-
15
V
V
GSM
Non-repetitive gate-source voltage t
p
50
s
-
20
V
-100A
-100B
I
D
Drain current (DC)
T
mb
= 25 C
-
13
12
A
I
D
Drain current (DC)
T
mb
= 100 C
-
9
8.5
A
I
DM
Drain current (pulse peak value)
T
mb
= 25 C
-
52
48
A
P
tot
Total power dissipation
T
mb
= 25 C
-
75
W
T
stg
Storage temperature
-
- 55
175
C
T
j
Junction Temperature
-
-
175
C
THERMAL RESISTANCES
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
R
th j-mb
Thermal resistance junction to
-
-
2.0
K/W
mounting base
R
th j-a
Thermal resistance junction to
-
60
-
K/W
ambient
1 2 3
tab
d
g
s
April 1993
1
Rev 1.100
Philips Semiconductors
Product Specification
PowerMOS transistor
BUK553-100A/B
Logic level FET
STATIC CHARACTERISTICS
T
mb
= 25 C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
(BR)DSS
Drain-source breakdown
V
GS
= 0 V; I
D
= 0.25 mA
100
-
-
V
voltage
V
GS(TO)
Gate threshold voltage
V
DS
= V
GS
; I
D
= 1 mA
1.0
1.5
2.0
V
I
DSS
Zero gate voltage drain current
V
DS
= 100 V; V
GS
= 0 V; T
j
= 25 C
-
1
10
A
I
DSS
Zero gate voltage drain current
V
DS
= 100 V; V
GS
= 0 V; T
j
=125 C
-
0.1
1.0
mA
I
GSS
Gate source leakage current
V
GS
=
15 V; V
DS
= 0 V
-
10
100
nA
R
DS(ON)
Drain-source on-state
V
GS
= 5 V;
BUK553-100A
-
0.17
0.18
resistance
I
D
= 6.5 A
BUK553-100B
-
0.20
0.22
DYNAMIC CHARACTERISTICS
T
mb
= 25 C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
g
fs
Forward transconductance
V
DS
= 25 V; I
D
= 6.5 A
6.0
8.0
-
S
C
iss
Input capacitance
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
-
620
825
pF
C
oss
Output capacitance
-
180
250
pF
C
rss
Feedback capacitance
-
90
120
pF
t
d on
Turn-on delay time
V
DD
= 30 V; I
D
= 3 A;
-
10
20
ns
t
r
Turn-on rise time
V
GS
= 5 V; R
GS
= 50
;
-
45
60
ns
t
d off
Turn-off delay time
R
gen
= 50
-
90
115
ns
t
f
Turn-off fall time
-
40
55
ns
L
d
Internal drain inductance
Measured from contact screw on
-
3.5
-
nH
tab to centre of die
L
d
Internal drain inductance
Measured from drain lead 6 mm
-
4.5
-
nH
from package to centre of die
L
s
Internal source inductance
Measured from source lead 6 mm
-
7.5
-
nH
from package to source bond pad
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
T
mb
= 25 C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
I
DR
Continuous reverse drain
-
-
-
13
A
current
I
DRM
Pulsed reverse drain current
-
-
-
52
A
V
SD
Diode forward voltage
I
F
= 13 A ; V
GS
= 0 V
-
1.2
1.5
V
t
rr
Reverse recovery time
I
F
= 13 A; -dI
F
/dt = 100 A/
s;
-
90
-
ns
Q
rr
Reverse recovery charge
V
GS
= 0 V; V
R
= 30 V
-
0.6
-
C
AVALANCHE LIMITING VALUE
T
mb
= 25 C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
W
DSS
Drain-source non-repetitive
I
D
= 13 A ; V
DD
50 V ;
-
-
70
mJ
unclamped inductive turn-off
V
GS
= 5 V ; R
GS
= 50
energy
April 1993
2
Rev 1.100
Philips Semiconductors
Product Specification
PowerMOS transistor
BUK553-100A/B
Logic level FET
Fig.1. Normalised power dissipation.
PD% = 100
P
D
/P
D 25 C
= f(T
mb
)
Fig.2. Normalised continuous drain current.
ID% = 100
I
D
/I
D 25 C
= f(T
mb
); conditions: V
GS
5 V
Fig.3. Safe operating area. T
mb
= 25 C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
Fig.4. Transient thermal impedance.
Z
th j-mb
= f(t); parameter D = t
p
/T
Fig.5. Typical output characteristics, T
j
= 25 C.
I
D
= f(V
DS
); parameter V
GS
Fig.6. Typical on-state resistance, T
j
= 25 C.
R
DS(ON)
= f(I
D
); parameter V
GS
0
20
40
60
80
100
120
140
160
180
Tmb / C
PD%
Normalised Power Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
1E-07
1E-05
1E-03
1E-01
1E+01
t / s
Zth j-mb / (K/W)
1E+01
1E+00
1E-01
1E-02
0
0.5
0.2
0.1
0.05
0.02
D =
tp
t
p
T
T
P
t
D
ZTHX53
0
20
40
60
80
100
120
140
160
180
Tmb / C
ID%
Normalised Current Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
0
2
4
6
8
10
BUK553-100A
VDS / V
24
20
16
12
8
4
0
2
3
4
5
7
10
ID / A
VGS / V =
1
100
VDS / V
ID / A
100
10
1
0.1
DC
BUK553-100
10
tp = 10 us
100 us
1 ms
10 ms
RDS(ON) = VDS/ID
100 ms
A
B
0
4
8
12
16
20
24
28
BUK553-100A
ID / A
0.5
0.4
0.3
0.2
0.1
0
2.5
3
3.5
4
4.5
5
10
RDS(ON) / Ohm
VGS / V =
April 1993
3
Rev 1.100
Philips Semiconductors
Product Specification
PowerMOS transistor
BUK553-100A/B
Logic level FET
Fig.7. Typical transfer characteristics.
I
D
= f(V
GS
) ; conditions: V
DS
= 25 V; parameter T
j
Fig.8. Typical transconductance, T
j
= 25 C.
g
fs
= f(I
D
); conditions: V
DS
= 25 V
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)
/R
DS(ON)25 C
= f(T
j
); I
D
= 6.5 A; V
GS
= 5 V
Fig.10. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= V
GS
Fig.11. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 C; V
DS
= V
GS
Fig.12. Typical capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
0
2
4
6
8
BUK543-100A
VGS / V
15
10
5
0
ID / A
Tj / C =
25
150
-60
-20
20
60
100
140
180
Tj / C
VGS(TO) / V
2
1
0
max.
typ.
min.
0
2
4
6
8
10
12
14
16
18
20
BUK543-100A
ID / A
gfs / S
10
9
8
7
6
5
4
3
2
1
0
0
0.4
0.8
1.2
1.6
2
2.4
VGS / V
ID / A
1E-01
1E-02
1E-03
1E-04
1E-05
1E-06
SUB-THRESHOLD CONDUCTION
2 %
typ
98 %
-60
-20
20
60
100
140
180
Tj / C
Normalised RDS(ON) = f(Tj)
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
a
0
20
40
VDS / V
C / pF
Ciss
Coss
Crss
10
100
1000
10000
BUK5y3-100
April 1993
4
Rev 1.100
Philips Semiconductors
Product Specification
PowerMOS transistor
BUK553-100A/B
Logic level FET
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); conditions: I
D
= 13 A; parameter V
DS
Fig.14. Typical reverse diode current.
I
F
= f(V
SDS
); conditions: V
GS
= 0 V; parameter T
j
Fig.15. Normalised avalanche energy rating.
W
DSS
% = f(T
mb
); conditions: I
D
= 13 A
Fig.16. Avalanche energy test circuit.
0
2
4
6
8
10
12
14
16
18
20
QG / nC
VGS / V
12
10
8
6
4
2
0
VDS / V =20
80
BUK553-100
20
40
60
80
100
120
140
160
180
Tmb / C
120
110
100
90
80
70
60
50
40
30
20
10
0
WDSS%
0
1
2
BUK553-100A
VSDS / V
30
20
10
0
IF / A
Tj / C = 150
25
L
T.U.T.
VDD
RGS
R 01
VDS
-ID/100
+
-
shunt
VGS
0
W
DSS
=
0.5
LI
D
2
BV
DSS
/(
BV
DSS
-
V
DD
)
April 1993
5
Rev 1.100
Philips Semiconductors
Product Specification
PowerMOS transistor
BUK553-100A/B
Logic level FET
MECHANICAL DATA
Dimensions in mm
Net Mass: 2 g
Fig.17. TO220AB; pin 2 connected to mounting base.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Refer to mounting instructions for TO220 envelopes.
3. Epoxy meets UL94 V0 at 1/8".
10,3
max
3,7
2,8
3,0
3,0 max
not tinned
1,3
max
(2x)
1 2 3
2,4
0,6
4,5
max
5,9
min
15,8
max
1,3
2,54 2,54
0,9 max (3x)
13,5
min
April 1993
6
Rev 1.100
Philips Semiconductors
Product Specification
PowerMOS transistor
BUK553-100A/B
Logic level FET
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1996
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
April 1993
7
Rev 1.100