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Электронный компонент: BUK9830-30

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Philips Semiconductors
Product specification
TrenchMOS
TM
transistor
BUK9830-30
Logic level FET
GENERAL DESCRIPTION
QUICK REFERENCE DATA
N-channel enhancement mode logic
SYMBOL
PARAMETER
MAX.
UNIT
level field-effect power transistor in a
plastic envelope suitable for surface
V
DS
Drain-source voltage
30
V
mounting.
Using
'trench'
I
D
Drain current (DC) T
sp
= 25 C
12.8
A
technology, the device features very
Drain current (DC) T
amb
= 25 C
5.9
A
low on-state resistance and has
P
tot
Total power dissipation
8.3
W
integral zener diodes giving ESD
T
j
Junction temperature
150
C
protection up to 2kV. It is intended for
R
DS(ON)
Drain-source on-state
30
m
use in
automotive and general
resistance
V
GS
= 5 V
purpose switching applications.
PINNING - SOT223
PIN CONFIGURATION
SYMBOL
PIN
DESCRIPTION
1
gate
2
drain
3
source
4
drain (tab)
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DS
Drain-source voltage
-
-
30
V
V
DGR
Drain-gate voltage
R
GS
= 20 k
-
30
V
V
GS
Gate-source voltage
-
-
10
V
I
D
Drain current (DC)
T
sp
= 25 C
-
12.8
A
T
amb
= 25 C
-
5.9
A
I
D
Drain current (DC)
T
sp
= 100 C
-
9
A
T
amb
= 100 C
-
4.1
A
I
DM
Drain current (pulse peak value)
T
sp
= 25 C
-
51
A
T
amb
= 25 C
-
23.6
A
P
tot
Total power dissipation
T
sp
= 25 C
-
8.3
W
T
amb
= 25 C
-
1.8
W
T
stg
, T
j
Storage & operating temperature
-
- 55
150
C
THERMAL RESISTANCES
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
R
th j-sp
Thermal resistance junction to
Mounted on any PCB
12
15
K/W
solder point
R
th j-amb
Thermal resistance junction to
Mounted on PCB of Fig.19
-
70
K/W
ambient
d
g
s
4
1
2
3
December 1997
1
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOS
TM
transistor
BUK9830-30
Logic level FET
ESD LIMITING VALUE
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
C
Electrostatic discharge capacitor
Human body model
-
2
kV
voltage, all pins
(100 pF, 1.5 k
)
STATIC CHARACTERISTICS
T
j
= 25C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
(BR)DSS
Drain-source breakdown
V
GS
= 0 V; I
D
= 0.25 mA;
30
-
-
V
voltage
T
j
= -55C
27
-
-
V
V
GS(TO)
Gate threshold voltage
V
DS
= V
GS
; I
D
= 1 mA
1
1.5
2
V
T
j
= 150C
0.5
-
-
V
T
j
= -55C
-
-
2.3
I
DSS
Zero gate voltage drain current
V
DS
= 30 V; V
GS
= 0 V;
-
0.05
10
A
T
j
= 150C
-
-
500
A
I
GSS
Gate source leakage current
V
GS
=
5 V; V
DS
= 0 V
-
0.02
1
A
T
j
= 150C
-
10
A
V
(BR)GSS
Gate-source breakdown
I
G
=
1 mA;
10
-
-
V
voltage
R
DS(ON)
Drain-source on-state
V
GS
= 5 V; I
D
= 3.2 A
-
24
30
m
resistance
T
j
= 150C
-
-
51
m
DYNAMIC CHARACTERISTICS
T
sp
= 25C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
g
fs
Forward transconductance
V
DS
= 25 V; I
D
= 5.9 A
7
14
-
S
Q
g(tot)
Total gate charge
I
D
= 5.9 A; V
DD
= 24 V; V
GS
= 5 V
-
24
-
nC
Q
gs
Gate-source charge
-
3
-
nC
Q
gd
Gate-drain (Miller) charge
-
11
-
nC
C
iss
Input capacitance
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
-
1050
-
pF
C
oss
Output capacitance
-
270
-
pF
C
rss
Feedback capacitance
-
140
-
pF
t
d on
Turn-on delay time
V
DD
= 15 V; I
D
= 5.9 A;
-
30
45
ns
t
r
Turn-on rise time
V
GS
= 5 V; R
G
= 5
-
80
130
ns
t
d off
Turn-off delay time
Resistive load
-
95
135
ns
t
f
Turn-off fall time
-
40
55
ns
L
d
Internal drain inductance
Measured from contact screw on
-
3.5
-
nH
tab to centre of die
L
d
Internal drain inductance
Measured from drain lead 6 mm
-
4.5
-
nH
from package to centre of die
L
s
Internal source inductance
Measured from source lead 6 mm
-
7.5
-
nH
from package to source bond pad
December 1997
2
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOS
TM
transistor
BUK9830-30
Logic level FET
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
T
j
= 25C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
I
DR
Continuous reverse drain
-
-
40
A
current
I
DRM
Pulsed reverse drain current
-
-
160
A
V
SD
Diode forward voltage
I
F
= 3.2 A; V
GS
= 0 V
-
0.75
1.2
V
I
F
= 5.9 A; V
GS
= 0 V
-
0.85
-
t
rr
Reverse recovery time
I
F
= 5.9 A; -dI
F
/dt = 100 A/
s;
-
100
-
ns
Q
rr
Reverse recovery charge
V
GS
= -10 V; V
R
= 25 V
-
0.4
-
C
AVALANCHE LIMITING VALUE
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
W
DSS
Drain-source non-repetitive
I
D
= 5.9 A; V
DD
25 V;
-
-
60
mJ
unclamped inductive turn-off
V
GS
= 10 V; R
GS
= 50
; T
sp
= 25 C
energy
December 1997
3
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOS
TM
transistor
BUK9830-30
Logic level FET
Fig.1. Normalised power dissipation.
PD% = 100
P
D
/P
D 25 C
= f(T
mb
)
Fig.2. Normalised continuous drain current.
ID% = 100
I
D
/I
D 25 C
= f(T
mb
); conditions: V
GS
5 V
Fig.3. Safe operating area. T
mb
= 25 C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
Fig.4. Transient thermal impedance.
Z
th j-mb
= f(t); parameter D = t
p
/T
Fig.5. Typical output characteristics, T
j
= 25 C.
I
D
= f(V
DS
); parameter V
GS
Fig.6. Typical on-state resistance, T
j
= 25 C.
R
DS(ON)
= f(I
D
); parameter V
GS
0
20
40
60
80
100
120
140
Tmb / C
PD%
Normalised Power Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
1E-07
1E-05
1E-03
1E-01
1E+01
1E+03
BUKX83
t / s
Zth j-amb / (K/W)
1E+02
1E+01
1E+00
1E-01
1E-02
0
0.5
0.2
0.1
0.05
0.02
D =
D =
t
p
t
p
T
T
P
t
D
0
20
40
60
80
100
120
140
Tmb / C
ID%
Normalised Current Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
0
2
4
6
8
10
0
10
20
30
40
50
60
BUK9830-30
VDS / V
ID / A
2.5
3
3.5
4
4.5
5
10
6
VGS / V =
0.1
1
10
100
1000
0.01
0.1
1
10
100
7830-30
VDS / V
ID / A
RDS(ON) = VDS / ID
tp = 10 us
100 us
1 ms
10 ms
100 ms
DC
0
10
20
30
40
50
60
0
9830-30
ID / A
RDS(ON) / mOhm
10
20
30
40
50
60
VGS / V =
10
6
5
4.5
4
3.5
3
December 1997
4
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOS
TM
transistor
BUK9830-30
Logic level FET
Fig.7. Typical transfer characteristics.
I
D
= f(V
GS
) ; conditions: V
DS
= 25 V; parameter T
j
Fig.8. Typical transconductance, T
j
= 25 C.
g
fs
= f(I
D
); conditions: V
DS
= 25 V
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)
/R
DS(ON)25 C
= f(T
j
); I
D
= 3.2 A; V
GS
= 5 V
Fig.10. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= V
GS
Fig.11. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 C; V
DS
= V
GS
Fig.12. Typical capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
0
1
2
3
4
5
6
0
10
20
30
40
50
60
9830-30
VGS / V
ID / A
Tj / C = 25
150
BUK959-60
-100
-50
0
50
100
150
200
0
0.5
1
1.5
2
2.5
Tj / C
VGS(TO) / V
max.
typ.
min.
0
10
20
30
40
50
60
0
10
20
9830-30
ID / A
gfs / S
Tj / C = 25
150
0
0.5
1
1.5
2
2.5
3
1E-05
1E-05
1E-04
1E-03
1E-02
1E-01
Sub-Threshold Conduction
2%
typ
98%
-50
0
50
100
150
0
0.5
1
1.5
2
SOT223 30V Trench
Tj / C
a
Normalised RDS(ON) = f(Tj)
0.1
1
10
100
100
1000
10000
9528-30
VDS / V
C / pF
Ciss
Coss
Crss
December 1997
5
Rev 1.100