DATA SHEET
Product specification
File under Integrated Circuits, IC04
January 1995
INTEGRATED CIRCUITS
HEF40106B
gates
Hex inverting Schmitt trigger
For a complete data sheet, please also download:
The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
January 1995
2
Philips Semiconductors
Product specification
Hex inverting Schmitt trigger
HEF40106B
gates
DESCRIPTION
Each circuit of the HEF40106B functions as an inverter
with Schmitt-trigger action. The Schmitt-trigger switches at
different points for the positive and negative-going input
signals. The difference between the positive-going voltage
(V
P
) and the negative-going voltage (V
N
) is defined as
hysteresis voltage (V
H
).
This device may be used for enhanced noise immunity or
to "square up" slowly changing waveforms.
Fig.1 Functional diagram.
FAMILY DATA, I
DD
LIMITS category GATES
See Family Specifications
HEF40106BP(N): 14-lead DIL; plastic
(SOT27-1)
HEF40106BD(F):
14-lead DIL; ceramic (cerdip)
(SOT73)
HEF40106BT(D):
14-lead SO; plastic
(SOT108-1)
( ): Package Designator North America
Fig.2 Pinning diagram.
Fig.3 Logic diagram (one inverter).
January 1995
3
Philips Semiconductors
Product specification
Hex inverting Schmitt trigger
HEF40106B
gates
DC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
C
V
DD
V
SYMBOL
MIN.
TYP.
MAX.
Hysteresis
5
0,5
0,8
V
voltage
10
V
H
0,7
1,3
V
15
0,9
1,8
V
Switching levels
5
2
3,0
3,5
V
positive-going
10
V
P
3,7
5,8
7
V
input voltage
15
4,9
8,3
11
V
negative-going
5
1,5
2,2
3
V
input voltage
10
V
N
3
4,5
6,3
V
15
4
6,5
10,1
V
Fig.4 Transfer characteristic.
Fig.5
Waveforms showing definition of
V
P
, V
N
and V
H
, where V
N
and V
P
are
between limits of 30% and 70%.
January 1995
4
Philips Semiconductors
Product specification
Hex inverting Schmitt trigger
HEF40106B
gates
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
C; C
L
= 50 pF; input transition times
20 ns
V
DD
V
SYMBOL
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
I
n
O
n
5
90
180
ns
63 ns
+
(0,55 ns/pF) C
L
HIGH to LOW
10
t
PHL
35
70
ns
24 ns
+
(0,23 ns/pF)
15
30
60
ns
22 ns
+
(0,16 ns/pF) C
L
5
75
150
ns
48 ns
+
(0,55 ns/pF) C
L
LOW to HIGH
10
t
PLH
35
70
ns
24 ns
+
(0,23 ns/pF) C
L
15
30
60
ns
22 ns
+
(0,16 ns/pF) C
L
Output transition times
5
60
120
ns
10 ns
+
(1,0 ns/pF) C
L
HIGH to LOW
10
t
THL
30
60
ns
9 ns
+
(0,42 ns/pF) C
L
15
20
40
ns
6 ns
+
(0,28 ns/pF) C
L
5
60
120
ns
10 ns
+
(1,0 ns/pF) C
L
LOW to HIGH
10
t
TLH
30
60
ns
9 ns
+
(0,42 ns/pF) C
L
15
20
40
ns
6 ns
+
(0,28 ns/pF) C
L
V
DD
V
TYPICAL FORMULA FOR P (
W)
Dynamic power
5
2 300 f
i
+
(f
o
C
L
)
V
DD
2
where
dissipation per
10
9 000 f
i
+
(f
o
C
L
)
V
DD
2
f
i
= input freq. (MHz)
package (P)
15
20 000 f
i
+
(f
o
C
L
)
V
DD
2
f
o
= output freq. (MHz)
C
L
= load capacitance (pF)
(f
o
C
L
) = sum of outputs
V
DD
= supply voltage (V)
January 1995
5
Philips Semiconductors
Product specification
Hex inverting Schmitt trigger
HEF40106B
gates
Fig.6
Typical drain current as a function of input
voltage; V
DD
= 5 V; T
amb
= 25
C.
Fig.7
Typical drain current as a function of input
voltage; V
DD
=10 V; T
amb
= 25
C.
Fig.8
Typical drain current as a function of input
voltage; V
DD
= 15 V; T
amb
= 25
C.
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