DATA SHEET
Product specification
File under Integrated Circuits, IC04
January 1995
INTEGRATED CIRCUITS
HEF4512B
MSI
8-input multiplexer with 3-state
output
For a complete data sheet, please also download:
The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
January 1995
2
Philips Semiconductors
Product specification
8-input multiplexer with 3-state output
HEF4512B
MSI
DESCRIPTION
The HEF4512B is an 8-input multiplexer with 8 binary
inputs (I
0
to I
7
), an enable input (E) and an output enable
input (EO). One of eight binary inputs is selected by select
inputs S
0
, S
1
and S
2
, and is routed to the output O. A HIGH
on EO causes O to assume a high impedance OFF-state,
regardless of other input conditions. This allows the output
to interface directly with bus oriented systems (3-state).
When the active LOW enable (E) is HIGH, it forces the
output LOW provided EO is LOW. By proper manipulation
of the inputs, the device can provide any logic functions of
four variables. It cannot be used to multiplex analogue
signals.
Fig.1 Functional diagram.
HEF4512BP(N):
16-lead DIL; plastic
(SOT38-1)
HEF4512BD(F):
16-lead DIL; ceramic (cerdip)
(SOT74)
HEF4512BT(D):
16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
Fig.2 Pinning diagram.
PINNING
FAMILY DATA, I
DD
LIMITS category MSI
See Family Specifications
S
0
, S
1
, S
2
select inputs
EO
output enable (active LOW)
E
enable (active LOW)
I
0
to I
7
multiplexer inputs
O
multiplexer output
January 1995
3
Philips Semiconductors
Product specification
8-input multiplexer with 3-state output
HEF4512B
MSI
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Fig.3 Logic diagram.
January 1995
4
Philips Semiconductors
Product specification
8-input multiplexer with 3-state output
HEF4512B
MSI
TRUTH TABLE
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
Z = high impedance OFF-state
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
C; input transition times
20 ns
INPUTS
OUTPUT
EO
E
S
2
S
1
S
0
I
0
I
1
I
2
I
3
I
4
I
5
I
6
I
7
O
L
H
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
X
X
X
X
X
X
X
L
L
L
L
L
L
H
X
X
X
X
X
X
X
H
L
L
L
L
H
X
L
X
X
X
X
X
X
L
L
L
L
L
H
X
H
X
X
X
X
X
X
H
L
L
L
H
L
X
X
L
X
X
X
X
X
L
L
L
L
H
L
X
X
H
X
X
X
X
X
H
L
L
L
H
H
X
X
X
L
X
X
X
X
L
L
L
L
H
H
X
X
X
H
X
X
X
X
H
L
L
H
L
L
X
X
X
X
L
X
X
X
L
L
L
H
L
L
X
X
X
X
H
X
X
X
H
L
L
H
L
H
X
X
X
X
X
L
X
X
L
L
L
H
L
H
X
X
X
X
X
H
X
X
H
L
L
H
H
L
X
X
X
X
X
X
L
X
L
L
L
H
H
L
X
X
X
X
X
X
H
X
H
L
L
H
H
H
X
X
X
X
X
X
X
L
L
L
L
H
H
H
X
X
X
X
X
X
X
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
Z
V
DD
V
TYPICAL FORMULA FOR P (
W)
Dynamic power
5
500 f
i
+
(f
o
C
L
)
V
DD
2
where
dissipation per
10
2100 f
i
+
(f
o
C
L
)
V
DD
2
f
i
= input freq. (MHz)
package (P)
15
5800 f
i
+
(f
o
C
L
)
V
DD
2
f
o
= output freq. (MHz)
C
L
= load capacitance (pF)
(f
o
C
L
) = sum of outputs
V
DD
= supply voltage (V)
January 1995
5
Philips Semiconductors
Product specification
8-input multiplexer with 3-state output
HEF4512B
MSI
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
C; C
L
= 50 pF; input transition times
20 ns
V
DD
V
SYMBOL
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
I
n
O
5
100
200
ns
73 ns
+
(0,55 ns/pF) C
L
HIGH to LOW
10
t
PHL
40
80
ns
29 ns
+
(0,23 ns/pF) C
L
15
30
60
ns
22 ns
+
(0,16 ns/pF) C
L
5
100
200
ns
73 ns
+
(0,55 ns/pF) C
L
LOW to HIGH
10
t
PLH
40
80
ns
29 ns
+
(0,23 ns/pF) C
L
15
30
60
ns
22 ns
+
(0,16 ns/pF) C
L
S
n
O
5
140
280
ns
113 ns
+
(0,55 ns/pF) C
L
HIGH to LOW
10
t
PHL
55
110
ns
44 ns
+
(0,23 ns/pF) C
L
15
40
80
ns
32 ns
+
(0,16 ns/pF) C
L
5
150
300
ns
123 ns
+
(0,55 ns/pF) C
L
LOW to HIGH
10
t
PLH
60
120
ns
49 ns
+
(0,23 ns/pF) C
L
15
40
80
ns
32 ns
+
(0,16 ns/pF) C
L
E
O
5
60
120
ns
33 ns
+
(0,55 ns/pF) C
L
HIGH to LOW
10
t
PHL
25
50
ns
14 ns
+
(0,23 ns/pF) C
L
15
20
40
ns
12 ns
+
(0,16 ns/pF) C
L
5
55
110
ns
28 ns
+
(0,55 ns/pF) C
L
LOW to HIGH
10
t
PLH
25
50
ns
14 ns
+
(0,23 ns/pF) C
L
15
20
40
ns
12 ns
+
(0,16 ns/pF) C
L
Output transition times
5
60
120
ns
10 ns
+
(1,0 ns/pF) C
L
HIGH to LOW
10
t
THL
30
60
ns
9 ns
+
(0,42 ns/pF) C
L
15
20
40
ns
6 ns
+
(0,28 ns/pF) C
L
5
60
120
ns
10 ns
+
(1,0 ns/pf) C
L
LOW to HIGH
10
t
TLH
30
60
ns
9 ns
+
(0,42 ns/pF) C
L
15
20
40
ns
6 ns
+
(0,28 ns/pF) C
L
3-state propagation delays
Output disable times
EO
O
5
35
70
ns
HIGH
10
t
PHZ
20
40
ns
15
15
30
ns
5
35
70
ns
LOW
10
t
PLZ
15
30
ns
15
10
20
ns
Output enable times
EO
O
5
35
70
ns
HIGH
10
t
PZH
15
30
ns
15
10
20
ns
January 1995
6
Philips Semiconductors
Product specification
8-input multiplexer with 3-state output
HEF4512B
MSI
APPLICATION INFORMATION
Some examples of applications for the HEF4512B are:
Signal gating
Digital multiplexing
Number sequence generation
5
35
70
ns
LOW
10
t
PZL
20
40
ns
15
15
30
ns
V
DD
V
SYMBOL
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
January 1995
7
Philips Semiconductors
Product specification
8-input multiplexer with 3-state output
HEF4512B
MSI
TRUTH TABLE for Fig. 4
A
4
A
3
A
2
A
1
A
0
INPUT CONN.
TO OUTPUT
L
L
L
L
L
0
via
IC
0
L
L
L
L
H
1
L
L
L
H
L
2
L
L
L
H
H
3
L
L
H
L
L
4
L
L
H
L
H
5
L
L
H
H
L
6
L
L
H
H
H
7
L
H
L
L
L
8
via
IC
1
L
H
L
L
H
9
L
H
L
H
L
10
L
H
L
H
H
11
L
H
H
L
L
12
L
H
H
L
H
13
L
H
H
H
L
14
L
H
H
H
H
15
H
L
L
L
L
16
via
IC
2
H
L
L
L
H
17
H
L
L
H
L
18
H
L
L
H
H
19
H
L
H
L
L
20
H
L
H
L
H
21
H
L
H
H
L
22
H
L
H
H
H
23
H
H
L
L
L
24
via
IC
3
H
H
L
L
H
25
H
H
L
H
L
26
H
H
L
H
H
27
H
H
H
L
L
28
H
H
H
L
H
29
H
H
H
H
L
30
H
H
H
H
H
31
Fig.4
32-input multiplexer using 4
HEF4512B
and 1
HEF4011B. The input is selected
by 5-bit address (A
4
to A
0
) and presented at
the output.
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