DATA SHEET
Product specification
File under Integrated Circuits, IC04
January 1995
INTEGRATED CIRCUITS
HEF4520B
MSI
Dual binary counter
For a complete data sheet, please also download:
The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
January 1995
2
Philips Semiconductors
Product specification
Dual binary counter
HEF4520B
MSI
DESCRIPTION
The HEF4520B is a dual 4-bit internally synchronous
binary counter. The counter has an active HIGH clock
input (CP
0
) and an active LOW clock input (CP
1
), buffered
outputs from all four bit positions (O
0
to O
3
) and an active
HIGH overriding asynchronous master reset input (MR).
The counter advances on either the LOW to HIGH
transition of the CP
0
input if CP
1
is HIGH or the HIGH to
LOW transition of the CP
1
input if CP
0
is low. Either CP
0
or
CP
1
may be used as the clock input to the counter and the
other clock input may be used as a clock enable input. A
HIGH on MR resets the counter (O
0
to O
3
= LOW)
independent of CP
0
, CP
1
.
Schmitt-trigger action in the clock input makes the circuit
highly tolerant to slower clock rise and fall times.
Fig.1 Functional diagram.
HEF4520BP(N):
16-lead DIL; plastic
(SOT38-1)
HEF4520BD(F):
16-lead DIL; ceramic (cerdip)
(SOT74)
HEF4520BT(D):
16-lead SO; plastic (SOT109-1)
(SOT109-1)
( ): Package Designator North America
Fig.2 Pinning diagram.
PINNING
FAMILY DATA, I
DD
LIMITS category MSI
See Family Specifications
CP
0A
, CP
0B
clock inputs (L to H triggered)
CP
1A
, CP
1B
clock inputs (H to L triggered)
MR
A
, MR
B
master reset inputs
O
0A
to O
3A
outputs
O
0B
to O
3B
outputs
January 1995
3
Philips Semiconductors
Product specification
Dual binary counter
HEF4520B
MSI
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
_
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
FUNCTION TABLE
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
= positive-going transition
= negative-going transition
CP
0
CP
1
MR
MODE
H
L
counter advances
L
L
counter advances
X
L
no change
X
L
no change
L
L
no change
H
L
no change
X
X
H
O
0
to O
3
= LOW
Fig.3 Logic diagram (one counter).
January 1995
4
Philips Semiconductors
Product specification
Dual binary counter
HEF4520B
MSI
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
C; C
L
= 50 pF; input transition times
20 ns
V
DD
V
SYMBOL
MIN.
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
CP
0
, CP
1
O
n
5
110
220
ns
83 ns
+
(0,55 ns/pF) C
L
HIGH to LOW
10
t
PHL
50
100
ns
39 ns
+
(0,23 ns/pF) C
L
15
40
80
ns
32 ns
+
(0,16 ns/pF) C
L
5
110
220
ns
83 ns
+
(0,55 ns/pF) C
L
LOW to HIGH
10
t
PLH
50
100
ns
39 ns
+
(0,23 ns/pF) C
L
15
40
80
ns
32 ns
+
(0,16 ns/pF) C
L
MR
O
n
5
75
150
ns
48 ns
+
(0,55 ns/pF) C
L
HIGH to LOW
10
t
PHL
35
70
ns
24 ns
+
(0,23 ns/pF) C
L
15
25
50
ns
17 ns
+
(0,16 ns/pF) C
L
Output transition
times
5
60
120
ns
10 ns
+
(1,0 ns/pF) C
L
HIGH to LOW
10
t
THL
30
60
ns
9 ns
+
(0,42 ns/pF) C
L
15
20
40
ns
6 ns
+
(0,28 ns/pF) C
L
5
60
120
ns
10 ns
+
(1,0 ns/pF) C
L
LOW to HIGH
10
t
TLH
30
60
ns
9 ns
+
(0,42 ns/pF) C
L
15
20
40
ns
6 ns
+
(0,28 ns/pF) C
L
Minimum CP
0
5
60
30
ns
see also waveforms
Figs 4 and 5
pulse width; LOW
10
t
WCPL
30
15
ns
15
20
10
ns
Minimum CP
1
5
60
30
ns
pulse width; HIGH
10
t
WCPH
30
15
ns
15
20
10
ns
Minimum MR
5
30
15
ns
pulse width; HIGH
10
t
WMRH
20
10
ns
15
16
8
ns
Recovery time
5
50
25
ns
for MR
10
t
RMR
30
15
ns
15
20
10
ns
Set-up times
5
50
25
ns
CP
0
CP
1
10
t
su
30
15
ns
15
20
10
ns
5
50
25
ns
CP
1
CP
0
10
t
su
30
15
ns
15
20
10
ns
Maximum clock
5
8
16
MHz
pulse frequency
10
f
max
15
30
MHz
15
20
40
MHz
January 1995
5
Philips Semiconductors
Product specification
Dual binary counter
HEF4520B
MSI
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
C; input transition times
20 ns
V
DD
V
TYPICAL FORMULA FOR P (
W)
Dynamic power
5
850 f
i
+
(f
o
C
L
)
V
DD
2
where
dissipation per
10
3 800 f
i
+
(f
o
C
L
)
V
DD
2
f
i
= input freq. (MHz)
package (P)
15
10 200 f
i
+
(f
o
C
L
)
V
DD
2
f
o
= output freq. (MHz)
C
L
= load capacitance (pF)
(f
o
C
L
) = sum of outputs
V
DD
= supply voltage (V)
Fig.4 Waveforms showing recovery time for MR; minimum CP
0
, CP
1
and MR pulse widths.
January 1995
6
Philips Semiconductors
Product specification
Dual binary counter
HEF4520B
MSI
Fig.5 Waveforms showing set-up times for CP
0
to CP
1
and CP
1
to CP
0
, and propagation delays.
January 1995
7
Philips Semiconductors
Product specification
Dual binary counter
HEF4520B
MSI
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
_
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
Fig.6 Timing diagram.
PDF 
ZIP