Document Outline
- DESCRIPTION
- FEATURES
- APPLICATIONS
- SIMPLIFIED SYSTEM DIAGRAM
- ORDERING INFORMATION
- PIN CONFIGURATION
- PIN DESCRIPTION
- MAXIMUM RATINGS
- ELECTRICAL CHARACTERISTICS
- TYPICAL PERFORMANCE CURVES
- TECHNICAL DISCUSSION
- THERMAL DESIGN
- APPLICATION INFORMATION
- TEST CIRCUITS
- PACKING METHOD
- PACKAGE OUTLINE
- REVISION HISTORY
- Data sheet status
- Definitions
- Disclaimers
Philips
Semiconductors
NE57811
Advanced DDR memory termination power
with shutdown
Product data
Supersedes data of 2002 Jul 16
2003 Apr 02
INTEGRATED CIRCUITS
Philips Semiconductors
Product data
NE57811
Advanced DDR memory termination power
with shutdown
2
2003 Apr 02
DESCRIPTION
The NE57811 is designed to provide power for termination of a
Double Data Rate (DDR) SDRAM memory bus. It significantly
reduces parts count, board space, and overall system cost
compared to previous solutions.
The NE57811 DDR termination regulator maintains an output
voltage (DDR reference bus voltage) that is one-half that of the RAM
supply voltage. It is capable of providing up to
3.5 A for sustained
periods. Overcurrent limiting protects the NE57811 from inrush
currents at start-up, and overtemperature shutdown protects the
device in extreme temperature situations.
The SPAK-5 (SOT756) package is thermally robust for flexibility of
thermal design. Because the NE57811 is a linear regulator, no
external inductors or switching FETs are necessary. Fast response
to load changes reduces the need for output capacitors.
FEATURES
Fast transient response time
Overtemperature protection
Overcurrent protection
Commercial (0
C to +70
C) temperature range
Reduced need for external components
(switching FETs, inductors, decoupling capacitors)
Internal divider maintains termination voltage at
1
/
2
memory
supply voltage
Reference out for other memory and control components
Shutdown pin that may be used to put the device into low power
mode
Compatible with DDR-I (V
DD
= 2.5 V) or DDR-II (V
DD
= 1.8 V)
SDRAM systems
APPLICATIONS
Desktop microcomputer systems
Workstations
Servers
Game machines
Set top boxes
Embedded systems
Digital video recorders
SIMPLIFIED SYSTEM DIAGRAM
DIMM0
DIMM1
Control & Address
Data
NE57811
SHTDWN
(optional)
RefOut
MEMORY
CONTROLLER
R
S
20
(typical)
R
T
27
(typical)
TERMINATION
POWER
V
TT
0.1
F
100
F
SL01690
Figure 1.
Simplified system diagram.
Philips Semiconductors
Product data
NE57811
Advanced DDR memory termination power
with shutdown
2003 Apr 02
3
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
TEMPERATURE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
RANGE
NE57811S
SPAK-5
plastic single-ended surface mounted package; 5 leads
SOT756
0
C to +70
C
Part number marking
The package is marked with the part number under the logo. The
second line indicates wafer lot number. The first four characters of
the third line contain a date code. The remaining characters are
manufacturing codes.
PIN CONFIGURATION
1
2
3
4
5
SL01691
V
TT
V
DD
V
SS
SHTDWN
RefOut
Figure 2.
Pin configuration.
PIN DESCRIPTION
PIN
SYMBOL
DESCRIPTION
1
V
TT
Regulated terminator voltage
2
V
DD
Power supply
3
V
SS
Circuit ground (Note 1)
4
SHTDWN
Shutdown
5
RefOut
Reference voltage out
NOTE:
1. The thermal backside pad connects electrically to V
SS
internally
and provides enhancement to thermal conductivity, but it should
not be used as the primary connection to ground. Device
specifications apply to use of the V
SS
pin as the connection to
ground.
MAXIMUM RATINGS
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
V
DD
V
DD
to V
SS
voltage
0.3
+3.6
V
T
amb
Operating ambient temperature
0
+70
C
T
stg
Storage temperature
40
+165
C
T
j
Junction temperature
160
C
R
th(j-a)
Thermal resistance, junction to ambient
16.5
C/W
P
D
Power dissipation (Note 1)
3.3
W
NOTE:
1. Tested on a minimum footprint on a four-layer PCB per JEDEC specification JESD51-7.
Philips Semiconductors
Product data
NE57811
Advanced DDR memory termination power
with shutdown
2003 Apr 02
4
ELECTRICAL CHARACTERISTICS
T
amb
= 0
C to +70
C, V
DD
= 2.5 V; I
TT
= 3.5 A to +3.5 A, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
TT
Output voltage
V
DD
/2
V
V
ACC
Output voltage accuracy (Note 4)
I
TT
= 0 A
15
+15
mV
V
DD
Supply voltage
1.6
3.6
V
I
Q(op)
Supply current
I
TT
= 0 A
14
30
mA
I
Q(SD)
Standby quiescent current
Standby asserted
1.2
1.35
mA
I
TT
Output current
V
DD
= 2.5 V
V
DD
3.6 V
3.5
+3.5
A
V
DD
= 1.6 V
2.5
+2.5
A
V
TT
Load regulation
I
TT
=
1.0 A
6
mV
I
TT
=
3.5 A
18
+18
mV
C
LOAD
Load capacitance (Note 2)
Stable operation
100
F
Reference Out
RefOut
Voltage reference out (Note 3)
IrefOut = 0 A; source or sink
15
V
DD
/2
+15
mV
IrefOut
Reference Out current max
2.2
3
mA
C
LOAD
Load capacitance
Stable operation
0.1
F
Power Stage
I
lim
Current limit
3.6
4.5
5.6
A
T
lim
Temperature shutdown
+150
C
Temperature shutdown hysteresis
20
C
NOTES:
1. Limits are 100% production tested at 25
C. Limits over the operating temperature range are guaranteed through correlation using Statistical
Quality Control (SQC) methods.
2. Ceramic capacitors only. Low ESR electrolytic capacitors are not necessary.
3. RefOut voltage referenced to
1
/
2
V
DD
.
4. V
ACC
= V
TT
V
DD
/2.
Philips Semiconductors
Product data
NE57811
Advanced DDR memory termination power
with shutdown
2003 Apr 02
5
TYPICAL PERFORMANCE CURVES
SL01687
Figure 3.
V
TT
transient response
(output filter 50
F ceramic)
SL01688
Figure 4.
V
DD
-to-V
TT
response
(output filter 50
F ceramic)
1.200
1.210
1.220
1.230
1.240
1.250
1.260
1.270
1.280
1.290
1.300
6
5
4
3
2
1
0
1
2
3
4
5
6
Amps
V
olts
OUTPUT SINK
OUTPUT SOURCE
NORMAL OPERATING REGION
SL01684
Figure 5.
Typical V
TT
versus output current (V
DD
= 2.5 V @ 25
C)
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