Philips
Semiconductors
PCA9544
4-channel I
2
C multiplexer and interrupt
controller
1999 Oct 07
INTEGRATED CIRCUITS
Product specification
Supersedes data of 1999 Apr 01
Philips Semiconductors
Product specification
PCA9544
4-channel I
2
C multiplexer and interrupt controller
2
1999 Oct 07
8532178 22487
FEATURES
1-of-4 bi-directional translating multiplexer
Channel selection via I
2
C bus
Operating supply voltage 2.5 to 3.6 V
Operating temperature range 0
C to 70
C
Power-up with all multiplexer channels deselected
3 address pins, allowing up to 8 devices on the I
2
C bus
Low on resistance
DESCRIPTION
The PCA9544 is a 1-of-4 bi-directional translating multiplexer,
controlled via the I
2
C bus. The SCL/SDA upstream pair fans out to
four SCx/SDx downstream pairs, or channels. Only one SCx/SDx
channel is selected at a time, determined by the contents of the
programmable control register. Four interrupt inputs, one for each of
the SCx/SDx downstream pair, are provided. One interrupt output,
which acts as an AND of the four interrupt inputs, is provided. All I/O
pins are 5 V tolerant.
The pass gates of the multiplexer are constructed such that the V
DD
pin can be used to limit the maximum high voltage which will be
passed by the PCA9544. This allows the use of different bus
voltages on each SCx/SDx pair, so that 3.3 V parts can
communicate with 5 V parts without any additional protection.
External pull-up resistors can pull the bus up to the desired voltage
level for this channel.
PIN CONFIGURATION
A0
A1
A2
INT0
SD1
V
DD
SDA
SCL
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
SD0
SC0
INT1
INT
SC3
SD3
INT3
SC2
9
12
10
11
SC1
VSS
SD2
INT2
SW00373
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1
A0
Address input 0
2
A1
Address input 1
3
A2
Address input 2
4
INT0
Interrupt input 0
5
SD0
Serial data 0
6
SC0
Serial clock 0
7
INT1
Interrupt input 1
8
SD1
Serial data 1
9
SC1
Serial clock 1
10
VSS
Supply ground
11
INT2
Interrupt input 2
12
SD2
Serial data 2
13
SC2
Serial clock 2
14
INT3
Interrupt input 3
15
SD3
Serial data 3
16
SC3
Serial clock 3
17
INT
Interrupt output
18
SCL
Serial clock line
19
SDA
Serial data line
20
V
DD
Supply voltage
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
DRAWING NUMBER
20-Pin Plastic TSSOP
0
C to +70
C
PCA9544 PW DH
SOT360-1
Philips Semiconductors
Product specification
PCA9544
4-channel I
2
C multiplexer and interrupt controller
1999 Oct 07
3
BLOCK DIAGRAM
SW00379
SC0
SC1
SC2
SC3
SD0
SD1
SD2
SD3
V
SS
SCL
V
DD
SDA
INPUT
FILTER
POWER-ON
RESET
I
2
C-BUS
CONTROL
A0
A2
INT[03]
INT LOGIC
INT
A1
Philips Semiconductors
Product specification
PCA9544
4-channel I
2
C multiplexer and interrupt controller
1999 Oct 07
4
CHANNEL SELECTION
A SC0x/SD0x downstream pair, or channel, is selected by the
contents of the control register. This register is written after the
PCA9544 has been addressed. The 3 LSBs of the control byte are
used to determine which channel is to be selected. When a channel
is selected, the channel will become active after a stop condition has
been placed on the I
2
C bus. This ensures that all SCx/SDx lines will
be in a HIGH state when the channel is made active, so that no
false conditions are generated at the time of connection.
CONTROL BYTE
SELECTED
7
6
5
4
3
2
1
0
CHANNEL
X
X
X
X
X
0
X
X
none
X
X
X
X
X
1
0
0
0 (SC0/SD0)
X
X
X
X
X
1
0
1
1 (SC1/SD1)
X
X
X
X
X
1
1
0
2 (SC2/SD2)
X
X
X
X
X
1
1
1
3 (SC3/SD3)
CONTROL REGISTER
INT2 INT1
INT0
B2 B1 B0
Channel select bits
Interrupt bits
INT3
SW00386
X
(read only)
(read/write)
6
5
4
2
1
0
7
3
POWER-ON RESET
During power-up, the control register defaults to all zeroes causing
all the channels to be deselected.
INTERRUPT HANDLING
The PCA9544 provides 4 interrupt inputs, one for each channel and
one open drain interrupt output. When an interrupt is generated by any
device, it will be detected by the PCA9544 and the interrupt output
will be driven LOW. The channel need not be active for detection of
the interrupt. A bit is also set in the control byte. Bits 4 7 of the
control byte correspond to channels 0 3 of the PCA9544,
respectively. Therefore, if an interrupt is generated by any device
connected to channel 2, then bit 6 will be set in the control register.
Likewise, an interrupt on any device connected to channel 3 would
cause bit 7 of the control register to be set. The master can then
address the PCA 9544 and read the contents of the control byte to
determine which channel contains the device generating the interrupt.
The master can then reconfigure the PCA9544 to select this
channel, and locate the device generating the interrupt and clear it.
The interrupt clears when the device originating the interrupt clears.
It should be noted that more than one device can be providing an
interrupt on a channel, so it is up to the master to ensure that all
devices on a channel are interrogated for an interrupt.
7
6
5
4
3
2
1
0
INTERRUPTING
CHANNEL
0
0
0
1
X
X
X
X
0 (SC0/SD0)
0
0
1
0
X
X
X
X
1 (SC1/SD1)
0
1
0
0
X
X
X
X
2 (SC2/SD2)
1
0
0
0
X
X
X
X
3 (SC3/SD3)
Philips Semiconductors
Product specification
PCA9544
4-channel I
2
C multiplexer and interrupt controller
1999 Oct 07
5
CHARACTERISTICS OF THE I
2
C-BUS
The I
2
C-bus is for 2-way, 2-line communication between different ICs
or modules. The two lines are a serial data line (SDA) and a serial
clock line (SCL). Both lines must be connected to a positive supply
via a pull-up resistor when connected to the output stages of a device.
Data transfer may be initiated only when the bus is not busy.
Bit transfer
One data bit is transferred during each clock pulse. The data on the
SDA line must remain stable during the HIGH period of the clock
pulse as changes in the data line at this time will be interpreted as
control signals (see FIgure 1).
SDA
SCL
SW00363
data line
stable;
data valid
change
of data
allowed
Figure 1. Bit transfer
Start and stop conditions
Both data and clock lines remain HIGH when the bus is not busy. A
HIGH-to-LOW transition of the data line, while the clock is HIGH is
defined as the start condition (S). A LOW-to-HIGH transition of the
data line while the clock is HIGH is defined as the stop condition (P)
(see Figure 2).
System configuration
A device generating a message is a `transmitter', a device receiving
is the `receiver'. The device that controls the message is the
`master' and the devices which are controlled by the master are the
`slaves' (see Figure 3).
SDA
SCL
SW00365
S
P
SDA
SCL
START condition
STOP condition
Figure 2. Definition of start and stop conditions
MASTER
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER/
RECEIVER
SDA
SCL
SW00366
I
2
C
MULTIPLEXER
SLAVE
Figure 3. System configuration
Philips Semiconductors
Product specification
PCA9544
4-channel I
2
C multiplexer and interrupt controller
1999 Oct 07
6
Acknowledge
The number of data bytes transferred between the start and the stop conditions from transmitter to receiver is not limited. Each byte of eight bits
is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter whereas the master generates an
extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a master must generate an
acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down
the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock
pulse, set-up and hold times must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of
the slave. In this event, the transmitter must leave the data line HIGH to enable the master to generate a stop condition.
DATA OUTPUT
BY TRANSMITTER
SCL FROM
MASTER
SW00368
DATA OUTPUT
BY RECEIVER
1
2
8
9
S
START condition
clock pulse for
acknowledgement
acknowledge
not acknowledge
Figure 4. Acknowledgement on the I
2
C-bus
0
A2
A1
A0
slave address
fixed
hardware selectable
SW00453
1
1
1
Figure 5. Slave address
Philips Semiconductors
Product specification
PCA9544
4-channel I
2
C multiplexer and interrupt controller
1999 Oct 07
7
1
2
SCL
SDA
3
4
5
6
7
8
SDA
S
0
A
A
1
1
1
0
A2
A1 A0
SLAVE ADDRESS
start condition
R/W
acknowledge
from slave
acknowledge
from slave
t
pv
NEW CHANNEL
9
B0
CONTROL REGISTER
PREVIOUS CHANNEL
INT0
P
SW00377
1
2
3
4
5
6
7
8
9
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
B1
INT1
B2
INT2
X
INT3
Figure 6. WRITE control register
SDA
S
1
A
NA
1
1
1
0
A2 A1 A0
start condition
R/W
acknowledge
from slave
CONTROL REGISTER
P
stop condition
last byte
SW00378
SLAVE ADDRESS
no acknowledge
from master
B0
INT0
B1
INT1
B2
INT2
X
INT3
Figure 7. READ control register
Philips Semiconductors
Product specification
PCA9544
4-channel I
2
C multiplexer and interrupt controller
1999 Oct 07
8
ABSOLUTE MAXIMUM RATINGS
1, 2
In accordance with the Absolute Maximum Rating System (IEC 134).Voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
DD
DC supply voltage
0.5 to +7.0
V
V
I
DC input voltage
0.5 to +7.0
V
I
I
DC input current
20
mA
I
O
DC output current
25
mA
I
DD
Supply current
100
mA
I
SS
Supply current
100
mA
P
tot
total power dissipation
400
mW
T
stg
Storage temperature range
60 to +150
C
T
amb
Operating ambient temperature
0 to +70
C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
C.
DC CHARACTERISTICS
V
DD
= 2.5 to 3.6 V; V
SS
= 0 V; T
amb
= 0
C to +70
C; unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Supply
VDDQn
V
DD
Supply voltage
2.5
3.6
V
I
DD
Supply current
Operating mode; V
DD
= 3.6 V;
no load; V
I
= V
DD
or V
SS
;
f
SCL
= 100 kHz
20
100
A
I
stb
Standby current
Standby mode; V
DD
= 3.6 V;
no load; V
I
= V
DD
or V
SS
2.5
100
A
V
POR
Power-on reset voltage
V
DD
= 3.6 V; no load;
V
I
= V
DD
or V
SS
1.3
2.1
V
Input SCL; input/output SDA
V
IL
LOW level input voltage
0.5
0.3 V
DD
V
V
IH
HIGH level input voltage
0.7 V
DD
6
V
I
OL
LOW level output current
V
OL
= 0.4 V
3
mA
I
OL
LOW level out ut current
V
OL
= 0.6 V
6
mA
I
L
Leakage current
V
I
= V
DD
or V
SS
1
+1
A
C
i
Input capacitance
V
I
= V
SS
13
pF
Select inputs A0 to A2 / INT0 to INT3
V
IL
LOW level input voltage
0.5
+0.3 V
DD
V
V
IH
HIGH level input voltage
0.7 V
DD
V
DD
+ 0.5
V
I
LI
Input leakage current
pin at V
DD
or V
SS
1
+1
A
Pass Gate
R
ON
Switch resistance
V
CC
= 3.67 V, V
O
= 0.4 V, I
O
= 15 mA
5
20
30
R
ON
Switch resistance
V
CC
= 2.3 to 2.7 V, V
O
= 0.4V, I
O
= 10 mA
7
26
55
V
swin
= V
DD
= 3.3 V; I
swout
= 100
A
2.2
V
P
Switch output voltage
V
swin
= V
DD
= 3.0 to 3.6 V; I
swout
= 100
A
1.6
2.8
V
V
Pass
Switch out ut voltage
V
swin
= V
DD
= 2.5 V; I
swout
= 100
A
1.5
V
V
swin
= V
DD
= 2.3 to 2.7 V; I
swout
= 100
A
1.1
2.0
I
L
Leakage current
V
I
= V
DD
or V
SS
1
+1
A
INT Output
I
OL
LOW level output current
V
OL
= 0.4 V
3
mA
I
L
Leakage current
V
I
= V
DD
or V
SS
1
+1
A
Philips Semiconductors
Product specification
PCA9544
4-channel I
2
C multiplexer and interrupt controller
1999 Oct 07
9
AC CHARACTERISTICS
SYMBOL
PARAMETER
STANDARD-MODE
I
2
C-BUS
FAST-MODE I
2
C-BUS
UNIT
MIN
MAX
MIN
MAX
t
pd
Propagation delay from SDA to SD
n
or SCL to SC
n
0.3
1
0.3
1
ns
f
SCL
SCL clock frequency
0
100
0
400
KHz
t
BUF
Bus free time between a STOP and START condition
4.7
1.3
s
t
HD:STA
Hold time (repeated) START condition
After this period, the first clock pulse is generated
4.0
0.6
s
t
LOW
LOW period of the SCL clock
4.7
1.3
s
t
HIGH
HIGH period of the SCL clock
4.0
0.6
s
t
SU:STA
Set-up time for a repeated START condition
4.7
0.6
s
Data hold time:
t
HD:DAT
for CBUS compatible masters
5.0
s
for I
2
C-bus devices
0
2
0
2
0.9
3
s
t
SU:DAT
Data set-up time
250
100
4
ns
t
SU:STO
Set-up time for STOP condition
1000
300
ns
t
r
Rise time of both SDA and SCL signals
300
300
ns
t
f
Fall time of both SDA and SCL signals
4.0
0.6
s
C
b
Capacitive load for each bus line
400
400
pF
INT
t
iv
INTn to INT active valid time
4
4
s
t
ir
INTn to INT inactive delay time
2
2
s
L
pwr
LOW level pulse width rejection or INTn inputs
1
1
ns
H
pwr
HIGH level pulse width rejection or INTn inputs
500
500
ns
NOTES:
1. Pass gate propagation delay is calculated from the 20
typical R
ON
and and the 15pF load capacitance.
2. A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIH
min
of the SCL signal) in order to bridge
the undefined region of the falling edge of SCL.
3. The maximum t
HD:DAT
has only to be met if the device does not stretch the LOW period (t
LOW
) of the SCL signal.
4. A fast-mode I
2
C bus device can be used in a standard-mode I
2
C-bus system, but the requirement t
SU:DAT
250ns must then be met. This
will automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW period
of the SCL signal, it must output the next data bit to the SDA line t
rmax
+ t
SU:DAT
= 1000 + 250 = 1250ns (according to the standard-mode
I
2
C-bus specification) before the SCL line is released.
5. C
b
= total capacitance of one bus line in pF.
t
SP
t
BUF
t
HD;STA
P
P
S
t
LOW
t
R
t
HD;DAT
t
F
t
HIGH
t
SU;DAT
t
SU;STA
Sr
t
HD;STA
t
SU;STO
SDA
SCL
SU00645
Figure 8. Definition of timing on the I
2
C-bus
Philips Semiconductors
Product specification
PCA9544
4-channel I
2
C multiplexer and interrupt controller
1999 Oct 07
10
TSSOP20:
plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
Philips Semiconductors
Product specification
PCA9544
4-channel I
2
C multiplexer and interrupt controller
1999 Oct 07
11
NOTES
Philips Semiconductors
Product specification
PCA9544
4-channel I
2
C multiplexer and interrupt controller
1999 Oct 07
12
Purchase of Philips I
2
C components conveys a license under the Philips' I
2
C patent
to use the components in the I
2
C system provided the system conforms to the
I
2
C specifications defined by Philips. This specification can be ordered using the
code 9398 393 40011.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 940883409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1999
All rights reserved. Printed in U.S.A.
Date of release: 10-99
Document order number:
939775006498
Philips
Semiconductors
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
[1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1]
Please consult the most recently issued datasheet before initiating or completing a design.
PDF 
ZIP