Document Outline
- GENERAL DESCRIPTION
- QUICK REFERENCE DATA
- PINNING - SOT186A
- PIN CONFIGURATION
- SYMBOL
- LIMITING VALUES
- AVALANCHE LIMITING VALUE
- ISOLATION LIMITING VALUE & CHARACTERISTIC
- THERMAL RESISTANCES
- STATIC CHARACTERISTICS
- DYNAMIC CHARACTERISTICS
- MECHANICAL DATA
- DEFINITIONS
- LIFE SUPPORT APPLICATIONS
Philips Semiconductors
Objective Specification
PowerMOS transistor
PHX1N50E
Isolated version fo PHP1N50E
GENERAL DESCRIPTION
QUICK REFERENCE DATA
N-channel
enhancement
mode
SYMBOL
PARAMETER
MAX.
UNIT
field-effect power transistor in a full
pack, plastic envelope featuring high
V
DS
Drain-source voltage
500
V
avalanche energy capability, stable
I
D
Drain current (DC)
1.4
A
blocking voltage, fast switching and
P
tot
Total power dissipation
25
W
high thermal cycling performance
R
DS(ON)
Drain-source on-state resistance
5
with low thermal resistance. Intended
for use in Switched Mode Power
Supplies (SMPS),
motor control
circuits
and
general
purpose
switching applications.
PINNING - SOT186A
PIN CONFIGURATION
SYMBOL
PIN
DESCRIPTION
1
gate
2
drain
3
source
case isolated
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DS
Drain-source voltage
-
500
V
V
DGR
Drain-gate voltage
R
GS
= 20 k
-
500
V
V
GS
Gate-source voltage
-
30
V
I
D
Drain current (DC)
T
hs
= 25 C
-
1.4
A
T
hs
= 100 C
-
0.9
A
I
DM
Drain current (pulse peak
T
hs
= 25 C
-
5.6
A
value)
I
DR
Source-drain diode current
T
hs
= 25 C
-
1.4
A
(DC)
I
DRM
Source-drain diode current
T
hs
= 25 C
-
5.6
A
(pulse peak value)
P
tot
Total power dissipation
T
hs
= 25 C
-
25
W
T
stg
Storage temperature
-55
150
C
T
j
Junction temperature
-
150
C
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
W
DSS
Drain-source non-repetitive
I
D
= 2 A ; V
DD
50 V ; V
GS
= 10 V ;
unclamped inductive turn-off
R
GS
= 50
energy
T
j
= 25C prior to surge
-
120
mJ
T
j
= 100C prior to surge
-
20
mJ
W
DSR
1
Drain-source repetitive
I
D
= 2 A ; V
DD
50 V ; V
GS
= 10 V ;
-
3.6
mJ
unclamped inductive turn-off
R
GS
= 50
; T
j
150 C
energy
1. Pulse width and frequency limited by T
j(max)
1 2 3
case
d
g
s
November 1996
1
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistor
PHX1N50E
ISOLATION LIMITING VALUE & CHARACTERISTIC
T
hs
= 25 C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
isol
R.M.S. isolation voltage from all
f = 50-60 Hz; sinusoidal
-
2500
V
three terminals to external
waveform;
heatsink
R.H.
65% ; clean and dustfree
C
isol
Capacitance from T2 to external f = 1 MHz
-
10
-
pF
heatsink
THERMAL RESISTANCES
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
R
th j-hs
Thermal resistance junction to
with heatsink compound
-
-
5
K/W
heatsink
R
th j-a
Thermal resistance junction to
-
55
-
K/W
ambient
STATIC CHARACTERISTICS
T
j
= 25 C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
(BR)DSS
Drain-source breakdown
V
GS
= 0 V; I
D
= 0.25 mA
500
-
-
V
voltage
V
GS(TO)
Gate threshold voltage
V
DS
= V
GS
; I
D
= 0.25 mA
2.0
3.0
4.0
V
I
DSS
Drain-source leakage current
V
DS
= 500 V; V
GS
= 0 V; T
j
= 25 C
-
10
100
A
V
DS
= 400 V; V
GS
= 0 V; T
j
= 125 C
-
0.1
1.0
mA
I
GSS
Gate-source leakage current
V
GS
=
30 V; V
DS
= 0 V
-
10
100
nA
R
DS(ON)
Drain-source on-state
V
GS
= 10 V; I
D
= 1 A
-
4.5
5.0
resistance
V
SD
Source-drain diode forward
I
F
= 2 A ;V
GS
= 0 V
-
0.8
1.2
V
voltage
November 1996
2
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistor
PHX1N50E
DYNAMIC CHARACTERISTICS
T
j
= 25 C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
g
fs
Forward transconductance
V
DS
= 15 V; I
D
= 1 A
0.5
0.9
-
S
C
iss
Input capacitance
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
-
230
300
pF
C
oss
Output capacitance
-
35
50
pF
C
rss
Feedback capacitance
-
14
30
pF
Q
g(tot)
Total gate charge
V
GS
= 10 V; I
D
= 2 A; V
DS
= 400 V
-
10
-
nC
Q
gs
Gate to source charge
-
1
-
nC
Q
gd
Gate to drain (Miller) charge
-
5
-
nC
t
d on
Turn-on delay time
V
DD
= 30 V; I
D
= 2 A;
-
10
15
ns
t
r
Turn-on rise time
V
GS
= 10 V; R
GS
= 50
;
-
30
45
ns
t
d off
Turn-off delay time
R
GEN
= 50
-
30
40
ns
t
f
Turn-off fall time
-
20
30
ns
t
rr
Source-drain diode reverse
I
F
= 2 A; -dI
F
/dt = 100 A/
s;
-
350
-
ns
recovery time
Q
rr
Source-drain diode reverse
V
GS
= 0 V; V
R
= 100 V
-
2.5
-
C
recovery charge
L
d
Internal drain inductance
Measured from drain lead 6 mm
-
4.5
-
nH
from package to centre of die
L
s
Internal source inductance
Measured from source lead 6 mm
-
7.5
-
nH
from package to source bond pad
November 1996
3
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistor
PHX1N50E
MECHANICAL DATA
Dimensions in mm
Net Mass: 2 g
Fig.1. SOT186A; The seating plane is electrically isolated from all terminals.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Refer to mounting instructions for F-pack envelopes.
3. Epoxy meets UL94 V0 at 1/8".
10.3
max
3.2
3.0
4.6
max
2.9 max
2.8
seating
plane
6.4
15.8
max
0.6
2.5
2.54
5.08
1
2
3
3 max.
not tinned
3
0.5
2.5
0.9
0.7
M
0.4
15.8
max.
19
max.
13.5
min.
Recesses (2x)
2.5
0.8 max. depth
1.0 (2x)
1.3
November 1996
4
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistor
PHX1N50E
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1996
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
November 1996
5
Rev 1.000
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