Philips Semiconductors
Product specification
PowerMOS transistors
PHX4N40E
Avalanche energy rated
FEATURES
SYMBOL
QUICK REFERENCE DATA
Repetitive Avalanche Rated
Fast switching
V
DSS
= 400 V
Stable off-state characteristics
High thermal cycling performance
I
D
= 2.7 A
Isolated package
R
DS(ON)
1.8
GENERAL DESCRIPTION
PINNING
SOT186A
N-channel,
enhancement
mode
PIN
DESCRIPTION
field-effect
power
transistor,
intended for use in off-line switched
1
gate
mode power supplies, T.V. and
computer monitor power supplies,
2
drain
d.c. to d.c. converters, motor control
circuits
and
general
purpose
3
source
switching applications.
case
isolated
The PHX4N40E is supplied in the
SOT186A
full
pack
isolated
package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DSS
Drain-source voltage
T
j
= 25 C to 150C
-
400
V
V
DGR
Drain-gate voltage
T
j
= 25 C to 150C; R
GS
= 20 k
-
400
V
V
GS
Gate-source voltage
-
30
V
I
D
Continuous drain current
T
hs
= 25 C; V
GS
= 10 V
-
2.7
A
T
hs
= 100 C; V
GS
= 10 V
-
1.7
A
I
DM
Pulsed drain current
T
hs
= 25 C
-
18
A
P
D
Total dissipation
T
hs
= 25 C
-
30
W
T
j
, T
stg
Operating junction and
- 55
150
C
storage temperature range
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
E
AS
Non-repetitive avalanche
Unclamped inductive load, I
AS
= 2.7 A;
-
195
mJ
energy
t
p
= 0.28 ms; T
j
prior to avalanche = 25C;
V
DD
50 V; R
GS
= 50
; V
GS
= 10 V; refer
to fig:17
E
AR
Repetitive avalanche energy
1
I
AR
= 4.4 A; t
p
= 2.5
s; T
j
prior to
-
5.7
mJ
avalanche = 25C; R
GS
= 50
; V
GS
= 10 V;
refer to fig:18
I
AS
, I
AR
Repetitive and non-repetitive
-
4.4
A
avalanche current
d
g
s
1 2 3
case
1 pulse width and repetition rate limited by T
j
max.
December 1998
1
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors
PHX4N40E
Avalanche energy rated
ISOLATION LIMITING VALUE & CHARACTERISTIC
T
hs
= 25 C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
isol
R.M.S. isolation voltage from all
f = 50-60 Hz; sinusoidal
-
2500
V
three terminals to external
waveform;
heatsink
R.H.
65% ; clean and dustfree
C
isol
Capacitance from T2 to external f = 1 MHz
-
10
-
pF
heatsink
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
R
th j-hs
Thermal resistance junction
with heatsink compound
-
-
4.1
K/W
to heatsink
R
th j-a
Thermal resistance junction
-
60
-
K/W
to ambient
ELECTRICAL CHARACTERISTICS
T
j
= 25 C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
V
(BR)DSS
Drain-source breakdown
V
GS
= 0 V; I
D
= 0.25 mA
400
-
-
V
voltage
V
(BR)DSS
/ Drain-source breakdown
V
DS
= V
GS
; I
D
= 0.25 mA
-
0.1
-
%/K
T
j
voltage temperature
coefficient
R
DS(ON)
Drain-source on resistance
V
GS
= 10 V; I
D
= 2.2 A
-
1.3
1.8
V
GS(TO)
Gate threshold voltage
V
DS
= V
GS
; I
D
= 0.25 mA
2.0
3.0
4.0
V
g
fs
Forward transconductance
V
DS
= 30 V; I
D
= 2.2 A
1.3
2.2
-
S
I
DSS
Drain-source leakage current V
DS
= 400 V; V
GS
= 0 V
-
1
25
A
V
DS
= 320 V; V
GS
= 0 V; T
j
= 125 C
-
30
250
A
I
GSS
Gate-source leakage current V
GS
=
30 V; V
DS
= 0 V
-
10
200
nA
Q
g(tot)
Total gate charge
I
D
= 4.4 A; V
DD
= 320 V; V
GS
= 10 V
-
26
30
nC
Q
gs
Gate-source charge
-
2
4
nC
Q
gd
Gate-drain (Miller) charge
-
14
17
nC
t
d(on)
Turn-on delay time
V
DD
= 200 V; R
D
= 47
;
-
10
-
ns
t
r
Turn-on rise time
R
G
= 18
-
30
-
ns
t
d(off)
Turn-off delay time
-
55
-
ns
t
f
Turn-off fall time
-
38
-
ns
L
d
Internal drain inductance
Measured from drain lead to centre of die
-
4.5
-
nH
L
s
Internal source inductance
Measured from source lead to source
-
7.5
-
nH
bond pad
C
iss
Input capacitance
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
-
310
-
pF
C
oss
Output capacitance
-
60
-
pF
C
rss
Feedback capacitance
-
36
-
pF
December 1998
2
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors
PHX4N40E
Avalanche energy rated
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
T
j
= 25 C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
I
S
Continuous source current
T
hs
= 25C
-
-
4.4
A
(body diode)
I
SM
Pulsed source current (body
T
hs
= 25C
-
-
18
A
diode)
V
SD
Diode forward voltage
I
S
= 4.4 A; V
GS
= 0 V
-
-
1.2
V
t
rr
Reverse recovery time
I
S
= 4.4 A; V
GS
= 0 V; dI/dt = 100 A/
s
-
250
-
ns
Q
rr
Reverse recovery charge
-
2.2
-
C
December 1998
3
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors
PHX4N40E
Avalanche energy rated
Fig.1. Normalised power dissipation.
PD% = 100
P
D
/P
D 25 C
= f(T
mb
)
Fig.2. Normalised continuous drain current.
ID% = 100
I
D
/I
D 25 C
= f(T
mb
); conditions: V
GS
10 V
Fig.3. Safe operating area. T
hs
= 25 C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
Fig.4. Transient thermal impedance.
Z
th j-hs
= f(t); parameter D = t
p
/T
Fig.5. Typical output characteristics.
I
D
= f(V
DS
); parameter V
GS
Fig.6. Typical on-state resistance.
R
DS(ON)
= f(I
D
); parameter V
GS
0
20
40
60
80
100
120
140
Tmb / C
PD%
Normalised Power Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
1us
10us
100us
1ms
10ms
100ms
1s
10s
0.001
0.01
0.1
1
10
PHX1N60
tp / sec
Zth(j-hs) K/W
D = 0.5
0.2
0.1
0.05
0.02
D =
tp
t
p
T
T
P
t
D
0
20
40
60
80
100
120
140
Tmb / C
ID%
Normalised Current Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
0
5
10
15
20
25
30
0
2
4
6
8
10
PHP4N40
VDS, Drain-Source voltage (Volts)
ID, Drain current (Amps)
5 V
6 V
6.5 V
7 V
10 V
5.5 V
VGS = 4.5 V
Tj = 25 C
1
10
100
1000
10000
0.01
0.1
1
10
100
PHX2N40
VDS, Drain-source voltage (Volts)
ID, Drain current (Amps)
1 ms
100 ms
DC
tp = 10 us
10 ms
RDS(ON) = VDS/ID
100 us
0
2
4
6
8
10
0
1
2
3
4
PHP4N40
5 V
5.5 V
10 V
ID, Drain current (Amps)
RDS(on), Drain-Source on resistance (Ohms)
4.5 V
6 V
Tj = 25 C
6.5 V
VGS = 7 V
December 1998
4
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors
PHX4N40E
Avalanche energy rated
Fig.7. Typical transfer characteristics.
I
D
= f(V
GS
); parameter T
j
Fig.8. Typical transconductance.
g
fs
= f(I
D
); parameter T
j
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)
/R
DS(ON)25 C
= f(T
j
); I
D
= 2.2 A; V
GS
= 10 V
Fig.10. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 0.25 mA; V
DS
= V
GS
Fig.11. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 C; V
DS
= V
GS
Fig.12. Typical capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
0
2
4
6
8
10
0
2
4
6
8
10
PHP4N40
VGS, Gate-Source voltage (Volts)
ID, Drain current (Amps)
Tj = 25 C
Tj = 150 C
VDS > ID x RDS(on)max
-60
-40
-20
0
20
40
60
80
100
120
140
Tj / C
VGS(TO) / V
4
3
2
1
0
max.
typ.
min.
0
2
4
6
8
10
0
1
2
3
4
PHP4N40
ID, Drain current (A)
gfs, Transconductance (S)
Tj = 25 C
150 C
VDS > ID x RDS(on)max
0
1
2
3
4
VGS / V
ID / A
1E-01
1E-02
1E-03
1E-04
1E-05
1E-06
SUB-THRESHOLD CONDUCTION
typ
2 %
98 %
-60
-40
-20
0
20
40
60
80
100 120 140
Tj / C
Normalised RDS(ON) = f(Tj)
2
1
0
a
1
10
100
1000
1
10
100
1000
PHP4N40
VDS, Drain-Source voltage (Volts)
Junction capacitances (pF)
Ciss
Coss
Crss
December 1998
5
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors
PHX4N40E
Avalanche energy rated
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); parameter V
DS
Fig.14. Typical switching times; t
d(on)
, t
r
, t
d(off)
, t
f
= f(R
G
)
Fig.15. Normalised drain-source breakdown voltage;
V
(BR)DSS
/V
(BR)DSS 25 C
= f(T
j
)
Fig.16. Source-Drain diode characteristic.
I
F
= f(V
SDS
); parameter T
j
Fig.17. Maximum permissible non-repetitive
avalanche current (I
AS
) versus avalanche time (t
p
);
unclamped inductive load
Fig.18. Maximum permissible repetitive avalanche
current (I
AR
) versus avalanche time (t
p
)
0
10
20
30
40
0
5
10
15
PHP4N40
Qg, Gate charge (nC)
VGS, Gate-Source voltage (Volts)
VDD = 320 V
200 V
80 V
ID = 4.4 A
Tj = 25 C
0
0.5
1
1.5
0
5
10
15
20
PHP4N40
VSDS, Source-Drain voltage (Volts)
IF, Source-Drain diode current (Amps)
VGS = 0 V
Tj = 25 C
150 C
0
10
20
30
40
50
60
1
10
100
1000
tr
PHP4N40
RG, Gate resistance (Ohms)
Switching times (ns)
Tj = 25 C
RD = 47 Ohms
VDD = 200 V
VGS = 10 V
td(on)
td(off)
tf
PHP4N40E
0.1
1
10
1E-06
1E-05
1E-04
1E-03
1E-02
Avalanche time, tp (s)
Non-repetitive Avalanche current, IAS (A)
125 C
VDS
ID
tp
Tj prior to avalanche = 25 C
-100
-50
0
50
100
150
0.85
0.9
0.95
1
1.05
1.1
1.15
Tj, Junction temperature (C)
Normalised Drain-source breakdown voltage
V(BR)DSS @ Tj
V(BR)DSS @ 25 C
PHP4N40E
0.01
0.1
1
10
1E-06
1E-05
1E-04
1E-03
1E-02
Avalanche time, tp (s)
Maximum Repetitive Avalanche Current, IAR (A)
125 C
Tj prior to avalanche = 25 C
December 1998
6
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors
PHX4N40E
Avalanche energy rated
MECHANICAL DATA
Dimensions in mm
Net Mass: 2 g
Fig.19. SOT186A; The seating plane is electrically isolated from all terminals.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Refer to mounting instructions for F-pack envelopes.
3. Epoxy meets UL94 V0 at 1/8".
10.3
max
3.2
3.0
4.6
max
2.9 max
2.8
seating
plane
6.4
15.8
max
0.6
2.5
2.54
5.08
1
2
3
3 max.
not tinned
3
0.5
2.5
0.9
0.7
M
0.4
15.8
max.
19
max.
13.5
min.
Recesses (2x)
2.5
0.8 max. depth
1.0 (2x)
1.3
December 1998
7
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistors
PHX4N40E
Avalanche energy rated
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1998
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
December 1998
8
Rev 1.200
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